JPS59211345A - Time division shared transmitter - Google Patents

Time division shared transmitter

Info

Publication number
JPS59211345A
JPS59211345A JP8683683A JP8683683A JPS59211345A JP S59211345 A JPS59211345 A JP S59211345A JP 8683683 A JP8683683 A JP 8683683A JP 8683683 A JP8683683 A JP 8683683A JP S59211345 A JPS59211345 A JP S59211345A
Authority
JP
Japan
Prior art keywords
counter
demultiplexer
signal
multiplexer
oscillator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8683683A
Other languages
Japanese (ja)
Inventor
Takehiro Matsubara
松原 武廣
Shinji Ueda
晋司 上田
Hisashi Kitamura
北村 久
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP8683683A priority Critical patent/JPS59211345A/en
Publication of JPS59211345A publication Critical patent/JPS59211345A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)

Abstract

PURPOSE:To economize the cables connecting a multiplexer and a demultiplexer into two wires by providing another counter further to the demultiplexer of a time division shared transmitter. CONSTITUTION:A pulse of an oscillator 1 is inputted to counters 2 and 5. The counter 2 counts an output pulse outputted from the oscillator 1 and outputs any of 64 kinds of binary codes from 0-63 as an output selecting signal. The signal is inputted to a multiplexer 3, which selects only one point of input signal In designated by a binary code (n) among input signals I0, I1,...I63. Further, the pulse of the oscillator 1 is inputted also to the counter 25 and a binary code is outputted similarly. The demultiplexer 4 transmits an output signal On corresponding to the number (n) the same as that of the input signal In among many input signals I0, I1,...I3 connected to the multiplexer 3 by an output selecting signal of the counter 5.

Description

【発明の詳細な説明】 この発明は、マルチプレクサからデマルチプレクサに、
信号を伝送するための時分割共有伝送装置に関するもの
である。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides a method for converting a multiplexer into a demultiplexer.
The present invention relates to a time division shared transmission device for transmitting signals.

従来この種の装置として第1図に示すものがあった。1
はパルスを発生させる発振器、2は発振器1のパルスを
数え、2進数の符号を出力するカウンタ、3はカウンタ
2の2進符号によって指示された番号nの入力信号In
を多数の入力信号I。。
A conventional device of this type is shown in FIG. 1
is an oscillator that generates pulses, 2 is a counter that counts the pulses of oscillator 1 and outputs a binary code, and 3 is an input signal In of number n indicated by the binary code of counter 2.
A large number of input signals I. .

■□・・・I63η)ら選択し取り出して伝送するマル
チプレクサ、4はマルチプレクサ3から伝送され女人力
信号Inを多数の出力信号0゜、0□・・・06.の中
からカウンタ2で指示さf′Lk番号n番号方信号On
として送出下デマルチプレクサである。
■□...I63η) A multiplexer 4 selects, takes out, and transmits the female power signal In transmitted from the multiplexer 3 to a large number of output signals 0°, 0□...06... f'Lk number n number direction signal indicated by counter 2 from inside
As a send-out lower demultiplexer.

仄に動作について説明する。例として1人出力端子がO
刀)ら63’Fでの64点ある場合について説明する。
The operation will be briefly explained. For example, one person's output terminal is O
The case where there are 64 points at 63'F will be explained.

発振器1は、パルスを発生させる。そtLをカウンタ2
で数え、0〜63の2進符号を出力信号として出力する
。それがマルチプレクサ3に入力され、64点の入力か
ら2進符号で指示された番号の入力信号を1点だけ選択
し、デマルチプレクサ4に伝送する。カウンタ2の出力
信号はデマルチプレクサ4にも同時に入力される。デマ
ルチプレクサ4は、マルチプレクサ3カ)らの出力信号
を受け、カウンタ2の2進符号で指示された番号に該当
する出力信号のみを出力する。
Oscillator 1 generates pulses. Counter 2
, and outputs a binary code from 0 to 63 as an output signal. This signal is input to the multiplexer 3, and from the 64 input points, only one input signal with the number specified by the binary code is selected and transmitted to the demultiplexer 4. The output signal of the counter 2 is also input to the demultiplexer 4 at the same time. The demultiplexer 4 receives the output signals from the multiplexers 3 and outputs only the output signal corresponding to the number indicated by the binary code of the counter 2.

従来の伝送装置は以上のように構成されているので、カ
ウンタ2から、離れに所にあるデマルチプレクサ41で
5この従来例の場合では6本のケーブルを引くことが必
要で、費用がかかるなどの欠点があった。特にマルチプ
レクサ3とデマルチプレクサ4とが別のプリント基板或
いは別の筐体内に収納されているときは、この多数のケ
ーブルに対応したコネクタが複数個必要となり、この点
でも極めて不経済となる欠点な有していた。
Since the conventional transmission device is configured as described above, it is necessary to run 5 cables from the counter 2 to the remote demultiplexer 41, which is expensive. There was a drawback. Particularly when the multiplexer 3 and demultiplexer 4 are housed on separate printed circuit boards or in separate housings, multiple connectors are required to accommodate this large number of cables, which also has the drawback of being extremely uneconomical. had.

この発明は、上記の工うな従来のものの欠点を除去下る
ためになされたもので、デマルチプレクサ側にカウンタ
を設置することにより、ケーブルを節約できる時分割共
有伝送装置を提供することを目的としている。
This invention was made to eliminate the drawbacks of the conventional methods described above, and aims to provide a time division shared transmission device that can save cables by installing a counter on the demultiplexer side. .

以下、この発明の一実施例による時分割共有伝送装置を
図について説明する。第2囚において。
DESCRIPTION OF THE PREFERRED EMBODIMENTS A time division shared transmission apparatus according to an embodiment of the present invention will be described below with reference to the drawings. In the second prisoner.

1は発振器、2は発振器1のパルスを計数して2進数の
符号を出力するカウンタ、3はカウンタ2の2進符号に
よって指示された番号nの入力信号Inのみをとり出し
て伝送するマルチプレクサ。
1 is an oscillator, 2 is a counter that counts the pulses of the oscillator 1 and outputs a binary code, and 3 is a multiplexer that takes out only the input signal In of number n indicated by the binary code of the counter 2 and transmits it.

5はカウンタ2と同様な働きをするカウンタ、4はマル
チプレクサ3から桧送されに人力信号Inをカウンタ5
の2進符号で指示された番号nの8力信号Onの端子へ
送るデマルチプレクサである。
5 is a counter that functions similarly to counter 2; 4 is a counter 5 which receives the human input signal In sent from the multiplexer 3;
This is a demultiplexer that sends to the terminal of the 8-power signal On with the number n indicated by the binary code.

仄にこのような構成の実踊例の動作を述べる。I will briefly describe the movements of an actual dance example with this structure.

゛まず1発振器1はパルスを発生させて出力する。``First, oscillator 1 generates and outputs a pulse.

発振器1の出力パルスは、カウンタ2及びカウンタ5に
入力される。カウンタ2は1発振器1から出力される出
力パルスを計数し、θ〜631での64種の2進符号の
いずれ力)を出刃選択信号として出力する。それがマル
チプレクサ3に入力され、64点の入力信号工。、I□
、・・・16.の中力)ら2進符号nで指示された入力
信号Inの1点のみを選択し、伝送する。1だ1発振器
1のパルスは。
The output pulses of the oscillator 1 are input to a counter 2 and a counter 5. The counter 2 counts the output pulses output from the oscillator 1, and outputs the output of 64 types of binary codes at θ to 631) as a cutting edge selection signal. It is input to multiplexer 3, which has 64 points of input signal processing. ,I□
,...16. Only one point of the input signal In designated by the binary code n is selected and transmitted. The pulse of oscillator 1 is 1.

カウンタ5にも入力され、同様に2進符号を出力する。It is also input to the counter 5, and similarly outputs a binary code.

デマルチプレクサ4は、カウンタ5の出力選択信号によ
り、マルチプレクサ3に接続された多数の入力信号l。
The demultiplexer 4 receives a number of input signals l connected to the multiplexer 3 by the output selection signal of the counter 5.

+11・・・I63の中から人力信号Inと同じ番号n
に該肖する出力信号Onな送出丁。
+11...Same number n from I63 as the human signal In
The output signal corresponding to the output signal is ON.

以上のように、この発明の時分割共有伝送装置によれば
、デマルチプレクサ側にもう1個別のカウンタを設置し
たので、マルチプレクサ側とデマルチプレクサ側をつな
ぐケーブルが2線ですみ時分割共有伝送装置が安価にで
きる効果がある。
As described above, according to the time division shared transmission device of the present invention, since another individual counter is installed on the demultiplexer side, only two cables are needed to connect the multiplexer side and the demultiplexer side. It has the effect of being inexpensive.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の伝送装置を示すブロック慴成図。 第2図はこの発明の一実施例による時分割共有伝送装置
な示すブロック構成口である。 1・・・発振器、2・・・カウンタ、3・・・マルチプ
レクサ、4・・・デマルチプレクサ、5・・・カウンタ
。 なお、商中、同一符号は同一部分を示す。 代理人  大 岩 増 雄
FIG. 1 is a block diagram showing a conventional transmission device. FIG. 2 is a block diagram showing a time division shared transmission apparatus according to an embodiment of the present invention. 1... Oscillator, 2... Counter, 3... Multiplexer, 4... Demultiplexer, 5... Counter. In addition, the same reference numerals indicate the same parts in the figures. Agent Masuo Oiwa

Claims (1)

【特許請求の範囲】 発振器力)らの出刃パルスを計数するカウンタを設け、
上記カウンタη)らの出力選択信号に基づきマルチプレ
クサ及びデマルチプレクサを介して複数信号から選択し
た物足信号を伝送する時分割共有伝送装置において、上
記カウンタは上記マルチプレクサ及びデマルチプレクサ
に対応しそそれぞれに配置された第1及び第2カウンタ
で構成され。 上記発振器の出刃パルスを上記第1及び第2カウンタに
同時に供給したことを特徴とする時分割共有伝送装置。
[Claims] A counter is provided for counting the cutting pulses of the oscillator force,
In a time division shared transmission device that transmits a signal selected from a plurality of signals via a multiplexer and a demultiplexer based on the output selection signal of the counter η), the counter is arranged corresponding to the multiplexer and demultiplexer, respectively. the first and second counters. A time division shared transmission device characterized in that the blade pulses of the oscillator are simultaneously supplied to the first and second counters.
JP8683683A 1983-05-16 1983-05-16 Time division shared transmitter Pending JPS59211345A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8683683A JPS59211345A (en) 1983-05-16 1983-05-16 Time division shared transmitter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8683683A JPS59211345A (en) 1983-05-16 1983-05-16 Time division shared transmitter

Publications (1)

Publication Number Publication Date
JPS59211345A true JPS59211345A (en) 1984-11-30

Family

ID=13897891

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8683683A Pending JPS59211345A (en) 1983-05-16 1983-05-16 Time division shared transmitter

Country Status (1)

Country Link
JP (1) JPS59211345A (en)

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