JPS5920662U - printed wiring board - Google Patents

printed wiring board

Info

Publication number
JPS5920662U
JPS5920662U JP11529082U JP11529082U JPS5920662U JP S5920662 U JPS5920662 U JP S5920662U JP 11529082 U JP11529082 U JP 11529082U JP 11529082 U JP11529082 U JP 11529082U JP S5920662 U JPS5920662 U JP S5920662U
Authority
JP
Japan
Prior art keywords
wiring board
printed wiring
solder resist
strip lines
solder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11529082U
Other languages
Japanese (ja)
Inventor
中原　照巳
Original Assignee
株式会社東芝
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社東芝 filed Critical 株式会社東芝
Priority to JP11529082U priority Critical patent/JPS5920662U/en
Publication of JPS5920662U publication Critical patent/JPS5920662U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案の印刷配線板の一実施例を示す平面図、
第２図は第１図に示す印刷配線板のｎ−■間の断面図で
ある。 １・・・基板、２・・・回路パターン、３・・・接続電
極、４、　５．　６・・・ストリップ線路、７・・・半
田、８，８’、　　９．　９’、　　１０．　１０’、
　　１２．　１３・・・識別用電極、１１・・・半田レ
ジスト。FIG. 1 is a plan view showing an embodiment of the printed wiring board of the present invention;
FIG. 2 is a cross-sectional view of the printed wiring board shown in FIG. 1 along line n--2. DESCRIPTION OF SYMBOLS 1...Substrate, 2...Circuit pattern, 3...Connection electrode, 4, 5. 6... Strip line, 7... Solder, 8, 8', 9. 9', 10. 10',
12. 13...Identification electrode, 11...Solder resist.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 複数のストリップ線路を含む回路パターンの形成された
基板に半田レジストが塗布されてなる印刷配線板におい
て、前記半田レジストで区画されて半田の付着された識
別用電極が前記ストリップ線路に形成されてなることを
特徴とする印刷配線板。In a printed wiring board formed by applying a solder resist to a substrate on which a circuit pattern including a plurality of strip lines is formed, identification electrodes separated by the solder resist and having solder attached thereto are formed on the strip lines. A printed wiring board characterized by:
JP11529082U 1982-07-29 1982-07-29 printed wiring board Pending JPS5920662U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11529082U JPS5920662U (en) 1982-07-29 1982-07-29 printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11529082U JPS5920662U (en) 1982-07-29 1982-07-29 printed wiring board

Publications (1)

Publication Number Publication Date
JPS5920662U true JPS5920662U (en) 1984-02-08

Family

ID=30266182

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11529082U Pending JPS5920662U (en) 1982-07-29 1982-07-29 printed wiring board

Country Status (1)

Country Link
JP (1) JPS5920662U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5121841B2 (en) * 1972-05-12 1976-07-06

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5121841B2 (en) * 1972-05-12 1976-07-06

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