JPS59205713A - Crystallization of semiconductor thin film - Google Patents
Crystallization of semiconductor thin filmInfo
- Publication number
- JPS59205713A JPS59205713A JP58081251A JP8125183A JPS59205713A JP S59205713 A JPS59205713 A JP S59205713A JP 58081251 A JP58081251 A JP 58081251A JP 8125183 A JP8125183 A JP 8125183A JP S59205713 A JPS59205713 A JP S59205713A
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- layer
- semiconductor thin
- substrate
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/0242—Crystalline insulating materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02488—Insulating materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02598—Microstructure monocrystalline
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02689—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using particle beams
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、多結晶薄膜、非晶質薄膜を加熱溶融して再結
晶化させるいわゆるゾーンメルト法における半導体薄膜
の結晶化方法に関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for crystallizing a semiconductor thin film using the so-called zone melt method, in which a polycrystalline thin film or an amorphous thin film is melted and recrystallized by heating.
背景技術とその問題点
絶縁基板又は絶縁層上に被着形成した多結晶又は非晶質
の半導体薄膜（例えばシリコン薄膜）をゾーンメルト法
により結晶化（いわゆる単結晶化）して半導体結晶薄膜
を作シ、この結晶薄膜を用いて半導体集積回路等を製作
することが行われている。Background technology and its problems A polycrystalline or amorphous semiconductor thin film (for example, a silicon thin film) deposited on an insulating substrate or an insulating layer is crystallized (so-called single crystallization) by a zone melt method to form a semiconductor crystal thin film. Currently, semiconductor integrated circuits and the like are being manufactured using this crystal thin film.
このようなゾーンメルト法の一つとして、例えばカーゼ
ン・ヒータを使用した結晶化方法がある。One such zone melt method is, for example, a crystallization method using a Curzen heater.
この結晶化方法では、まず基板として、第１図に示すよ
うに厚さ０．５ ａｓの石英板（２）上にＣＶＤ法（化
学気相成長法）で堆積した０、５μｍ厚のＳｉｏ２層（
３）、減圧ＣＶＤで堆積した０、５μｍ厚の多結晶シリ
コン薄膜（４）、ＣＶＤで堆積した２μｍ厚のＳｉｏ２
層（５）、減圧ＣＶＤ （又はスパッタ、リング）で堆
積した５０ ｎｍ厚のＳ ｉ 、Ｎ４膜（６）を順次積
層して形成した基板（１）を用意する。そして、第２図
に示すように１この基板（１）をシート状の固定ヒータ
（７）上に載置し、また基板（１）上には約１ｍの間隔
を保ちながら平行に移動するストリップヒータ（８）を
配し、この固定ヒータ（７）で基板（１）を約１２００
℃まで予備加熱すると共に、ストリップヒータ（８）を
約１６００℃に加熱し、このストリップヒータ（８）を
移動させながら基板（１）の多結晶シリコン薄膜（４）
を溶融し、単結晶シリコンに順次再結晶化させるもので
ある。なお、とのＣＶＤで堆積した５１０□層（５）と
ＣＶＤ （又はスパッタリング）で堆積したＳｌ、Ｎ４
膜（６）からなるキャップ層はシリコン薄膜（４）を平
滑化させるためであり、この構成は、Ａｐｐｌ、 Ｐｈ
ｙｓ、 Ｌｅｔｔ、 Ｖｏｌ、 ４０、Ｐ、 １５８
（１９８２）に示されている。In this crystallization method, first, as a substrate, a 0.5 μm thick SiO2 layer is deposited by CVD (chemical vapor deposition) on a 0.5 as thick quartz plate (2) as shown in Figure 1. (
3), 0.5 μm thick polycrystalline silicon thin film deposited by low pressure CVD (4), 2 μm thick Sio2 deposited by CVD
A substrate (1) is prepared by sequentially laminating a layer (5) and a 50 nm thick Si and N4 film (6) deposited by low pressure CVD (or sputtering or ring). Then, as shown in Fig. 2, this substrate (1) is placed on a sheet-shaped fixed heater (7), and on the substrate (1) are strips that move in parallel while maintaining an interval of about 1 m. A heater (8) is arranged, and this fixed heater (7) heats the substrate (1) approximately 1200 m
At the same time, the strip heater (8) is heated to approximately 1600°C, and while the strip heater (8) is moved, the polycrystalline silicon thin film (4) on the substrate (1) is heated to approximately 1600°C.
is melted and sequentially recrystallized into single crystal silicon. In addition, the 510□ layer (5) deposited by CVD and the Sl, N4 layer deposited by CVD (or sputtering)
The cap layer consisting of the film (6) is for smoothing the silicon thin film (4), and this structure is similar to that of Appl, Ph.
ys, Lett, Vol, 40, P, 158
(1982).
このような従来の基板（１）を使用して多結晶シリコン
薄膜（４）への加熱を行った場合、加熱温度が所要温度
以上（過剰加熱）にガると溶融した多結晶シリコンの粘
性が低下して、表面張力により多結晶シリコン薄膜（４
）が破れ、多結晶シリコンが粒状になったり、或いは基
板（１）の両端へ流れ去ったシする。この多結晶シリコ
ンが流れ去る現象は、僅かな過剰加熱によっても発生し
、特に問題となるのは、条件を一定にして同一基板を加
熱°した場合であっても、再結晶化する領域と流れ去る
領域とが周期的に発生し、均一に再結晶化された大面積
の結晶薄膜を得ることが困難なことである。このような
現象が生ずるのは、多結晶シリコンが再結晶化するとき
の潜熱が余剰の熱となって多結晶シリコン薄膜（４）内
に蓄積し、過剰加熱となって多結晶シリコンを流れ出さ
せ、更にこの余剰の熱が多結晶シリコンと共に移動する
ために再び再結晶化が始まるためである。When heating the polycrystalline silicon thin film (4) using such a conventional substrate (1), if the heating temperature exceeds the required temperature (excessive heating), the viscosity of the molten polycrystalline silicon decreases. The polycrystalline silicon thin film (4
) is torn, and the polycrystalline silicon becomes granular or flows to both ends of the substrate (1). This phenomenon of polycrystalline silicon flowing away occurs even with slight overheating, and what is particularly problematic is that even when the same substrate is heated under constant conditions, the recrystallized area and the flow These regions occur periodically, making it difficult to obtain a uniformly recrystallized crystal thin film over a large area. This phenomenon occurs because the latent heat when polycrystalline silicon recrystallizes becomes surplus heat that accumulates in the polycrystalline silicon thin film (4), causing excessive heating and causing the polycrystalline silicon to flow out. Furthermore, this excess heat moves together with the polycrystalline silicon, causing recrystallization to begin again.
発明の目的
本発明は、上述の点に鑑み、半導体薄膜を再結晶化させ
る際、多少の過剰加熱状態があっても安定した結晶性を
有する半導体薄膜を得ることができる結晶化方法を提供
するものである。Purpose of the Invention In view of the above-mentioned points, the present invention provides a crystallization method capable of obtaining a semiconductor thin film having stable crystallinity even if there is some excessive heating when recrystallizing a semiconductor thin film. It is something.
発明の概要
本発明は、第１及び第２の半導体酸化物層の間に半導体
薄膜を挾み、この半導体薄膜と上記第１及び／又は第２
の半導体酸化物層との間に化学量論的に変化する遷移層
を形成し、この半導体薄膜を加熱溶融して結晶化させる
ことを特徴とする半導体薄膜の結晶化方法である。Summary of the Invention The present invention includes a semiconductor thin film sandwiched between first and second semiconductor oxide layers, and a semiconductor thin film and the first and/or second semiconductor oxide layer.
This method of crystallizing a semiconductor thin film is characterized by forming a stoichiometrically changing transition layer between the semiconductor oxide layer and the semiconductor thin film, and heating and melting this semiconductor thin film to crystallize it.
上記発明によシ、大面積の半導体薄膜を均一に再結晶化
させることが可能になる。According to the above invention, it becomes possible to uniformly recrystallize a large area semiconductor thin film.
実施例
本発明においては、多結晶又は非晶質の半導体 ′
薄膜例えば多結晶シリコン薄膜とこの多結晶シリコン薄
膜を挾んでいる第１及び第２の半導体酸化物層例えば５
ＩＯ２層との間の両方又は一方に化学量論的に変化する
遷移層を形成した基板を使用することを特徴とするもの
である。ここで、化学量論的に変化する遷移層とは、第
６図Ａに示すように多結晶シリコン薄膜α■と５ＩＯ２
層（２）とＪに挾まれた層＜ＩＩが、多結晶シリコン薄
膜Ｃ１や側から８１０□層（２）側に向って酸素の含有
率が斯増してい＜５ｔｏｏｌを意味する。第６図Ｂにお
いて、酸素の増加率を直線状に示しているが、曲線状で
あることもありうるし、また層（イ）の横方向において
組成が不均一になっていることもアシうる。なお、この
遷移層α１の厚さは、適宜選定することができる。遷移
層へ１の形成方法としては、酸素雰囲気での熱酸化、プ
ラズマ陽極酸化、各膜を積層した後の界面への酸素のイ
オン注入及び熱酸化、ＣＶＤ５ｆラズマＣＶＤ 、ス１
４’ツタリング等がある。Embodiments In the present invention, polycrystalline or amorphous semiconductors'
A thin film such as a polycrystalline silicon thin film and first and second semiconductor oxide layers sandwiching the polycrystalline silicon thin film, e.g.
This method is characterized by the use of a substrate in which a stoichiometrically changing transition layer is formed between both or one of the IO2 layer and the IO2 layer. Here, the stoichiometrically changing transition layer refers to the polycrystalline silicon thin film α■ and 5IO2 as shown in FIG. 6A.
In the layer <II sandwiched between the layer (2) and J, the oxygen content increases from the polycrystalline silicon thin film C1 side toward the 810□ layer (2) side, meaning <5tool. In FIG. 6B, the rate of increase in oxygen is shown as a straight line, but it may be curved or the composition may be non-uniform in the lateral direction of the layer (A). Note that the thickness of this transition layer α1 can be selected as appropriate. Methods for forming 1 in the transition layer include thermal oxidation in an oxygen atmosphere, plasma anodic oxidation, oxygen ion implantation and thermal oxidation at the interface after laminating each film, CVD5f plasma CVD, s1
There is 4' vine ring etc.
本発明の実施例に使用する基板としては、第３図に示す
ように石英板へ→上にＣＶＤによる８１０２層α０と減
圧ＣＶＤによる多結晶シリコン薄膜Ｏｆ）を堆積した後
、この多結晶シリコン薄膜α時を酸素雰囲気中で熱酸化
して遷移層αηを適当な厚さに形成し、更にこのように
ＣＶＤによる５１０２層α枠と減圧ＣＶＤ（又はスパッ
タリング）による８１３Ｎ４膜ａ傷を堆積した基板（ホ
）を使用する。なお、この多結晶シリコン薄膜αＱの表
面側のみの遷移層α→の形成は、上記酸素雰囲気中の熱
酸化の他に、例えばプラズマ陽極酸化、により行うこと
もできる。As shown in FIG. 3, the substrate used in the embodiment of the present invention is a quartz plate, on which an 8102 layer α0 by CVD and a polycrystalline silicon thin film Of) are deposited by low pressure CVD. A transition layer αη is formed to an appropriate thickness by thermal oxidation in an oxygen atmosphere at α time, and then a 5102 layer α frame by CVD and an 813N4 film a scratch by low pressure CVD (or sputtering) are deposited on the substrate ( e). Note that the formation of the transition layer α→ only on the surface side of the polycrystalline silicon thin film αQ can be performed by, for example, plasma anodic oxidation in addition to the above-mentioned thermal oxidation in an oxygen atmosphere.
第４図に示す他の実施例は、石英板α→上に８１０２層
（イ）、多結晶シリコン薄膜α！、 ＳｔＯ□層α時、
８ ｉ ｇＮ４膜（至）を順次堆積した後、多結晶シリ
コン薄膜←Ｑと上下のＳｉｏ２層（ト）、ａ砂との界面
に酸素をイオン注入し、その後熱酸化して遷移層Ｈ及び
に）を形成し、この両者の遷移層＠→及び（ロ）によっ
て多結晶シリコン薄膜αＱが挾まれるように構成した基
板翰である。Another embodiment shown in FIG. 4 has 8102 layers (a) on the quartz plate α→, and a polycrystalline silicon thin film α! , when StO□ layer α,
8 After sequentially depositing the i gN4 film (to), oxygen ions are implanted into the interface between the polycrystalline silicon thin film←Q, the upper and lower Sio2 layers (g), and the a sand, and then thermal oxidation is performed to form the transition layer H and ), and a polycrystalline silicon thin film αQ is sandwiched between the two transition layers @→ and (b).
また、第５図に示す他の実施例は、石英板α→上にＣＶ
Ｄ （又はプラズマＣＶＤ 、スパッタリング）によ、
ＢＳｔＯ□層０θを堆積させる工程に連続して５１０２
の酸素の含有率を漸減させていって一方の遷移層０■を
形成し、次に酸素を全く含まない状態である多結晶シリ
コン薄膜αりを所要の厚さ分形成した後、連続的に今度
は酸素の含有基を漸増させていって他方の遷移層（イ）
を形成し、その後ＳｉＯ□層α樽とＳＩ３Ｎ４謄０つを
順次堆積した基板（ハ）である。In addition, in another embodiment shown in FIG. 5, the quartz plate α→CV
D (or plasma CVD, sputtering),
5102 following the step of depositing the BStO□ layer 0θ
One transition layer is formed by gradually decreasing the oxygen content of Next, the number of oxygen-containing groups is gradually increased to form the other transition layer (a).
This is a substrate (c) on which a SiO□ layer α barrel and four SI3N layers were sequentially deposited.
本発明においては、上記実施例の基板（イ）又は（至）
、（ハ）をカーボン・ヒータ（他に例えばレーザ、電子
ビーム、赤外線）で加熱することによシ多結晶シリコン
薄膜α０を溶融し、単結晶シリコンに再結晶化さぜるも
のである。In the present invention, the substrate (a) or (to) of the above embodiment
, (c) are heated with a carbon heater (other examples include laser, electron beam, and infrared rays) to melt the polycrystalline silicon thin film α0 and recrystallize it into single-crystal silicon.
上述の本発明によれば、上記構成の基板（ホ）又は（至
）、（ハ）を使用することによシ、基板（イ）又は（イ
）、（ハ）の加熱時、多少の過剰加熱の状態があっても
遷移層ａｆ）、Ｑｌ）、（ハ）が多結晶シリコンと５ｉ
ｎ２との接着性を高めているので、溶融した多結晶シリ
コンの流れ出しを抑制することができる。According to the above-mentioned present invention, by using the substrate (e) or (to) or (c) having the above structure, it is possible to avoid a slight excess when heating the substrate (a) or (a) or (c). Even if there is a heating state, the transition layers af), Ql), and (c) are polycrystalline silicon and 5i.
Since the adhesion with n2 is enhanced, it is possible to suppress the outflow of molten polycrystalline silicon.
発明の効果
本発明によれば、半導体薄膜を再結晶化させるための加
熱時、多少の過剰加熱の状態があっても、遷移層が形成
されていることによυ、溶融した半導体薄膜が流れ出す
のを阻止することができ、従って結晶性の優れた大面積
の結晶薄膜を得ることができる。また、遷移層があるの
で、均一な半導体薄膜を得ることができる過剰加熱の温
度範囲が広がり、この結果再結晶化の際の加熱温度の制
御が容易になる。Effects of the Invention According to the present invention, even when a semiconductor thin film is heated to recrystallize it, even if there is some overheating, the molten semiconductor thin film will flow out due to the formation of the transition layer. Therefore, a large-area crystal thin film with excellent crystallinity can be obtained. Furthermore, since there is a transition layer, the temperature range of excessive heating that can obtain a uniform semiconductor thin film is widened, and as a result, the heating temperature during recrystallization can be easily controlled.
第１図は従来の結晶化方法において使用されている基板
の断面図、第２図はカーボン・ヒータを使用した結晶化
方法を示す斜視図、第３図、第４図及び第５図は本発明
に使用する基板の断面図、第６図は本発明に係る基板の
遷移層を説明するための図である。
αＯ１α呻はＳ ｔＯ２層、αＱＦｉ多結晶シリコン薄
膜、α乃。
Ｑカ、（イ）は遷移層である。
第１図 １
第２図
第３図
翌
ｑ
第４図
フ１
第５図
医
第６図
八 Ｂ
手続補正書
（特許庁審判長 殿）１、事件の
表示
昭和５８年特許願第 ８１２５１ 号２、発明の名称
半導体薄膜の結晶化方法３、補正をする者
事件との関係 特許出願人
住所 東京部品用凶兆品用６丁目７番３５号名称（２１
８） ソニー株式会社
代表取締役 大 賀 典雄
５、補正命令の日付 昭和 年 月 日６、
補正により増加する発明の数
８、補正の内容
（１）特許請求の範囲を別紙の通り補正する。
（２）明細書中、第３頁２行「平滑化させるためであり
、」を「平滑化させるとともに、その消失を阻止するた
めのものであり、」と補正する。
（３） 同、第３貞８行「表面張力により」を「表面
張力により溶融した」と補正する。
（４）同、第４頁９行及び１１行、第４頁２０行〜第５
頁１行「半導体酸化物層」を「支持層」と補正する。
（５）同、第４頁１１〜１２行、第５負１〜２行及び３
〜４行「化学量論的に変化する」を「化学組成が連続的
に変化する」と補正する。
（６） 同、第７貢１４行［抑制することができる。
］の後に下記を追加する。
「また、上記実施例においては支持層としてＳｉＯ２ヲ
用イテレイティＳｉ ３Ｎ４ 、 ＳｉＣ等モ支ｎ層と
して用いることができる。」
以 上
特許請求の範囲
第１及び第２の支持層の間に半導体薄膜を挾み、該半導
体薄膜と上記第１及び／又は第２の支持層との間に化学
組成が連続的に変化する遷移層を形成し、該半導体薄膜
を加熱溶融して結晶化させることを特徴とする半導体薄
膜の結晶化方法。Figure 1 is a cross-sectional view of a substrate used in a conventional crystallization method, Figure 2 is a perspective view showing a crystallization method using a carbon heater, and Figures 3, 4, and 5 are from this book. FIG. 6, a cross-sectional view of the substrate used in the invention, is a diagram for explaining the transition layer of the substrate according to the invention. αO1α is StO2 layer, αQFi polycrystalline silicon thin film, αNo. Q and (a) are transition layers. Figure 1 1 Figure 2 Figure 3 Next q Figure 4 F 1 Figure 5 Doctor 6 Figure 8 B Procedural amendment (Mr. Chief Examiner of the Japan Patent Office) 1, Indication of the case Patent Application No. 81251 of 1981 2 , Title of the invention: Method for crystallizing semiconductor thin films 3, Relationship with the person making the amendment Patent applicant's address: Tokyo 6-7-35, Tokyo Parts and Omens Product Name (21
8) Norio Ohga, representative director of Sony Corporation, 5, date of amendment order: 6, 1939,
The number of inventions increased by the amendment to 8. Details of the amendment (1) The scope of claims will be amended as shown in the attached sheet. (2) In the specification, on page 3, line 2, "It is for smoothing," is amended to "It is for smoothing and preventing its disappearance." (3) In the same text, in line 3, line 8, ``due to surface tension'' is corrected to ``melted due to surface tension.'' (4) Same, page 4, lines 9 and 11, page 4, lines 20 to 5
In the first line of the page, "semiconductor oxide layer" is corrected to "support layer". (5) Same, page 4, lines 11-12, negative 5th lines 1-2 and 3
- In line 4, "changes stoichiometrically" is corrected to "chemical composition changes continuously." (6) Ibid., 7th Tribute, line 14 [Can be suppressed. ] Add the following after. "Also, in the above embodiments, SiO2, Si3N4, SiC, etc. can be used as a supporting layer as a support layer." sandwiching the semiconductor thin film and the first and/or second support layer, forming a transition layer in which the chemical composition changes continuously, and heating and melting the semiconductor thin film to crystallize it. Characteristic method for crystallizing semiconductor thin films.
Claims (1)
、該半導体薄膜と上記第１及び／又は第２の半導体酸化
物層との間に化学量論的に変化する遷移層を形成し、該
半導体薄膜を加熱溶融して結晶化させることを特徴とす
る半導体薄膜の結晶化方法。A semiconductor thin film is sandwiched between first and second semiconductor oxide layers, and a stoichiometrically varying transition layer is provided between the semiconductor thin film and the first and/or second semiconductor oxide layer. 1. A method for crystallizing a semiconductor thin film, the method comprising forming a semiconductor thin film, heating and melting the semiconductor thin film, and crystallizing the semiconductor thin film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58081251A JPH0614511B2 (en) | 1983-05-10 | 1983-05-10 | Crystallization method of semiconductor thin film |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58081251A JPH0614511B2 (en) | 1983-05-10 | 1983-05-10 | Crystallization method of semiconductor thin film |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59205713A true JPS59205713A (en) | 1984-11-21 |
| JPH0614511B2 JPH0614511B2 (en) | 1994-02-23 |
Family
ID=13741168
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58081251A Expired - Lifetime JPH0614511B2 (en) | 1983-05-10 | 1983-05-10 | Crystallization method of semiconductor thin film |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0614511B2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61248446A (en) * | 1985-04-25 | 1986-11-05 | Fujitsu Ltd | Semiconductor device |
| EP0202718A2 (en) * | 1985-05-22 | 1986-11-26 | Koninklijke Philips Electronics N.V. | A method of producing a semiconductor device comprising a monocrystalline silicon layer on a substrate |
| JPS62211936A (en) * | 1986-03-12 | 1987-09-17 | Fujitsu Ltd | Formation of interconnection layer |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5814529A (en) * | 1981-07-17 | 1983-01-27 | Fujitsu Ltd | Manufacture of semiconductor device |
-
1983
- 1983-05-10 JP JP58081251A patent/JPH0614511B2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5814529A (en) * | 1981-07-17 | 1983-01-27 | Fujitsu Ltd | Manufacture of semiconductor device |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61248446A (en) * | 1985-04-25 | 1986-11-05 | Fujitsu Ltd | Semiconductor device |
| EP0202718A2 (en) * | 1985-05-22 | 1986-11-26 | Koninklijke Philips Electronics N.V. | A method of producing a semiconductor device comprising a monocrystalline silicon layer on a substrate |
| JPS62211936A (en) * | 1986-03-12 | 1987-09-17 | Fujitsu Ltd | Formation of interconnection layer |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0614511B2 (en) | 1994-02-23 |
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