JPS59198728A - Fitting of electronic component parts - Google Patents
Fitting of electronic component partsInfo
- Publication number
- JPS59198728A JPS59198728A JP7350883A JP7350883A JPS59198728A JP S59198728 A JPS59198728 A JP S59198728A JP 7350883 A JP7350883 A JP 7350883A JP 7350883 A JP7350883 A JP 7350883A JP S59198728 A JPS59198728 A JP S59198728A
- Authority
- JP
- Japan
- Prior art keywords
- sealing agent
- heat
- substrate
- powder
- pads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
Abstract
Description
【発明の詳細な説明】
く技術分野〉
木発明は電子部品と基板との取付方法に関するものであ
る。[Detailed Description of the Invention] Technical Field The present invention relates to a method of attaching electronic components to a board.
〈従来技術〉
従来提案されている電子部品(LSI)と基板との一般
的な取付方法としては、たとえば半田バンプによるボン
ディング方法とAuバンプによるボンディング方法かあ
るが、前者は半田付時に250℃程度の高温に加熱し々
ければならないので、電子部品及び基板に悪影響を与え
るという問題があり、又カーボン等の半田付できない材
料で配線された回路基板には適用できないという欠点が
ある。また、後者の場合もボンディング時に450℃程
度加熱する必要があり、さらに基板上の電極パッドには
予めSnメッキを施しておく必要があるという問題があ
った。<Prior art> Conventionally proposed general methods for attaching an electronic component (LSI) and a board include, for example, a bonding method using solder bumps and a bonding method using Au bumps, but the former is soldered at approximately 250°C. Since the method must be heated to a high temperature, it has the problem of adversely affecting electronic components and boards, and it also has the disadvantage that it cannot be applied to circuit boards wired with materials that cannot be soldered, such as carbon. Further, in the latter case as well, there were problems in that it was necessary to heat the bonding process to about 450° C. and that the electrode pads on the substrate had to be previously plated with Sn.
く目的〉
本発明はかかる従来の問題点に鑑みて成されたもので、
基板材料や配線材料に関係なく低温で電子部品をボンデ
ィングしうる新規な電子部品の取付方法を提供するもの
である。Purpose> The present invention was made in view of such conventional problems, and
The present invention provides a new method for attaching electronic components that allows electronic components to be bonded at low temperatures regardless of substrate material or wiring material.
〈実施例〉 以下図にもとづbて木発明の詳細な説明する。<Example> The wooden invention will be explained in detail below based on the figures.
第1図は本発明方法によって基板に電子部品を取付た図
である。FIG. 1 is a diagram showing electronic components mounted on a board by the method of the present invention.
図において、lけ基板、2は基板上の配線、3は端子部
分にAfパッド4を施したLSIチップである。また、
5はヒートシール剤(又はホットタルト接着剤)を示し
、前記基板lとLSIチップ3はこのヒートシール剤に
よって結合されて層る。このヒートシール剤には予め導
電性の粒子6、たとえばAg、 A 11 % C%
Cu −、N i粉が混入されていて、しかも、これら
の粒子6t/′i、LSIチップのAlパッド4と基板
の配線2との間に集中させているo依って、LSIチッ
プ3はヒートシール剤5によって基板1に取付られ、し
かも該チップ端子と基板配線とは導電性の粒子6を介し
て電気的に接続される。In the figure, 1 is a substrate, 2 is wiring on the substrate, and 3 is an LSI chip with Af pads 4 provided on terminal portions. Also,
Reference numeral 5 indicates a heat sealing agent (or hot tart adhesive), and the substrate 1 and the LSI chip 3 are bonded and layered by this heat sealing agent. This heat sealing agent contains conductive particles 6, such as Ag, A 11% C%, in advance.
Cu-, Ni powder is mixed in, and these particles are concentrated between the Al pad 4 of the LSI chip 4 and the wiring 2 of the substrate at 6t/'i, so that the LSI chip 3 is heated. It is attached to the substrate 1 with a sealant 5, and the chip terminal and the substrate wiring are electrically connected via conductive particles 6.
第2図は上記ヒートシール剤による取付手順を示すもの
で、この図により今少し詳細に説明する。FIG. 2 shows the installation procedure using the heat sealing agent, and will be explained in more detail with reference to this figure.
捷ず、A?パッド4を具えたLSIウェハー7を150
℃程度に加熱しく図■)、その表面にヒートシール剤5
をローラにより20〜50μ程度にコートする(図■)
。次にコートシタヒートシール剤5の上に上記Alパッ
ド4に対向する部分を穿孔しでなるマスク8を載せ、そ
の穿孔内にAg粉6を散布したのち(図■)、加熱して
Ag粉6を沈降させる(図@)。そして、矢印の部分で
カッティングして(図■)、l’パッド4に対応する部
分にAg粉を集中させてなるヒートシール剤5を付けた
LSIチップ3を得る(図■)。Don't choose, A? 150 LSI wafers 7 equipped with pads 4
Heat to about ℃ (Figure ■) and apply heat sealant 5 on the surface.
Coat with a roller to a thickness of about 20 to 50μ (Figure ■)
. Next, a mask 8 made by perforating the part facing the Al pad 4 is placed on top of the coated heat sealant 5, and after scattering Ag powder 6 into the perforations (Fig. ■), the Ag powder is heated. 6 is allowed to settle (Figure @). Then, the LSI chip 3 is cut in the direction of the arrow (Fig. ■), and the LSI chip 3 is coated with a heat sealing agent 5 made of concentrated Ag powder in the portion corresponding to the l' pad 4 (Fig. ■).
このようにして得られたLSIチップ3はヒートシール
剤5を下にして基板1の配線2に当接り。The LSI chip 3 thus obtained is brought into contact with the wiring 2 of the substrate 1 with the heat sealant 5 facing down.
該LSIチップ3の上から150℃に加熱したコテを2
Q Kq/cl 加圧してボンディングする。A soldering iron heated to 150°C is placed over the LSI chip 3.
Q Kq/cl Pressurize and bond.
このような取付方法によれば、ヒートシール剤は所謂樹
脂性の接着剤であるから、基板材料や配線材料に関係な
く低温で電子部品を取付ることか出来、しかもヒートシ
ール剤には導電性の粒子か混入されて因るから電子部品
端子と基板配線とを電気的に結合することが出来る。According to this mounting method, since the heat sealant is a so-called resin adhesive, electronic components can be mounted at low temperatures regardless of the board material or wiring material. Because the particles are mixed in, it is possible to electrically connect electronic component terminals and board wiring.
以上の様に本発明方法は導電性の粒子を混入させたヒー
トシール剤を用いて電子部品と基板を結合するものであ
るから、150″C程度の低温の巾で、しかも基板材料
や配線材料に関係なく電子部品を取付ることが出来る。As described above, since the method of the present invention uses a heat sealing agent mixed with conductive particles to bond electronic components and a board, it can be bonded at a low temperature of about 150"C, and can be applied to board materials and wiring materials. Electronic components can be installed regardless of the
したがって、電子部品をどのような基板にも取付ること
が出来、又熱による悪影響を解消して信頼性の高いボン
ディングを行うことが出来る。Therefore, it is possible to attach electronic components to any substrate, and it is possible to perform highly reliable bonding by eliminating the adverse effects of heat.
第1図は本発明方法による電子部品と基板の取付状態を
示す図、@2図■〜Oは取付手順を説明する図である。
1は基板、 2は配線、 3はLSIチップ、4は
Alパッド、 5はヒートシール剤、 6は導電性
粒子。
代理人 弁理士 福 士 愛 彦(他2名)第1凶
■
;プ’、 2 i゛イlFIG. 1 is a diagram showing a state in which an electronic component and a board are attached by the method of the present invention, and Figures 2 to 2 are diagrams explaining the attachment procedure. 1 is a substrate, 2 is a wiring, 3 is an LSI chip, 4 is an Al pad, 5 is a heat sealing agent, and 6 is a conductive particle. Agent Patent attorney Aihiko Fukushi (and 2 other people) 1st person;
Claims (1)
を用いて電子部品を結合してなることを特徴とする電子
部品の取付方法。 2、上記ヒートシール剤中の導電性粒子を電子部品と基
板の端子間に集中させてなることを特徴とする特許請求
の範囲第1項に記載の電子部品の取付方法。[Scope of Claims] 1. A method for attaching electronic components, which comprises bonding electronic components onto a substrate using a heat sealing agent mixed with conductive particles. 2. The method of attaching an electronic component according to claim 1, wherein the conductive particles in the heat sealing agent are concentrated between the electronic component and the terminals of the board.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7350883A JPS59198728A (en) | 1983-04-25 | 1983-04-25 | Fitting of electronic component parts |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7350883A JPS59198728A (en) | 1983-04-25 | 1983-04-25 | Fitting of electronic component parts |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59198728A true JPS59198728A (en) | 1984-11-10 |
JPH0510824B2 JPH0510824B2 (en) | 1993-02-10 |
Family
ID=13520256
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7350883A Granted JPS59198728A (en) | 1983-04-25 | 1983-04-25 | Fitting of electronic component parts |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59198728A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5849607A (en) * | 1993-11-27 | 1998-12-15 | Samsung Electronics Co., Ltd. | Process for attaching a lead frame to a semiconductor chip |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5122367A (en) * | 1974-08-19 | 1976-02-23 | Suwa Seikosha Kk | Handotaisochino patsukeejihoho |
-
1983
- 1983-04-25 JP JP7350883A patent/JPS59198728A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5122367A (en) * | 1974-08-19 | 1976-02-23 | Suwa Seikosha Kk | Handotaisochino patsukeejihoho |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5849607A (en) * | 1993-11-27 | 1998-12-15 | Samsung Electronics Co., Ltd. | Process for attaching a lead frame to a semiconductor chip |
Also Published As
Publication number | Publication date |
---|---|
JPH0510824B2 (en) | 1993-02-10 |
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