JPS59188160A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To enable to reduce an area of a semiconductor integrated circuit device by employing an inverse transistor for transistors of a pair which form a differential amplifier. CONSTITUTION:Two inverse n-p-n type transitors Q1, Q2 in which the collectors and the emitters are inverse have a structure of p type region 8 to become bases, n<+> type region 9 to become collectors, and n type epitaxial layer 10 to become common emitter. Thus, the emitters of the Q1, Q2 are commonly used as the n type epitaxial layer, and the emitters can be accordingly formed in an insular region surrounded by the layer 3, and the area of the isolating layer to become a partition can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a semiconductor integrated circuit device having a differential amplifier circuit.

[Background technology]

As shown in FIG. 1, in a differential amplifier circuit used in an IC, a common emitter follower circuit Q3 is connected to two (pair) transistors Q1 and Q2, and when this is formed on one semiconductor substrate, As shown in Figure 2, for example, p-type S
1 substrate, an n-type buried layer 2, an isolation p-type layer 3, and a p-type region 5a, which is formed at a pace in epitaxial n-type S1 layers 4a and 4b which serve as collectors and are electrically isolated (isolated); 5b, and n+ type regions 6a and 6b, which serve as emitters, are formed at the interface of the p-layer region to form two forward direction npn transistors Q1. A structure is adopted in which Q2 is configured and these emitters are connected by an Al wiring or the like 7.

However, in the differential amplifier having the above structure, the base of each transistor is surrounded by the isolation p-type layer 3, so the area increases, and especially when the input is a signal from a logic circuit such as An input signal of about 200 mV or higher was required.

[Purpose of the invention]

The present invention has been made to eliminate the above-mentioned drawbacks, and aims to reduce the size and logic I2.
An object of the present invention is to provide a differential amplifier circuit device that can be directly connected from L.

[Summary of the invention]

A brief overview of typical inventions disclosed in this application is as follows.

That is, it is a semiconductor integrated circuit in which a common emitter follower circuit is connected to a differential amplifier circuit device consisting of a pair of transistors, in which reverse direction transistors are used as the transistors in the pair, and the emitter follower circuit conducts current in the forward direction. By configuring it so that it flows, it is possible to reduce the size when integrated on a semiconductor substrate, thereby achieving the above object.

[Example]

FIG. 3 shows a cross-sectional view of an embodiment in which a differential amplifier circuit device according to the present invention is formed on a semiconductor substrate.

In the figure, Q1 and Q2 are two inverse npn transistors with collectors and emitters reversed. For example, on the transistor Q1 side, 8 is a p-type region serving as a base, 9 is an n+ type region serving as a collector, and 10 is an n-type epitaxial layer serving as a common emitter. Q2
The sides also have a similar structure.

In such a structure, each emitter of Q1 and Q2 is n
Since it is shared as a type epitaxial layer, it can be formed in one island region surrounded by the isolation p-type layer 3, and the area of the isolation layer 3 which becomes a partition part is reduced compared to the conventional structure shown in FIG. Get a little bit less.

FIG. 4 shows a circuit including a semiconductor integrated circuit to which a common emitter follower circuit, eg, transistor Q3, is connected to a differential amplifier circuit device comprising two transistors Q1 and Q2 according to the present invention.

5 is a plan view of a semiconductor device modeling the portion surrounded by a broken line block in the circuit diagram of FIG. 4, and FIG. 6 is a cross-sectional view cut along the line A--A in FIG. 5.

two transistors Q1 constituting the differential amplifier circuit;
Q2 are inverse npn transistors each formed on a common emitter consisting of an n-type epitaxial layer 10.

In the figure, 8 is a pace p-type region, and 9 is a collector n+ type region. Transistor Q3 has the same n-type epitaxial layer 1
11 is a base p-type region, and 12 is an emitter n+-type region in a forward npn transistor with 0 as the collector. If the two transistors of the differential amplifier circuit are configured as forward transistors as in the past, they can be formed on one substrate only when they are separated by an isolation layer including the transistor Q3. In the present invention, these can be formed in one island region as shown in FIGS. 5 and 6, and some of the interconnections between the elements can be omitted, so that the area reduction effect is even greater.

FIG. 7 shows an example in which forward transistors Q4 and Q5 are respectively attached to two transistors Q1 and Q2 of a differential amplifier according to the present invention to form an IIL (Injection Integrated Logic) circuit. (2) Since the IL is originally an injector integrated with a pnp transistor and a reverse direction npn transistor that share a part, it is easy to connect the two.

FIG. 8 is an example of the circuit shown in FIG. 7 being modeled.

Since the injectors of Q2 are connected to each other, they can be formed as one injector p-type layer 13, and the base p-type layer 14 of the reverse direction npn transistor is opposed to this, and the collector n+-type region 15 on the base surface is connected to the output Out.
It can be extracted as 1,0ut2. This allows the differential amplifier to be operated directly from the logic IIL. Note that in the reverse direction transistor, the collector (n+
A plurality of mold regions 15 can be taken out.

FIG. 9 shows a pair of reverse direction transistors Q1, Q according to the invention.
An example of a case where IIL is combined with a differential amplifier circuit consisting of 2 is shown below.

FIG. 10 is a sectional view showing an example of a semiconductor device having an IIL and a forward transistor on a common substrate. In a reverse direction transistor, as a condition to increase β1 (reverse direction amplification factor), it is necessary to increase the impurity concentration on the emitter side across the emitter-collector junction. By introducing a P (phosphorus) impurity with a high diffusion rate into the layer 16 and causing the n+ type buried layer 16 to "rise" when the surface of the epitaxial n type layer 10 is long, the emitter concentration can be increased and β1 can be increased. can. Meanwhile, a forward transistor is formed. On the side, since the epitaxial n-type layer 10 is on the collector side, "rising" of the n+ type buried layer 17 is not necessary, and the n+ type buried layer 17 is formed only by grooving Sb (antimony), which has a conventional low diffusion rate. All you have to do is form it.

〔effect〕

According to the present invention described in the embodiments above, the following effects can be obtained.

(1) By using reverse direction transistors for the pair of transistors constituting the differential amplifier device, the emitters can be formed on a common substrate, and the area can be reduced.

(2) According to the above (1), the connection to the emitter follower circuit in the forward direction can be integrated, which is effective in reducing the area.

(3) A pair of reverse direction transistors is formed into an IIL by integrally combining pnp transistors, and a differential amplifier is obtained which is more effective in reducing the area and can be directly connected to the logic IIL. In addition, by converting it into an IIL, it is possible to connect with an open collector, and switching operation can be performed without a resistor.

(4) By using reverse direction transistors, several collectors can be used as outputs.

(5) The process for forming reverse direction transistors and forward direction transistors on one substrate has been established by IIL technology.

Although the invention made by the inventor has been specifically explained above based on examples, it is to be understood that the present invention is not limited to the above-mentioned examples, and can be modified in various ways without departing from the gist thereof. do not have.

[Application field]

The present invention can be applied to all semiconductor integrated circuit devices having a differential amplifier circuit consisting of a pair of transistors. Especially II
This is effective when applied to a differential amplifier circuit that needs to be directly connected to an L logic circuit.

[Brief explanation of the drawing]

FIG. 1 is a typical circuit diagram of a differential amplifier circuit. FIG. 2 is a sectional view showing an example of a conventional differential amplification semiconductor integrated circuit device. FIG. 3 is a sectional view showing an actual example of a differential amplification semiconductor integrated circuit device according to the present invention. FIG. 4 is a circuit diagram showing an application example of the differential amplifier circuit device according to the present invention, FIG. 5 is a plan view of a part of the circuit in FIG. 4 modeled into a semiconductor integrated circuit device, and FIG. Similarly, it is a sectional view taken along line AA in FIG. 5 of the semiconductor integrated circuit device. FIG. 7 is a circuit diagram showing an example in which an IIL is combined with the differential amplifier circuit device according to the present invention, and FIG. 8 is a cross-sectional view of FIG. 7 as a model. FIG. 9 is a circuit diagram showing another embodiment in which IIL is combined with the differential amplifier circuit according to the present invention, and FIG. 10 is a circuit diagram showing another embodiment in which a reverse direction transistor and a forward direction transistor are formed on a common semiconductor substrate. FIG. 2 is a cross-sectional view showing an example of a semiconductor structure. 1...p-type S1 substrate, 2...n+ type buried layer, 3...
・Isolation p-type layer, 4...Epitaxial n
Type Si layer, 5... Base p-type region, 6... Emitter n+ type region, 7... Al wiring, 8... Base p-type region, 9... Collector n-type region, 10... - N-type epitaxial layer, 11... Base p-type region, 12... Emitter n+-type region, 13... Injector p-type layer, 14...
...Pace p-type layer, 15...Collector n+ type region, 1
6.17...n+ type buried layer.

Claims (1)

[Claims] 1. A semiconductor integrated circuit in which a common emitter follower circuit is connected to a differential amplifier circuit comprising at least a pair of transistors, the pair of transistors being formed within a semiconductor substrate. 1. A semiconductor integrated circuit device comprising a reverse direction transistor. 2. The semiconductor integrated circuit device according to claim 1, wherein the reverse direction transistor and the emitter follower circuit are formed in the same semiconductor region within a semiconductor substrate. 3. A common forward emitter follower circuit is connected to a differential amplifier circuit device consisting of two reverse direction transistors, and is integrally connected to the collector of the forward direction transistor at the pace of the two reverse direction transistors. A semiconductor integrated circuit device characterized by: 4. The semiconductor integrated circuit device according to claim 3, wherein the two reverse direction transistors and the forward direction transistor connected to their paces are formed within the same semiconductor substrate.