JPS5886769A - Lateral p-n-p type transistor - Google Patents

Abstract

PURPOSE:To eliminate the loss of a collector current by growing an epitaxial layer on a semiconductor substrate having a buried layer, forming the layer in an insular shape with an insulation isolating region, and annularly forming the region of the same conductive type which is connected to a buried layer to the surface of a substrate when the layer is used as a base region, and using it as a base region. CONSTITUTION:An N<+> type buried layer 105 is diffused and formed on the surface layer of a P type Si substrate 107, an N type layer 104 is epitaxially grown on the overall surface which includes the layer 105, and is insulated and isolated in an insular shape via a P type region 106 which is contacted with the substrate. Then, when a P type emitter region 101 and a collector region 103 are diffused and formed in the layer 104 to become insular and a P type base region 102 is further formed, the same N<+> type region 109 to be intruded into the region 105 is annularly formed to the surface of the layer 104 while surrounding the regions 101 and 103, and the region 102 is disposed on the surface layer. In this manner, the reactive injection of holes to the substrate 107 and the region 106 is eliminated, hFE times of base current can be all produced as a collector current.

Description

[Detailed description of the invention] The present invention relates to a horizontal PNP transistor.

What are the bipolar transistors currently in use?

The NPN type is the main type due to the ease of manufacturing technology.

Level shift by mixing PNP type.

Phase inversion becomes easier, increasing the degree of freedom in design.

It becomes possible to simplify the circuit configuration. Furthermore, by using a PNP transistor as a load for an NPN transistor, there are many advantages such as a reduction in power consumption and an increase in integration density, so there is a tendency to actively utilize PNP transistors.

NPN) Under the transistor manufacturing process,
The collector is connected to the substrate as a PNP transistor that can be introduced without increasing the number of steps.

Vertical PNP transistors with emitter as output and horizontal PNP transistors with collector as output are known, but 411F except for special use uses horizontal PNP transistors.
Transistors are often used.

Figure 1 shows a cross-section of a vertical and horizontal PNP transistor □□□
Show tube.

A lateral PNP transistor is fabricated by simultaneously forming the emitter l and collector 3 using the base diffusion of nine conventional NPN transistors.

Further, an N0-type buried /1ii5 introduced for the purpose of reducing the collector resistance of the NPN transistor is provided close to the bottom surfaces of the emitter and collector. In the figure 2
is the N-type base, and 4 is the N-type base region.

6 is a P+ type insulation isolation region, and 7 is a P type semiconductor substrate.

Further, a negative bias 8 is applied to 6.

Here, the function of the N+ type buried layer in the PNP transistor will be explained. Since there is a B111t-in electric field from the N+ buried layer toward the base at the boundary between the base and the N+ buried layer, holes injected in the vertical direction are blocked by this electric field and flow into the N+ buried layer. I can't get into it. Therefore, the N+ type buried layer plays the role of reducing ineffective injection of holes in the vertical direction.

In bipolar integrated circuits, the substrate is negatively biased.
Since it is customary to use a voltage applied, if there is no N-type buried layer, the N-P junction between the base and the substrate will be reverse biased, and most of the holes injected in the vertical direction will be directed to the substrate. It flows into me. In other words, horizontal PNP)? Along with the operation of the transistor, the operation of the vertical PNP) and seven transistors also occurs. Therefore +JHlf PNP)? In order to operate only the transistor, the junction between the N-type base region and the P-type substrate should be eliminated. That is, it may be formed so as to be in contact with the N+ type buried layer or the insulation isolation region. However, as shown in FIG. 1, the commonly used horizontal PNP transistor does not have the above structure.

This is because if the N-type buried layer 5 and the insulation isolation region 6 were in contact with each other, the junction capacitance between the base 2 and the substrate 7 would increase significantly, and the withstand voltage between the base and the substrate would be extremely reduced. 1. A certain amount of space is required between the two. Therefore, in a horizontal (NP) transistor with such a structure, all of the current flowing from the emitter to the base (hFg times) does not flow to the collector, but partially flows into the substrate through the gap between the N+ type buried layer and the insulation isolation region. .

A desired collector current could not be obtained in the collector 3. Furthermore, since current flows into the substrate, the potential of the substrate is increased, which has the disadvantage of destabilizing the operation of nearby transistors. Furthermore, if the isolation region 6 and the emitter 1 are close to each other, there is a risk that a PNP transistor will operate with the collector 6, so it is necessary to provide a sufficient distance between the isolation region and the emitter.

This makes it difficult to reduce the size of the device.

The present invention has been made in view of the above disadvantages.

This provides a stable lateral PNP transistor that eliminates collector current loss.

The present invention is characterized by a P-type semiconductor substrate, a highly impurity-concentrated N-type semiconductor first region formed on the P-type child conductor substrate, and a region in contact with the N-type semiconductor first region and the P-type semiconductor substrate. A second N-type semiconductor region formed in the N-type semiconductor second region, and a P-type semiconductor region formed in the second N-type semiconductor region so as to be separated from each other.
a P-type semiconductor first region and a P-type semiconductor second region;
The second N-type semiconductor region is the base, the first P-type semiconductor region is the emitter, the second P-type semiconductor region is the collector, and the width is f.
In the JIPNP transistor, in the N-type semiconductor second region, surrounding the P-type semiconductor first and second fjl regions,
Moreover, the present invention is a lateral PNP transistor in which a third N-type semiconductor region with a high impurity concentration is formed so as to be in contact with the first N-type semiconductor region.

EXAMPLES The present invention will be specifically described below with reference to Examples.

FIG. 2(at) is a sectional view of a lateral PNP transistor showing an embodiment of the present invention, and FIG. 2(b) is a plan view thereof.

In FIG. 2(a), 101, 102, and 103 are horizontal PNPs in the present invention)? emitter, base,
It shows a collector, 104 is a base region, 105 is an N-type buried layer, 106 is a P-type isolation region, 107 is a FiP
Type board meeting is shown. Further, a negative bias 10B is applied to 106. The difference from the conventional PNP transistor is that the N
Since the +-type impurity 109 is diffused to reach the N+-type buried layer 105, the N+-type impurity 109 functions similarly to the N+-type buried layer in the operation of a lateral PNP transistor.

That is, the electric field between the base region 104 and the N+ impurity 109 has a built-in electric field directed from the N+ type impurity toward the base.
Since the electric field exists, the holes are prevented from being ineffectively injected into the substrate 107 and the isolation region 106 by the electric field.
It can be completely eliminated.

Therefore, it is possible to extract all hFE times the base current as a collector current, and a desired output can be obtained from the collector 103.

Furthermore, in a process in which an N+ type impurity such as 109 is introduced for the purpose of reducing the collector resistance of a normal PNP transistor, the lateral PNP transistor of the present invention can be formed without increasing the number of process steps. be able to.

As explained above, the lateral PNP transistor of the present invention provides stable PNP transistor operation. In addition, since it is mixed with NPN) transistors, etc., it becomes possible to utilize the functions of PNP) transistors to the maximum extent, which has a great effect.

[Brief explanation of drawings]

FIG. 1 is a sectional view of a conventional lateral PNP transistor integrated, and FIGS. 2(a) and 2(b) are a sectional view and a plan view showing an embodiment of the lateral PNP transistor of the present invention, respectively. be. In the figure, l, 101, 101'...
Group/emitter, 2,102...Base, 3,1
03,103'...Ya...Collector, 4,104...
Group NW epitaxial layer (base region), 5,105
...N+ type buried layer, 6゜106...PaP
Type separation area, 7,107...P type substrate, 8
, 108... Negative bias voltage, 109°10
9'...N native impurity. Figure 2 (t))

Claims (1)

[Claims] A P-type semiconductor substrate, a highly impurity @I N-type semiconductor first region completely formed in the P-type semiconductor substrate, and a first N-type semiconductor region formed in the P-type semiconductor substrate soil.
and an N-type semiconductor second region formed so as to be in contact with the P-type semiconductor substrate. The second N-type semiconductor region includes a first P-type semiconductor region and a second P-type semiconductor region formed to be separated from each other, and the second N-type semiconductor region is used as a base, and the first P-type semiconductor region is formed as a base. In a lateral PNP transistor in which the region is an emitter and the P-type semiconductor second region is a collector, the N-type semiconductor @2 region is used. surrounding the P-type semiconductor first and second regions; Moreover, the horizontal a! ! PNP) syndista.