JPS63288055A - Semiconductor device - Google Patents

Abstract

PURPOSE:To improve the emitter grounding current amplification factor (hfe) and frequency characteristics of an I<2>L as a logic element without damaging the breakdown strength of a linear element by forming a first buried layer, to which antimony is diffused, and shaping a second buried layer, which is in contact with a base region in a composed multi-collector transistor and to which arsenic is diffused. CONSTITUTION:An epitaxial layer 30 is grown, and a base region 60, an emitter region 90 in an injector transistor and a base region 100 in a multi-collector transistor are formed simultaneously through the diffusion of boron. First and second buried layers 120, 130 are shaped respectively to both elements. The buried layers are shaped by introducing an N<+> type impurity into a substrate 10 through deposition or ion implantation before epitaxial growth, but antimony is used as the diffusion impurity of the first buried layer 120, and arsenic having a diffusion coefficient larger than antimony is employed as the diffusion impurity of the second buried layer 130. Difference is shaped among both buried layers in the quantities of swelling at the time of epitaxial growth, and the layer thickness of the second buried layer 130 is made thicker than that of the first buried layer 120.

Description

[Detailed Description of the Invention] <Industrial Application Field> The present invention relates to a vertical transistor of ii1 as a linear element and a 12L (Integr) transistor as a logic element.
The present invention relates to a semiconductor device in which two types of Injection Logic (Injection Logic) are formed on the same semiconductor substrate.

<Conventional technology> T2L can be manufactured in the same manufacturing process as bipolar transistors, can operate at high speed with low power consumption, and has a structure that allows for high integration. A semiconductor device is known in which an analog signal section that requires high-voltage driving, such as a semiconductor section, is constructed from ordinary vertical transistors. FIG. 2 shows the conventional structure of such a semiconductor device.

In the figure, epitaxial Fii3a and Fii3b formed on a common P-type semiconductor substrate 1 and separated by an isolation N2 include a normal vertical transistor 4 as a linear element and a logic element 12 as a logic element.
L5 is formed.

The vertical transistor 4 has a base region 6 and an emitter region 7.
It is composed of an epitaxial layer N3a serving as a collector region, and a collector contact region 8 provided for forming an ohmink contact. On the other hand, l2L5
are the emitter region 9 of the lateral pnp injector transistor, the base region lO of the vertical npn multi-collector transistor operating in the opposite direction, and its collector region 11.
．． It consists of 11. and epitaxial layer 3
The bottoms of a and 3b contain the same impurity, for example sb
Buried N12a and 12b in which antimony (antimony) or arsenic (arsenic) is diffused are provided.

<Problems to be solved by the invention> In a normal vertical transistor 4 as a linear element, in order to lower the conductivity of the epitaxial layer H3a which is the collector region, the impurity concentration during epitaxial growth is lowered and the buried layer 12a is formed. By selecting an impurity with a small diffusion coefficient as the impurity to be diffused into the semiconductor device, the thickness of the buried layer can be reduced and the depletion layer at the base/collector junction can be extended to a large extent, thereby achieving a high breakdown voltage. Therefore, since the conductivity of the epitaxial layer 3b, which is the emitter region of the vertical npn multi-collector transistor 12L5, is the same as that of the epitaxial layer 3a, it is necessarily low, and the common emitter current amplification factor hf of the multi-collector transistor is
As e decreases, the frequency characteristics deteriorate.

<Means for solving the problem> A first buried layer in which antimony is diffused is provided below the vertical transistor as a linear element, and a multi-collector transistor constituting the 12L as a logic element is provided. A second buried layer in which arsenic was diffused was provided in contact with the base region of the substrate.

<Function> Since antimony has a small diffusion coefficient and does not rise up much during epitaxial growth, the first buried layer is formed thinly, and by setting the epitaxial layer concentration low, a high breakdown voltage of the vertical transistor is ensured. On the other hand, I2L
The second buried eyebrow on the side is formed by the diffusion of arsenic, which has a larger diffusion coefficient than antimony and is more likely to spring up during epitaxial growth, and its rr1 thickness is large and it is in contact with the base region of the multi-collector transistor, so the epitaxial rM'llr hfe improves regardless of the temperature.

<Example> FIG. 1 is a sectional view showing an embodiment of the present invention.

The N-type epitaxial layer 30 grown on the P-type semiconductor substrate 10 is formed by the P-type isolation four layer 20.
, 30b, each of which has a vertical npn transistor 40 as a linear element and an l2L50 as a logic element. npn transistor 4
0 is a P-type base region 60, an N-type emitter region 70
and a collector contact region 80, while 1
2L50 consists of an emitter region 90 of a lateral pnp injector transistor, a base region 100 and a collector region 110 of a reverse multi-collector transistor. Of these regions, the base region 60, the emitter region 90 of the injector transistor, and the base region 100 of the multi-collector transistor are formed simultaneously by boron diffusion after the epitaxial layer 30 is grown. The pixel elements each have a first buried layer 120 and a second buried layer 120.
, 130 are provided. These buried layers are formed by introducing Nx-type impurities into the substrate 10 by depositing or ion implantation during epitaxial growth, but in the present invention, antimony is used as the diffusion impurity in the first buried layer 120, and the second buried layer 120 is filled with antimony. rF113
Arsenic, which has a larger diffusion coefficient than antimony, is used as the zero diffusion impurity.

Therefore, there is a difference in the amount of upwelling during epitaxial growth between the two buried layers, and the layer thickness of the second buried Fi 130 is thicker than that of the first buried Jii 120. Phosphorus (P) is known as an N-type impurity that is used in normal bipolar processes and has a higher diffusion coefficient than antimony, but it gasifies during epitaxial growth and penetrates into the entire epitaxial layer. This is not preferable as a buried impurity because it causes autodoping that makes the concentration of the filtrate different from the set value.

<Effects of the Invention> In a semiconductor device in which a linear element and 12L are formed on the same semiconductor substrate, the hfe and frequency characteristics of 121 as a logic element can be improved without impairing the breakdown voltage of the linear element.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing an embodiment of the present invention, and FIG. 2 is a sectional view showing a conventional example. 20...Isolation'R530a, 30b
...Epitaxial layer, 40...Vertical transistor, 50...I2L, 100...Base region of multi-collector transistor, 120...First
Embedded layer, 130...Second embedded stone.

Claims (1)

[Claims] (1) A vertical transistor is formed on one side of the epitaxial layer separated by an isolation layer, and an I^2L transistor is formed on the other side.
In the semiconductor device formed with the above structure, a first buried layer in which antimony is diffused is provided below the vertical transistor, and a second buried layer in which arsenic is diffused is provided in contact with the base region of the multi-collector transistor constituting I^2L. A semiconductor device characterized in that: