JPS5917774A - Solid-state image pickup device - Google Patents

Abstract

PURPOSE:To attain a high resolution, by making the product of the resistance between adjacent picture elements of a photoelectric converting film which includes an amorphous Si layer containing hydrogen and consists of two blocking layers, and the capacity of a unit picture element, >= one frame period. CONSTITUTION:An Si layer 9 consisting essentially of an amorphous Si containing hydrogen and blocking layers 8a and 8b having a forbidden energy band width wider than the Si layer 9 form the photoelectric converting film. When the product between the resistance between adjacent picture elements of this photoelectric converting film and the capacity of a unit picture element is made sufficiently >= one frame period, a high resolution is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a solid-state imaging device that is a photoelectric conversion section of a television camera.

Conventional configurations and their problems Solid-state imaging devices have shown rapid development along with advances in integrated circuit technology, and recently, devices with a practical number of picture elements (approximately 2Q million) for single-chip color cameras have been realized. It became so. On the other hand, improvements have been made in terms of performance, and in particular, solid-state imaging devices in which a photoconductive film is laminated on a Si substrate with a scanning function have features such as high sensitivity and little blooming, and are comparable to image pickup tubes. This is a potential suitable device. As such a device, for example, Japanese Patent Application Laid-Open No. 54-10363
゜ and JP-A-65-39404.

In order to realize such a photoconductive film stacked solid-state imaging device, it is essential to develop a film that has an excellent photoelectric conversion function, similar to the development of an St 2 substrate that has an excellent scanning function. In the known example, a heterojunction film of an n-Vl group compound, an amorphous qJf 3 i film, or the like is used as the photoconductive film. These photoconductive films must not only have high sensitivity but also have a sufficiently high resistance so as to have a function of accumulating signal charges and to prevent resolution deterioration.

JP-A-55-39404 attempts to increase resistance by controlling hydrogen in amorphous Si, introducing impurities, and inserting a thin insulating layer. (-However, if amorphous Si is made to have a high resistance using the method described above, it tends to cause an operating voltage of !i, while crystalline Si
Impurities are added to form a p-1-n structure, and it is mainly used in solar cells, etc., but it has low dark current and can operate at low voltages, but because the resistance of the n-layer and p-layer is low. 1, which had the disadvantage of reduced resolution,
It has been reported that an electrophotographic photoreceptor uses a high-resistance layer with a large band gap on both sides of amorphous silicon (Japanese Patent Application Laid-open No. 179152/1983), and in the case of an electrophotographic photoreceptor, a withstand voltage of several hundred V is reported. The storage time required is long, several seconds or more. That is, the performance of similar structures differs significantly.

OBJECTS OF THE INVENTION The present invention relates to a solid-state imaging device using amorphous silicon as a photoelectric conversion film, which was devised to eliminate the above-mentioned drawbacks. It is characterized by having high resolution.

In other words, the solid-state imaging device of the present invention includes a photoelectric conversion film, a diode region within a unit pixel that accumulates charges obtained by irradiating the photoelectric conversion film with light, and a device that sequentially selects the charges and transfers them to the outside. a reading scanning circuit, the photoelectric conversion film includes an i-layer containing at least a compound containing hydrogenated amorphous silicon, and a blocking layer is provided on one or both main surfaces of the same layer. and the product of the resistance between adjacent picture elements of the photoelectric conversion film and the capacitance of a unit picture element is greater than one frame period.

DESCRIPTION OF EMBODIMENTS FIG. 1 shows a cross-sectional view of a unit pixel of a solid-state imaging device according to an embodiment of the present invention. In this embodiment, a charge-coupled device (hereinafter referred to as COD) is used as the scanning function, but this is not limited to COD, and a packet brigade device (Backet Brig device) is used as the scanning function.
It is not a matter of course that it may be an ade device) or a MOS matrix type element.

In FIG. 1, 1 is a p-type S1 substrate, and 2 is an n-type region, which together with the p-type Si substrate 1 form a diode. 3ken
- type area and is a buried type channel. 4
is an insulating film under the read gate electrode 6. Game】・
The electrode 6 serves both a reading operation and a transfer operation, and its function changes depending on the pulse height as described later. 6 is an insulator made of low-melting point glass, etc., and only a part of the n1 type region 2 is open. 3 and 7 are collection electrodes for photoexcited carriers made of Mo, Ta, Aρ, etc., and are connected between the picture elements. For isolation, an n'' type region 2 formed in a molybdenum shape is electrically connected.

8a, 9, and 8b are photoelectric conversion films according to the present invention. 8a is a blocking layer having a wider band gap than amorphous Si, and is made of, for example, silicon carbide, silicon oxide, silicon nitride, or a mixture thereof. 9 is an i-layer mainly composed of amorphous silicon containing hydrogen, and 8b is a blocking layer having a wider forbidden band width than the first layer 9, such as silicon carbide, silicon oxide, silicon nitride, or a mixture thereof. 1310 is a transparent electrode, and 11 is incident light. Reference numeral 12 denotes an external power source for applying an optimum voltage to the photoelectric conversion film.

Next, the operation of the solid-state imaging device having the above configuration will be explained. FIG. 2 shows a planar configuration of the solid-state imaging device shown in FIG. FIGS. 3(a) and 3(b) show the driving pulse waveform of the same device and the potential change of the n4 type region 2 when there is incident light. First, carriers generated by light in the first field are collected on the electrode 7. When a read pulse VCH is applied to the gate electrode 6, the n-type region 2 becomes VCH-VT (here, vT is the threshold voltage of the transistor consisting of the male region 2, the male region 3, and the gate electrode 6). In order to be charged to n-region 3, the signal charge is
will be moved to

Reference numerals 13a and 13b are barrier portions formed by implanting ions of phosphorus or the like in order to perform a transfer operation.

In vertical transfer, a potential gradient is formed by sequentially applying pulses v7 to gate electrodes 5 and 5', and sequential transfer can be performed in the /ζ direction shown by arrow 14. In the second field, the charges collected in the n-region 2' can be read out in a similar manner.

Next, a method for manufacturing the solid-state imaging device will be described. A-type region 2 is formed by diffusing p and the like into p-type Si substrate 1 by thermal diffusion or the like. The buried channel 3 in the n-type region is formed by ion implantation of p or As. Furthermore, a gate oxide film 4 is formed on the surface of the p-type Si substrate 1.
After that, a gate electrode 6 is formed using POpy-3i or the like. Thereafter, the insulating layer 6 is formed, but after opening a part of the male-type region 2, melt flow is performed to reduce the step difference, so a low melting point material such as phosphorus oxide glass is preferably used. After forming the insulating layer 6, AI, Mo.

A first electrode 7 for charge collection is formed from W, Ta, Cr, or the like. This first electrode is formed in a mosaic shape to separate picture elements.

The above is the method for forming the scanning (b) tread portion.

After that, the blocking layer 8b is formed, and methods for doing so include a glow method and a sputtering method. For example, when using the glow method, hydrogen and Ar
Alternatively, using a mixture of these gases as a carrier gas, a mixture of appropriate amounts of silane SiH4 and CH3 is introduced into the chamber, and a glow discharge is generated, resulting in blocking with a wider forbidden band width than that of ordinary amorphous St. Amorphous silicon carbide as a layer is obtained. When creating amorphous silicon nitride, use NH instead of CH3.
3. It is still sufficient to use a large amount of N2 as a mixed gas.As an n-type impurity, it is sufficient to mix an appropriate amount of PH3. However, the resistance of this blocking layer 8b must not be too low or too high. This is because, if it is too low, leakage occurs in the lateral direction of the pixel electrode 7, resulting in a decrease in resolution.

On the other hand, if the voltage is too high, the applied voltage will be applied only to the blocking layer 8a, and no applied voltage will be applied to the first layer 9, resulting in a decrease in sensitivity. This may cause inconveniences such as loss of sex. The blocking layer 8a is 109.0+ from the above point of view.
A range of 4 Ω-m is desirable. Also, the film thickness is 2
0 to 1000 people is a practical range.

The above manufacturing method was described using a glow discharge method, but as long as the above resistance is maintained, any manufacturing method may be used. By performing sputtering in an atmosphere containing B2H6 gas as a base, amorphous silicon nitride or amorphous silicon carbide and an amorphous oxide film can be obtained.

Next, a method of forming one layer 9 will be described. The first layer 9 has an important function of controlling photoelectric conversion, and has the function of exciting photocarriers and transporting them. If the traveling function (ie, mobility) of the first layer 9 is poor, photoexcited carriers cannot reach the electrodes, resulting in a decrease in sensitivity. Alternatively, in order to obtain sufficient sensitivity, a high applied voltage is required. Methods for forming hydrogen-containing amorphous silicon include the glow discharge method and the sputtering method, as in the case of the blocking layer 8a, but the film created by the glow discharge method has greater mobility and It is effective for low-voltage operation because it produces good junctions with less damage. The manufacturing method requires, for example, a substrate temperature of 150 to 300°C.
It is obtained by performing glow discharge in SiH4 and its N2 or Ar diluted gas at 0.1 to I Torr. The thickness of the first layer 9 is important as it is related to capacity and running function, but 0.5 to 6 μm is a practical range from the viewpoint of manufacturability and characteristics.

The method for manufacturing the blocking layer 8b is basically the same as the method for manufacturing the blocking layer 8a. However, the blocking layer 8b
is preferably p-type, and in that case, B2H6 or the like may be added as an impurity. The resistance of the blocking layer 8b has no lower limit as long as it is 10<14>Ω-(7) or less. In addition, the film thickness is within a practical range of 2Q to i ooo, similar to the blocking layer 8a, with the lower limit being that it has an electrical blocking function, and the upper limit being that the applied voltage does not increase and sensitivity decreases due to light absorption in the blocking layer 8b. It suffices as long as it is within the range. Further, if the first layer 9 forms a barrier to electrons, the blocking layer 8b is not necessarily necessary.

Effects of the Invention Next, the effects of the solid-state imaging device of the present invention will be explained. As an example, consider a solid-state imaging plate that is compatible with a % inch optical system. In order to configure a color camera with one chip, it is sufficient to form color filters corresponding to red, green, and blue on each unit pixel, but in order to obtain sufficient resolution, usually 200,000 pixels are required. is necessary. Converted to unit pixel size: 14μ vertically
m, and the width is 24 μm. The first electrodes for picture elements have a mosaic shape, and the distance between the first electrodes is about 3 μm, and a case will be considered in which 100 blocking layers sa and sb are formed as photoelectric conversion films, and each layer 9 has a thickness of 1 μm. The pixel capacitance C is almost one layer 9 thick, and its value is about 2.3
10='Forad/cell. On the other hand, the resistance R0 between adjacent picture elements is expressed by equation (1).

Flood R = p
W is the length of the first electrode (21 μm), and d is the film thickness. As for the value of d, the resistance Rba of the blocking layer 8a is 1.
If the resistance R of the layer 9 is lower, the value of the blocking layer 8a may be entered, and conversely, if Rba>R1, the value of the blocking layer 8a may be entered.
Just enter the value.

FIG. 4 shows the limit resolution when films with various specific resistances of the single layer 9 and the blocking layer 8a were prepared. 1st layer 9 is R
If the blocking layer 8a is Ri>Rba, there will be no decrease in resolution if the resistivity is 108Ω-(7) or higher. . Although the specific cases of the photoelectric conversion film and the scanning device have been described above, the present invention is not limited to this, and the resistance Rc between adjacent picture elements is
The product of the volume C of the unit picture element and the volume C of the unit picture element is one frame period (33m5e
If it is sufficiently larger than c), high resolution can be obtained in exactly the same way.

Furthermore, the present invention is characterized by high resolution and low voltage operation. FIG. 5 shows the dependence of photocurrent on applied voltage. In the present invention, the resistance value of the blocking layer is optimally selected, and the i-layer is made of amorphous silicon produced by the glow method, which has an excellent running function, so that the photocurrent is saturated at 1<1> or less. On the other hand, if an insulator is used for the blocking layer or amorphous silicon formed by sputtering is used for the i-layer, the dark current can be reduced, but the operating voltage will increase. Such an increase in operating voltage places a large burden on the scanning circuit side, such as increasing the withstand voltage.

As mentioned above, the solid-state imaging device of the present invention has high resolution and a large operating voltage tolerance, which is in line with the high sensitivity and low blooming characteristics that are the inherent characteristics of the photoconductive film stacked solid-state imaging device. It can be said that its industrial significance is extremely large.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of a unit pixel of a solid-state imaging device according to an embodiment of the present invention, FIG. 2 is a plan view for explaining the signal processing operation of the solid-state imaging device, and FIG. 3(a), Φ ) are diagrams showing the drive pulse and diode potential of the same solid-state imaging device, Figure 4 is a diagram showing the dependence of the vertical limit resolution on the specific resistance of the photoelectric conversion film in the same solid-state imaging device, and Figure 5 is a diagram showing the dependence of the photoelectric conversion film on the specific resistance of the solid-state imaging device. FIG. 3 is a diagram showing the dependence of photocurrent on applied voltage in the photoelectric conversion film of the device. 1...p-type Si substrate, 3...n-type region, 8a. 8b...Blocking layer, 9...Hydrogen-containing amorphous St layer. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2 Figure 3

Claims (2)

[Claims] (1) A photoelectric conversion film, a diode region within a unit picture element that accumulates charges obtained by irradiating the charge conversion film with light, and a scanning circuit that sequentially selects and reads out the charges to the outside; The photoelectric conversion film includes an i-layer containing at least a compound containing hydrogenated amorphous silicon, has a blocking layer on one or both main surfaces of the i-layer, and has a blocking layer adjacent to the photoelectric conversion film. A solid-state imaging device characterized in that the product of the resistance between picture elements and the capacitance of a unit picture element is greater than one frame period. (2) The blocking layer of the photoelectric conversion film is carbon or nitrogen. Amorphous silicon compound si1. containing at least one element of oxygen. ．． ．． 0XHy, Si, -x-yNx
H. The solid-state imaging device according to claim 1, characterized in that S 11 □−y○xHy (where o<'x, y<1).