JPS6292365A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To prevent the deterioration and color mixture of resolution by isolating semiconductor elements from one another by an insulating isolation layer in which the resistance of one part of an amorphous silicon layer is increased by implanted ions. CONSTITUTION:A photodiode 2 consisting of a p-type amorphous silicon p-layer 20 and an i-type amorphous silicon i-layer 22 laminated onto a MOS scanning circuit substrate 1 stores photo-charges corresponding to incident beams, thus constituting one-dimensional or two-dimentional photosensitive cell array. Base electrodes 24 are arranged at intervals between the i-layer 22 and the substrate 1. The base electrodes 24 are electrodes of every photosensitive cell for the diode 2. A transparent electrode layer 26 is laminated onto the upper surface of the p-layer 20, and shielding layers 28 for shielding light are laminated mutually at intervals on the upper surface of the layer 26. Insulating isolation layers 200 for insulating and isolating picture elements are formed to the p-layer 20 and the i-layer 22. The insulating isolation layers 200 are shaped by implanting the ions of atoms of oxygen or nitrogen or the like to the p-layer 20 and the i-layer 22 and annealing.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a stacked solid-state imaging device using an amorphous conductor and a method of manufacturing the same.

BACKGROUND ART Solid-state imaging devices in which a photodiode, which generates and accumulates charge in response to incident light, is formed from an amorphous semiconductor have a lower light absorption coefficient than those using a crystalline semiconductor. Due to its large size, it is possible to absorb light in a thin layer,
From this point of view, it is suitable for manufacturing fine pixels for high resolution.

5. Furthermore, in a solid-state imaging device RT whose photosensitive means is a photodiode made of amorphous silicon laminated on an R1 crystalline substrate, charge transfer can be performed in the crystalline part of the substrate, so the area usable for the photodiode is reduced. It can be made large,
It has the advantage of increasing the aperture ratio, but on the other hand, the disadvantage is that intrinsic amorphous silicon (i-type) that is not doped with impurities has a low resistivity of approximately 108ΩCl11, so it is difficult to The directional resistance is lowered, and the charges generated and accumulated by the incident light are diffused into the amorphous silicon layer of other adjacent pixels or moved by the horizontal component of the electric field, which allows cells to be miniaturized and the resolution to be extremely high. It deteriorates, and in the case of a color imaging device, color mixture occurs.

In order to prevent such degradation of resolution and color mixture, it is possible to separate pixels in the amorphous silicon layer using an insulating layer with a trench-type structure, but this increases the number of manufacturing steps due to microfabrication and causes unevenness. , it is necessary to flatten this, which lowers the yield and increases the cost.

In addition, by doping the photoconductive layer with B or the like, the amorphous silicon (a-9iH) layer is made into an i-type semiconductor (intrinsic semiconductor), and when the resistance is increased, the mobility of accumulated charges and/or carriers is increased. Since the lifetime decreases, resolution deterioration and color mixing can be prevented, but at the same time, there are disadvantages such as a decrease in vertical charge mobility and/or carrier lifetime, and an increase in trap density, resulting in decreased sensitivity and increased afterimages. be.

Purpose The present invention eliminates the drawbacks of the prior art, ensures separation between pixels in a 1-4 body imaging device using an amorphous semiconductor layer, prevents deterioration of resolution and color mixture, and An object of the present invention is to provide a solid-state imaging device that does not cause a decrease in sensitivity, an increase in afterimages, etc., and a method for manufacturing the same.

DISCLOSURE OF THE INVENTION According to the present invention, in a conductor device formed including an amorphous silicon layer on one main surface of a semiconductor substrate,
Semiconductor elements are separated by an insulating separation layer whose resistance is made high by ions into which a portion of an amorphous silicon layer is implanted.

This semiconductor device is manufactured by the following method. That is, this method includes a step of forming an amorphous silicon layer on one main surface of a conductor substrate, and a step of implanting ions into a part of the amorphous silicon layer to form an insulating separation layer. It is something.

DESCRIPTION OF EMBODIMENTS Next, embodiments of a solid-state imaging device and a manufacturing method thereof according to the present invention will be described in detail with reference to the accompanying drawings.

Figure i1 shows a cross-sectional view of a solid-state imaging device to which the present invention is applied.

A photodiode 2 consisting of nine layers 20 of p-type amorphous silicon and one layer 22 of i-type amorphous silicon stacked on a MOS scanning circuit board l accumulates photocharges according to incident light. It constitutes a one-dimensional or two-dimensional photosensitive cell array. A base electrode 24 is arranged at intervals between the first layer 22 and the MO3O3 scanning circuit board, and this base electrode 24 serves as an electrode for each photosensitive cell of the photodiode 2 constituted by the second layer 20 and the first layer 22. It is. A transparent electrode layer 26 is laminated on the upper surface of the nine layers 20, and shield layers 28 for shielding light are laminated on two sides of the transparent electrode layer 26 at intervals.

An insulating isolation layer 200 for insulating isolation between pixels is formed in the second layer 20 and the first layer 22. This insulating separation layer 200 is made of ion-implanted gummage and implanted zero.
, 5in2. by combining a part of N etc. with Si. Si
3N4 or the like, and are formed by ion-implanting atoms such as oxygen (0) or nitrogen (N) into the nine layers 20 and one layer 22 made of amorphous silicon by rare-annealing, as will be described later.

9 layer 20 is a-9iH1a-Ge doped with boron.
It is formed from SiH. The first layer 22 is non-doped or a-SiHla-GeSi doped with a minute amount of boron.
Formed by H.

The transparent electrode layer 28 is made of ITO, InO, 5n02, or the like. The shield layer 28 is A1. Al-5
i-Gu, Al-9i, Or, Ti, No,
It is formed of metal such as W, and is used to separate each pixel, so it can be omitted.

In FIG. 1, a NOS scanning circuit board 1 includes two n small regions 12 and 1 on one main surface of a p-type silicon substrate 10.
4 is formed. A gate electrode 1 is formed on the substrate surface between the two n small regions 12 and 14 via a gate hs film 16.
8 are arranged. Gate electrode 18 is advantageously made of polycrystalline silicon. These two n small regions 12 and 14, the Go+1 film 16. A transistor (NO3) or FET is formed by the gate voltage pjlB. In this example, it is an n-channel FET, and the n small region 12 functions as a source, and the n+ region 14 functions as a drain. A source electrode 120 is connected to the n small region 12, and the source electrode 120 is connected to the base electrode 24. Further, a signal readout electrode 140 is connected to the n+ region 14.

Furthermore, an insulating layer 110 of S r 02 is formed in the n small region 12.14 of the silicon substrate IO, a portion where the gate electrode 18 is not formed, and on this insulating layer 110, a PSG
An insulating layer 130 is formed. This insulating layer 130,
An insulating layer 150 of PSG, 5102 or polyimide is provided on the source electrode 120 and the signal readout electrode 140.
is formed with a flat upper surface. The insulating layer 150 is
In order to suppress leakage current generated in the photodiode 2, sufficient leveling is required. The base electrode 24 and the first layer 22 described above are formed on this insulating layer 150.

Next, the operation of the solid-state imaging device of this embodiment will be explained.

When light enters the photodiodes 2 of each pixel portion separated by the shield layer 28, photocharges are generated in each photodiode 2 according to the incident light and IW. When a readout signal from a shift register (not shown) is applied to a selected gate electrode 18, the selected FET becomes conductive and the photocharge accumulated in the photodiode 2 and the n+/p diode of the source is removed. A signal charge corresponding to the signal charge passes through the base electrode 24, the source electrode 120, and the FET, and is read out to the signal readout electrode 140.

According to this embodiment, since the pixels of the 9th layer 20 and the 1st layer 22 are insulated from each other by the insulating separation layer 200, the charges generated and accumulated in the 9th layer 20 and the 1st layer 22 are transferred to the 9th layer of other pixels. There is no movement to the layer 20 and the first layer 22, and resolution deterioration and color mixing do not occur. Further, the 9th layer 20 is formed of a p-type semiconductor of amorphous silicon doped with boron, the 1st layer 22 is formed of a non-doped i-type semiconductor, and the 1st layer 22 is formed of a non-doped i-type semiconductor.
No. 2 has low resistivity, high carrier mobility, and low trap density, so it does not have drawbacks such as decreased sensitivity and increased afterimages.

Another embodiment of the solid-state imaging device to which the present invention is applied is schematically shown in FIG. 752 on a MOS scanning circuit board.

In this example, one layer 22 and a transparent electrode layer 26
A photodiode 2 is constructed which accumulates photoelectric charges according to the incident light. Other components are similar to the embodiment shown in FIG.

The first layer 22 is made of amorphous SiH, G, which is not doped with impurities.
It is an i-type semiconductor formed by e5iH.

In the device of this embodiment, when light is incident on the photosensitive cell, the incident light passes through the transparent electrode layer 26 and reaches the first layer 22 . Since the first layer 22 is an i-type semiconductor and a depletion layer is formed near the boundary with the transparent electrode layer 2G, photocharges are generated and accumulated in the first layer 22 in response to incident light. A signal charge corresponding to this photocharge passes through the base electrode 24, the source electrode 120, and the FET and is read out to the signal readout terminal 8i140 as in the embodiment shown in FIG. ii.

In this embodiment as well, since pixels in the first layer 22 are insulated and separated by the insulating # layer 200, deterioration of resolution and color mixture do not occur. Moreover, 1 that constitutes photodiode 2
The layer 22 is made of amorphous Sil, G which is not doped with impurities.
Since it is formed of e5iH, it has low resistivity, high carrier mobility, and low trap density, so there are no drawbacks such as decreased sensitivity or increased afterimages.

FIG. 3 shows still another embodiment of a solid-state imaging device to which the present invention is applied, with the MOS scanning circuit board 1 omitted.

In this embodiment, shield layer 28 and seal F7#
The lower part of 2B is transparent! : A part of the surface side of the pole layer 2B and the light guide overlapping layer has a trench structure, and the two layers 20 are separated for each pixel. 2nd layer 20.1st layer 22 has 1st
S + for insulation separation between pixels as in the embodiment shown in the figure.
An insulating separation layer 200 made of 02.5i3N, etc. is formed. Therefore, the photocharges generated in the second layer 20.1 layer 22 are transmitted through the trench structure and the insulation separation layer 200.
Since it is possible to prevent the pixels from moving to the second layer 20.1 layer 22 of adjacent pixels, there is no deterioration in resolution or color mixing.

In any of the embodiments described in 1--, the M as described in 1-
A COD may be used instead of the O8 scanning circuit.

Next, a method for manufacturing the solid-state imaging device shown in FIG. 1 will be described. PSG, 5I02, polyimide insulation layer 15
A1.
A base electrode 24 is formed by depositing a metal film such as Al-9i-Cu, Cr, Ti, No, W, or the like. Next, one layer 22 is formed on the base electrode 24 and the insulating layer 150 by a plasma GVD method using a glow discharge decomposition method or a sputtering method.

In the case of glow discharge decomposition method, S + Ha, G
e Ha gas is decomposed by AC discharge or high frequency discharge, and one layer 22 is formed on the NO9 scanning circuit board 1 by vapor phase growth using the decomposed gas atmosphere. In this case, for example, a parallel plate capacitive coupling type glow discharge decomposition device is used, and the decomposition is carried out at a pressure of 0.1 to 1.0 Torr and a power density of 0.01 to 0.1 W/cm 2 per unit electrode area.

In the case of sputtering, a Si or Ge-5i target is discharged with At-H2 gas, and one layer 22 is formed on the MOS scanning circuit board 1'' by sputtering.

In either method, the substrate temperature of the MOS scanning circuit board 1 is 150 to 300°C, and the thickness of one layer 22 is, for example, 0.5 to 2.5°C. Let it be OpLm.

After forming one layer 22 on the MOS scanning circuit board and the base electrode 24 in this way, two layers 20 are formed on the first layer 22'' by the glow discharge decomposition method or the sputtering method. In the case of glow discharge decomposition method, 5IH4-GeH
B2H8 gas is decomposed as a doping gas for forming the fourth gas and the second layer 20 by AC discharge or high frequency discharge, and the second layer 20 is formed by vapor phase growth on the first layer 22 using the decomposed gas atmosphere. In this case, for example, a glow discharge decomposition device with a parallel plate volume jt1 type is used, and the pressure is 0.
1-1. OTorr, power density per medium electrode area 0.
01 to 0.1 W/c+*2.

In addition, when the 9th layer 20 is made of a-GeSiH, S
Waste flow rate ratio of iHa waste and G e H4 gas GeH4/
SiH4+GeH4 may be set to 0°05 to 0.5.

In the case of sputtering, similarly to the formation of the i-layer, a Si or Ge-3i target is discharged by Ar-H2 gas, and two layers 22 are formed on one layer 22 by sputtering. The thickness of the 9 layers 20 is, for example, 100 to 1000A.
shall be.

In this way, one layer 22.9 layers 20 are laminated in Fig.
A photoresist 210 as shown in FIG. 4(b) is placed on something as shown in a), and atoms such as oxygen 0 or nitrogen N are applied at an accelerating voltage of 30 to 20°C to the part where the pixels are to be separated.
0Kev Tetose amount Ka1013-1018/cI112
Ions are implanted so that

Next, the photoresist (210) is peeled off and heat treated in N2 and/or H2 gas at 200 to 350°C for about 30 minutes to 1 hour. Instead of this heat treatment, a similar heat treatment may be performed in an H2 plasma atmosphere, or only the portion into which ions have been implanted may be annealed with a laser beam or an electron beam.

Through such heat treatment, the implanted ions such as O and N combine with amorphous silicon to form Si[12].

An insulating isolation layer 200, such as 8i3N, is formed. After that, as shown in FIG. 4(C), ITO, In, 03,
Suo,.

A transparent electrode layer 26 is formed by, for example, AI, Al, etc.
-3i-Cu, Al-3i, Or, Ti, No
By forming the shield layer 28 from a metal such as , W or the like, the solid-state imaging device shown in FIG. 1 is manufactured.

When manufacturing a 1-4 intermission imaging device of the trench 411 shown in FIG. 3, after laminating an amorphous semiconductor layer, a photoresist 210 as shown in FIG. A depth of 0.1 to 1
．． Plasma etching or RIE (
After that, in the same way as above, atoms such as oxygen 0 or nitrogen N are added to the groove portion at an acceleration voltage of 30 to 200 Kev at a dose of 1013 to 10''/c+o2. ion implantation.

Furthermore, the photoresist 210 is peeled off, and heat treatment is performed in the same manner as above to remove insulating materials such as 5I02 and Si3N4.
A WI 200 is formed, and then a transparent electrode layer 26 and a shield layer 28 are formed in the same manner as described above to obtain a trench type solid-state imaging device.

In addition, as an insulating separation layer, the resistivity of the region should be high and the lifetime of minority carriers should be short.
Damage caused by ion implantation, changes in band structure due to implanted ions, etc. can be utilized, so the above-mentioned 0. In addition to H, other ions such as B, Ar, and various other ions can also be used.

Further, although the present invention has been described in detail regarding a stacked solid-state imaging device using amorphous silicon, it can be widely applied as electrical insulation isolation in semiconductor devices using amorphous silicon. Silicon line sensor, C
It is clear that it is also effective as electrical insulation for photoelectric conversion devices or semiconductor devices such as OD, TFP (thin film transistor), solar cells, and photoreceptors.

Effects According to the present invention, since the thin amorphous semiconductor layer with a large light absorption coefficient isolates the pixels by the insulating separation layer, deterioration in resolution and color mixing do not occur even in minute pixels. In addition, since it contains an i-layer that is not doped with impurities, the carrier mobility is large and the trap density is small, so there are no disadvantages such as low sensitivity and increased afterimages, and a large aperture of 11
Since ``+='' can also be used, high sensitivity and high resolution can be achieved with r+ (ability).Furthermore, the insulating separation layer is formed by ion-implanting N, 0, etc. atoms into the amorphous semiconductor layer and performing heat treatment. It is easy to manufacture because it can be done.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view conceptually showing the cross-sectional structure of an embodiment of the solid-state imaging device according to the present invention, and FIG. 2 is a part conceptually showing the cross-sectional structure of another embodiment of the solid-state imaging device according to the present invention. 3 is an omitted cross-sectional view conceptually showing the cross-sectional structure of still another embodiment of the solid-state imaging device according to the present invention. FIG. 4 is a partially omitted cross-sectional view showing the manufacturing process of the embodiment of FIG. 1. FIG. Explanation of symbols of main parts 1, MO8 scanning circuit board 290. Photodiode 20, P layer 22, I layer 24, Base electrode 26゜1. Transparent electrode layer 200, Insulating separation layer Patent applicant Fuji Photo Film Co., Ltd. Agent Takao Katori Takao Maruyama

Claims (1)

[Claims] 1. In a semiconductor device formed by including an amorphous silicon layer on one main surface of a semiconductor substrate, a portion of the amorphous silicon layer has a high resistance due to implanted ions. A semiconductor device characterized in that semiconductor elements are separated by an insulating separation layer. 2. The device according to claim 1, which comprises a photodiode formed including the amorphous silicon layer, and a photosensitive means for generating and accumulating electric charge according to incident light. A semiconductor device, wherein a photosensitive cell having a signal readout means for reading out a signal current according to the charge from the photosensitive means is a solid-state imaging device formed on one main surface of a semiconductor substrate. 3. In the device according to claim 2, the photodiode includes an i-layer formed of i-type amorphous silicon not doped with impurities, and a transparent electrode formed on the top surface of the i-layer. 1. A solid-state imaging device comprising a layer and a base electrode formed on the lower surface of the i-layer. 4. In the device according to claim 2, the photodiode includes a p layer formed of p-type amorphous silicon doped with impurities and an i-type amorphous silicon not doped with impurities. The i-layer formed and the p-layer
A semiconductor device comprising: a transparent electrode layer formed on the upper surface of the layer; and a base electrode formed on the lower surface of the i-layer. 5. In the device according to claim 4, the photodiode is arranged such that the p-layer or the pixels of the p-layer and the i-layer are separated by an insulating layer having a trench-type structure, and A solid-state imaging device characterized in that separation is performed by the insulating separation layer. 6. A method for manufacturing a semiconductor device, comprising: forming an amorphous silicon layer on one main surface of a semiconductor substrate; and forming an insulating separation layer by implanting ions into a portion of the amorphous silicon layer. 7. The method according to claim 6, which is a method for manufacturing a solid-state imaging device, wherein the step of forming an amorphous silicon layer on one main surface of the semiconductor substrate is made flat by an insulating layer. It consists of a step of vapor depositing a metal film on the supported MOS scanning circuit board to form a base electrode, and a step of forming an amorphous silicon layer on the base electrode and the insulating layer. The step of implanting ions into a part of the layer to form an insulating separation layer includes the step of placing a photoresist on the amorphous silicon layer and implanting ions into the part where pixels are to be separated, and the step of implanting the photoresist into a portion where pixels are to be separated. A step of heating the peeled and ion-implanted part to form an insulating separation layer, a step of forming a transparent electrode layer on the amorphous silicon layer, and a step of forming a shield layer on the transparent electrode layer. A method for manufacturing a semiconductor device.