JPS61187267A - Solid-state image pickup device - Google Patents

Abstract

PURPOSE:To prevent the generation of a smear, and to reduce an after-image and a remaining image by growing single crystal Si on a storage diode corresponding to a picture element for a semiconductor substrate, to which a scanning section is formed, in an epitaxial manner while growing polycrystalline Si onto a peripheral insulator and shaping a photoelectric conversion section. CONSTITUTION:A light-shielding material 10 is formed onto an oxide film 9 in a MOS type scanning section for an image pickup element, a polycrystalline Si film 11 is shaped, and the surface of an n<+> region 2 as a source is exposed. A single Si region 12 having a little impurity and high resistivity is formed onto the n<+> region 2 as the source through epitaxial growth while a polycrystalline Si region 13 is shaped around the region 12. When vertical auto- doping is conducted at that time, an n-region 14 is formed brought into contact with the n<+> region 2. A p<+> region 15 is formed in order to isolate picture elements in the region grown in the epitaxial manner, a p<+> region 16 is shaped onto the surface, and an ITO electrode 17 is formed onto the region 16. Accord ingly, the generation of smears is prevented while reducing after-images and remaining images.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a solid-state image sensor in which a scanning circuit and an epitaxially grown photoelectric conversion section are integrated on a semiconductor substrate.

Conventional technology A typical configuration of a solid-state image sensor is a CCD (Char
ge Coupled Device) and MO3 type (
There are two types: one uses the pn junction of the source of the MOS switch as a photodiode. All of these devices have the advantage that they can be manufactured using highly integrated MOS process technology. Since it is on a plane (in the case of a MOS type), there are many areas where the incidence of light is blocked by electrodes and switch parts, which has the disadvantage of large optical loss. Furthermore, since the photoelectric conversion section and the scanning section are located on the same plane, the required area of the pixels becomes large, making it difficult to increase the degree of integration of the pixels.

As a result, there is a problem that the resolution cannot be increased.

As a structure for solving these problems, a two-story solid-state imaging device in which a photoconductor film is provided on a scanning section has been proposed. Figure 2 shows an outline of the element structure of the photoelectric conversion section when the two-story solid-state image sensor is constructed with 1MO8 type elements (for example, Japanese Patent Laid-Open No. 49-9111e), and when it is constructed with CCD type (for example, Tokukai Showa rs1-9ys-r2
FIG. 3 schematically shows the element structure of the photoelectric conversion section o).

In FIG. 2, a source n+ region 27 is formed on the surface of a P substrate 26.
, drain n+ region 28, channel stop p''
- region 29, a LOCO3 oxide film 30 for pixel isolation is formed, a gate electrode 32 made of polycrystalline St is formed on the oxide film 31, and a drain electrode 33 used as a vertical signal transmission line is formed on the oxide film 31. It contacts the n+ region 2B of the drain through the contact window. Further, after the entire oxide film 34 is formed, the source electrode 36 is formed on the oxide film 31.
It contacts the n+ region @27 of the source through the contact window. Thereafter, a photoconductor film 36 is formed. After vacuum deposition, the photoconductor film 36 is flattened at a surface near a softening temperature and then solidified. After that, a buffer region 37 is formed, and a transparent electrode 38 made of Sn203 and Sn02 is formed.
form. This transparent electrode is engineering n203:5n02-
91=9 solid solution (hereinafter abbreviated as "IT○").

) is used as a target material and is vapor-deposited by the step-four tsuttering method (at this time, the semiconductor substrate is 40-50'
C [Transparent electrode ITO is formed without thermally affecting the water-cooled hold. ) Although such a two-story solid-state imaging device has the effects of improved sensitivity corresponding to improved aperture ratio and strong suppression of blooming, it has the following problems.

(2) When excessive light is incident, light passing from the gap between the drain electrodes 310 provided for each pixel through an area not shielded from light, such as the dotted line area 39, causes false signals in the vertical direction, resulting in smear. Although there is a measure to shield light from the surface of the ITO film 38 above the dotted line portion 39, it is impossible to achieve complete light shielding, so smear cannot be eliminated in principle.

■ Since the photoconductive film is composed of an amorphous semiconductor or a polycrystalline semiconductor, S
There are many disadvantages compared to single crystals.

(1) In particular, amorphous semiconductors are thermally unstable and prone to crystallization, which leads to changes in characteristics and, unlike single crystal Si, their structure slows down the response speed. . This appears as a phenomenon called afterimage or burn-in. Moreover, compared to the case where a photoconductor film is used in an image pickup tube, due to the unique two-story structure of Si to metal electrode photoconductor film, there are two interfaces based on essentially unstable Schottky junctions. Therefore, there is an interface level, which causes afterimages and retained images.
In the manufacturing process, dozens of thin S
x 02 is likely to be formed, which causes afterimages and retained image sounds to become stronger.

(11) In addition, in the case of polycrystalline semiconductors, there are fewer localized levels within the band gap than in amorphous semiconductors, but the precision of the crystal grain size (usually on the order of several μm) is This affects the reproducibility of characteristics, and changes occur in the band structure when the grain size becomes comparable to the electron mean free path (usually on the order of sub-μm, 0).

Characteristic control becomes difficult. In addition, the above-mentioned problem related to two interfaces based on Schottky junction caused by the structure unique to the two-story structure, ie, "l'-8t~metal metal electrode light guide conduction", also exists.

In addition to the above, in the structure shown in Fig. 2, the unevenness (usually 2-4 μm
Because of this, the photoconductor film becomes discontinuous due to steps, causing image defects and deterioration of characteristics.

The CCD-type two-story structural element shown in FIG. 3 has a flat surface on which a photoconductor film is provided.

In FIG. 3, a P substrate 40 has an n region 41 for charge transfer formed on its surface, and a polycrystalline S
A buried channel type vertical readout CCD is formed by forming transfer gate electrodes 43 and 44, and an n+ region 46 forming a storage diode is provided on the surface of the substrate 40 adjacent thereto. After planarizing the surface of the oxide film 42 on the substrate surface on which these CODs and storage diodes are formed, a contact window is opened on the n+ region 46 of the oxide film 42, and an electrode material such as metal is applied thereto so that the surface is flat. The vertical electrode portion 46 is formed by filling the vertical electrode portion 46 to form a vertical electrode portion 46.
A planar electrode portion 47 is formed on the surface of the oxide film 42 in contact with. After this, by using the photoconductor planarization technique, it is possible to avoid discontinuities in the photoconductor film and deterioration of characteristics due to the step, but the above-mentioned problem ,■
still remains.

Problems to be Solved by the Invention As already mentioned in the explanation of the conventional example, although the two-story structure image sensor proposed for the purpose of improving sensitivity has achieved its purpose, the following problems remain to be solved. It became clear that there was a problem.

(1) The metal electrode provided for each pixel in contact with the photoconductor film also serves as a light shield, but since a gap is required for pixel separation, complete light shielding is theoretically impossible, and excessive Smear occurs for incident light.

This is a problem arising from the two-story structure.

(2) Since a photoconductor film is used as the photoelectric conversion part, amorphous materials are thermally unstable and have inherently slow response speeds, which can cause afterimages and retained images. It is difficult to control and reproduce the characteristics, and although there are fewer afterimages and retained images than with amorphous materials, they do exist in principle.

These are problems originating from the crystal structure.

(3) Since the storage diode on the semiconductor substrate on the first floor, where the scanning part is formed, and the photoconductor film on the second floor are connected by metal electrodes, all two Schottky junctions, which are inherently unstable, are formed. Due to the influence of the interface states and oxide film at the junction interface (or hetero), afterimages and retained images occur, resulting in poor control, reproducibility, and
Poor thermal stability. These are problems originating from the interfacial state and interfacial structure.

10 Beno The above (1) to (3) are the problems to be solved by the present invention.

Means for Solving the Problems In order to solve the above problems, the present invention provides mono-crystal Si (mono-crystal Si, hereinafter m) on the storage diode corresponding to the pixel of the semiconductor substrate on which the scanning section is formed. At the same time, polycrystalline 5i (also abbreviated as Si) is epitaxially grown on the insulator around the storage diode.
Also abbreviated as -8i. ) (hereinafter referred to as "monocrystalline St/polycrystalline St simultaneous growth pattern", or "(m/p)c").
-St simultaneous growth pattern is called. ), a pixel isolation region is formed, and the region in which (m/p) c - Si is simultaneously grown is used as a photoelectric conversion section. Due to this manufacturing feature,
The image sensor of the present invention is referred to as "pixel growth element J (Epitax
ial-growing Photo-sensor
Device *E for short.

P, D” or Germinate Photo-se
nsor Devicd.

It will be abbreviated as “G, P, D”. ) type image sensor.

Also, before performing the above (w'p) c -8i simultaneous growth, 11.

By providing light shielding on the insulator around the storage diode, complete light shielding can be achieved since separation for each pixel is not required.

Effects By using the above-mentioned means to solve the conventional problems, the following effects can be observed.

(1) Before simultaneously growing (m/p) c-8, it is possible to form a complete light shield on the insulator around the storage diode, which does not require separation for each pixel, so that the incident light is Leakage is eliminated and smear generation can be theoretically suppressed.

(21) By performing (m/p) c-8i simultaneous growth, a homojunction is formed at the interface with the storage diode through continuous growth of perfect crystals, so a metal electrode is unnecessary and unstable. This solves the problem of interface states that exist at the Schottky junction interface.

Furthermore, all epitaxial growth techniques were utilized (m/p
)a −S by simultaneous growth, homojunction interface and m
Since there is no possibility of an oxide film being formed at the boundary between the e-8i and the PC-8i, another cause of image retention and image retention is eliminated.

(31 The main part of the photoelectric conversion part is formed by me-3i, and the surrounding part is formed by pc-3i, so there is no localized level in the main part of the photoelectric conversion part, and the surrounding pC-3i Therefore, afterimages and retained images caused by the crystal structure are significantly reduced.

Embodiment FIG. 1 (ai to (ql) are cross-sectional views of the vicinity of photoelectric conversion sections of G, P, and D type image sensors in the first embodiment of the present invention.

Plan view 9 equivalent circuit diagram, main part schematic diagram along BB',
An energy band diagram in a thermal equilibrium state, an energy band diagram in an operating state, and an overall circuit configuration diagram are shown. The scanning section is M
I think it consists of an OS type.

Note that since the present invention relates to a photoelectric conversion unit, C
The case of a CD-type scanning section can be considered in exactly the same way.

In FIG. 1, a source n+
+ area 2. Drain n++ region 3. An oxide film 5 is formed on the p+ region 4, -7 of the channel stop, and polycrystalline Si (or p
A gate electrode 6 made of C-8i) is formed, and a drain electrode 8 used as a vertical transmission line contacts the n++ region 3 of the drain through the contact window of the oxide film 7. Furthermore, an oxide film (and protective film) 9 is formed,
A MOS type scanning section used in a conventional image sensor is completed.

In this embodiment, the n++ region 2 of the source, which is the photoelectric conversion section of such a conventional image sensor, is used as a signal charge storage diode 18, and furthermore, a region ' The additional components of the tpine type photodiode 19 according to the present invention will be described below.

In FIG. 1, a light-shielding material (for example,
After forming the pC-8T film 11, the surface of the source n region 20 is exposed (in order to improve the light-shielding effect, the exposed part is made as small as necessary and the light-shielding part is made by that much). (You may spread it out.) (p
The reason why the C-8i film 11 is formed in 14 bases is to easily realize epitaxial growth called "(m/p) C-8i simultaneous growth" which will be described later. ) After that, by performing epitaxial growth, a high specific resistance single crystal Si (or mC-8T) region 12 (hereinafter referred to as i ljl) with few impurities is formed on the n″-region 2 of the source.
Sometimes abbreviated as area. ) is formed at the same time as mC
A PC-8i head region 13 is formed around the -8i region 12. At this time, if there is vertical autodoping, n+
An n region 14 is formed in contact with + region 2 . Incidentally, a low pressure epitaxial growth method is effective in removing vertical auto-doping.

After this, a p+ region 16 is formed for pixel isolation in the epitaxially grown region, and a p++ region 16 is further formed on the surface.
is formed, and an ITO electrode 17 is formed on the second part to complete the process. A voltage ■T is applied to the terminal of the disconnected IT○ electrode 17.

Fig. 1 (The plan view of bl corresponds to one pixel of the light receiving section,
The main parts of the imaging device are formed as shown in 5, -1.

The A-A/cross section of Figure 1 fbl is a cross-sectional view of Figure 1 (al).
dl, and a pin type photodiode 19 (hereinafter referred to as pi
It is abbreviated as n-type PD. ). FIG. 1 [el] shows the entire energy band diagram of the pin-type PD 19 in a thermal equilibrium state, and FIG. 1 (fl corresponds to the operating state).

Since the scanning section is a MOS type, the n+ region 2 of the source is
The voltage of the vertical transmission line 8 is set to ■L, the voltage vT is applied to the terminal of the IT◯ electrode 17, and the pin type PD 19 is brought into an operating state by setting the reverse bias condition such that ■T<vL. As shown in FIG. 1 (fl), electron-hole pairs are generated in the i region 12 by the incident light h, the electrons are collected in the n+ region 2 and accumulated as signal charges, and the holes are generated in the p+ region 16. It passes through 17 ITO electrodes and is absorbed by an external power source.

Figure 1 (ql shows the circuit configuration diagram of two-dimensional G, P, and D type imaging devices arranged in two dimensions. The dotted line frame U corresponds to the cell, and the dashed line The frame {circle around (2)} corresponds to the light receiving section.Other than the pin type PD 19, it is completely the same as the conventionally used MO3 type imaging device, and the operation of the G, P, l) type imaging device of this embodiment will be described below. p
The signal charge generated in the in-type PD 19 is transferred to the storage diode 1.
8, the MOS switch 20 selected by the vertical scanning circuit 22 becomes conductive, and the signal charge moves to the vertical transmission line 8. Thereafter, the MOS switch 21 selected by the horizontal scanning circuit 23 becomes conductive, and the signal charge moves from the vertical transmission line 8 to the horizontal transmission line 24 and is read out to the outside. Since the voltage VL of the vertical transmission line 8 is equal to the voltage applied to the horizontal transmission line 24, the reverse bias voltage of the PLN type PD 19 is determined by the applied voltage VL of the horizontal transmission line 24 and the voltage of the ITO electrode 17. I can do it.

Next, a fourth method for manufacturing a G, P, and D type imaging device of the present invention will be described.
This will be explained using figures. FIG. 4 (al) is a cross-sectional view of the photoelectric conversion section of the MO8 type imaging device, and corresponds to the state before forming the pin type PD (z) in FIG. 1(a).

In order to realize the G, P, and D type imaging device of the present invention, the fourth
As shown in the figure (at), a light shielding material 1017 is formed on the oxide film 9.

Fully formed. Usually, a PSG film is grown as an interlayer insulating film before forming the light shielding material 1of.

Figure 1 (in BL, a PC-8I film 1 is placed on a light shielding material
1 growth. Thereafter, the oxide film 60 (and protective film, etc.) on the surface of the n+ region 2 used as a storage diode is removed.

In Fig. 4fcl, by vapor phase epitaxial growth,
(m/p) C-8i simultaneous growth". In epitaxial growth, crystal growth is performed by fully controlling the ratio of oxidation and reduction, so no oxide film is formed on the surface of the n+ region 2, and an ideal homojunction is formed. The mC-8t
There is no fear that an oxide film will be formed on the boundary between the region 12 and the PC-8i region 13 as well.

However, since vapor phase epitaxial growth utilizes the highest temperature in the manufacturing process, "(rrv'p) c-8
Since the impurity distribution may change before and after the "(m/p) C-8i simultaneous growth", fast epitaxial growth at a low temperature is desirable. For this reason, during the "(m/p) C-8i simultaneous growth", light irradiation as shown by arrow 61 is necessary. ``For 18 bezot epitaxy'' is promising. FIG. 4 (After CL, a p+ region 15 for pixel isolation is formed, and a p+ region 1 is formed on the entire surface.
6 and a transparent electrode 17 to complete the embodiment of the present invention as shown in FIG. 1 (al).

Next, it is necessary to determine the thickness li of the i-region 12 of Al in FIG. 1 (FIG. 1) by epitaxial growth.

Unlike a pn-type PD, in the case of a pin-type PD like the present invention, the i-region 12, which is completely depleted, is used as the main region where carriers are generated by light incidence.
It is possible to utilize the feature that the quantum efficiency and frequency response characteristics are determined by a thickness li of 2.

The quantum efficiency η of a pin-type PD is expressed by the following formula (Reference: “Physics of Sze” by S, M, Sze)
semiconductor devices, 2nd ad, (19
81), John W'1ley & 5ons,
pyEie).

However, it is written as 19 ・, 5゛L, L. ) p The optical absorption coefficient α has been obtained for various materials as shown in Figure 5 (al).Now that we are thinking about Si f,
Read α for each wavelength from FIG. 6fal.

Furthermore, if you choose 3dB frequency f3dB as a parameter as the frequency response characteristic, then U5: Saturation speed (In case of Si, Us-: 107m
/5eC) (Reference: “Physics of
Sem1conductorDevices, 2n
d ed, p, 758).

(11, (From equation 21, a graph as shown in FIG. 5 (bl) can be obtained.

Depending on the wavelength of the light used, the thickness of the i region #i=W is
It can be determined from Fig. 5 fbl.

For example, if visible light corresponds to a wavelength of 0.45 to 0.65 μm, #, -W = 8 to fbl in Figure 5.
It can be seen that a thickness of 15 μm is desirable.

In general vapor phase epitaxial growth, the relationship between material, optimum temperature, and growth rate is shown in the table below.

In general imaging devices, whether MOS type or CCD type, a planarization process is employed for the purpose of reducing the level difference in wiring. This flattening process is a heat treatment at 1000°C for about 10 to 20 minutes, so using S I H4f,
If vapor phase epitaxial growth is performed using C, the required thickness of the grown shrimp can be achieved in about 1 to 2 minutes. Moreover, the influence on impurity distribution is also 10
At 00°C, the change will be higher than at 1000°C, and if the temperature is constant, the diffusion distance will depend on time, so 2 minutes will only require a higher change than 2o minutes21,, +-. Since the fluctuation in the output is only about 4%, it can be said that the difficulty on the process side is negligible.

At this time, there is a report that the thickness of the grown layer is 12μ in 5 minutes at 86'O'C when applied to the photo-epitaxial Si mentioned above (Reference 2M).

Kumagawa et al; Jpnj, Appl
, Phys, 7-11 (1968'), I) 133
2~) With this photo epitaxy” (m/p)
If "c-Si simultaneous growth" is performed, the influence on the impurity distribution can be almost ignored even when the growth thickness is about 100 μm due to the application of infrared rays.

As described above, according to this embodiment, the following effects can be obtained.

(m/p) Since all areas other than the mc-8i homojunction, which is necessary for realizing simultaneous growth of c-Si by epitaxial growth, can be shielded from light, smear can be removed in principle.

(m/p) Since the c-Si co-grown layer is a photoelectric conversion part, the localized level derived from the crystal structure is 22, in the periphery.

Since it is limited only to the PC-8i area, afterimages and retained images are significantly reduced.

(2) Since it is formed by epitaxial growth, a perfect crystal homojunction is formed on the me-Si surface exposed before growth, so there are no interface states.

Furthermore, in the case of epitaxial growth, no oxide film is formed at the homojunction interface. Therefore, afterimages and retained images due to interface states and oxide films do not occur.

■ Also, epitaxial growth and (m/p)c-
Since Si is grown simultaneously, me-8iiJ area and pc-8
No oxide film is formed at the boundary of the i-region, and no afterimage or residual image occurs due to the oxide film.

(2) Since the photoelectric conversion section is a p-i-n type PD, the highest quantum efficiency can be obtained for the wavelength of incident light by optimizing the thickness of the i region.

FIG. 6 shows a second embodiment of the present invention (m/p)c-51
For pixel separation in the simultaneous growth region, the n+ region 60i is used instead of the p+ region 15 as shown in FIG. Since there is no potential gradient between the storage diode 60 and the n++ region 2 of the storage diode 23, and no leakage current is generated, it is possible to increase the voltage applied to the pin type PD.

FIG. 7 (al to (el is a cross-sectional view of the vicinity of the photoelectric conversion section of the G, P, and D type imaging device showing the third embodiment of the present invention, B
-A schematic diagram of the main parts along B', an energy band diagram in a thermal equilibrium state, an energy band diagram in an operating state, and an equivalent circuit diagram are shown. The same parts as in FIG. 1 are given the same numbers.

The difference between the first embodiment shown in FIG. 1 and the third embodiment shown in FIG.
+ area 16 has been omitted. Therefore, the pin type PD formed in the first embodiment is me
A tal-i-n (min for short) type PDi will be used. A min-type FD operates in various modes depending on photon energy and bias conditions.

Fig. 7 (schematic diagram along line BB' of al) Fig. 7 (bl
The energy band diagram corresponding to is shown in Figure 7 (cl, (
It is shown in dl. Three typical modes will be explained using this diagram.

(II Eq>hI,>qφB) (However, Eq: band gap energy key.

(2) Hot electrons are generated in the transparent $i (or metal electrode) due to the incidence of light (B: avalanche breakdown voltage), are injected into the semiconductor i region 12, and are collected in the storage diode 2.

fIIl h,>Ecr ■<■B; Electron-hole pairs are generated in the semiconductor l region 12 by the incidence of the light h1, and the PD operates almost the same as a pin type PD.

(ll) h > Eg and v = vB; electron-hole pairs are generated in the semiconductor i region 12 by the incidence of the light h1,
Avalanche multiplication is performed when the electrons travel toward the storage diode 2.

The min-type PD is extremely effective in the visible light to ultraviolet light range. The reason for this is that the absorption coefficient α in these wavelength regions has a very large value of about 1o-5(7)-1 in most semiconductors (that is, the effective absorption is 25, and the growth is 1/α:0. 1 μm or less), most of the incident light is absorbed at the surface of the semiconductor, and no trench electron-hole pairs are generated. For min-type PDs, therefore, appropriate metal electrodes and appropriate anti-reflection coatings must be selected. A typical example is Zn5 as an anti-reflection film.
(500 people) and using Au (100 people) as the metal electrode, a transmittance of 92% or more can be obtained for incident light of 720.6 μm.

As described above, by forming a min-type PDi instead of a pin-type PD as the photoelectric conversion section of the G, P, and D-type image sensor, it becomes possible to use it for shorter wavelengths, and it has an avalanche multiplication effect. It is also possible to realize a sensitivity multiplication function.

FIG. 8 shows a fourth embodiment of the present invention, in which the transparent electrode 17 of FIG.
(m/p) It is formed on the surface of the c-8i simultaneous growth region. Therefore, in this embodiment, a light receiving window is formed above the storage diode 18 (see FIG.
In the bl circuit, this is displayed as '1PD82. ) Page 26 (m/p) c-8t Since the simultaneous growth head is in an almost completely depleted state during operation, there is no problem in the operation of collecting carriers generated by incident light into the storage diode's n + Tsukuda area 2. . The situation is shown in Fig. 8 (schematic diagram along the B-B' line of al. I will explain using

The energy band diagram of the thermal equilibrium state corresponding to the schematic diagram of Fig. 8 (cl) is shown in Fig. 8 (J), but as can be seen from the figure,
By effectively utilizing the out-diffusion of impurities from the n++ region 2 and the auto-doping effect, the i-region 12
As shown in Fig. 8 (fl), an energy band with a slope is formed between the n++ region 2 and the n++ region 2. ) The c-8t simultaneous growth process can be carried out using normal-pressure shrimp, and the lower the growth temperature, the more the autodoping amount changes in the direction of the arrow in Figure 8. It becomes a convenient move.

Figure 8 (see the energy band diagram of the operating state of el27
,,,,.

As shown in FIG.
/p)p+lJ which is the separation region of the c-8i simultaneous growth region
It collects in area 15 and is discharged to the outside.

As described above, according to this embodiment, (m/p)c-8i
Since auto-doping is actively used for simultaneous growth, the manufacturing process conditions for epitaxial growth are extremely simple, and since the sensitivity increases as the aperture ratio increases, this is the simplest method to achieve the purpose of the present invention. It has an effective structure.

Next, a fifth embodiment will be described in which a phototransistor is constructed on the n+ region 2 of the storage diode by doping impurities during epitaxial growth for simultaneous growth of (m/p)c-8i.

Figure 9 fal ~ (fl is a sectional view of the vicinity of the photoelectric conversion section of the G, P, D type imaging device in the fifth embodiment of the present invention, B
- Schematic diagram of main parts along line B', energy band diagram in thermal equilibrium state, energy band diagram in operating state, equivalent circuit diagram, showing the relationship between the amount of dopant in the reaction gas for epitaxial growth and the impurity concentration in the grown layer. It is. Note that in FIG. 9, the same parts as in FIG. 1 are given the same numbers. The difference from Figure 1 is ``(m/p)c-8i simultaneous growth''
Since this is only a part, I will explain that part first.

After the light-shielding material 10 has been formed and the PC-3i film 11 has been formed, epitaxial growth is performed after a process is performed to expose the nMBM2O3 surface. Perform epitaxial growth. Although vapor phase epitaxy will be explained here, other methods can be used as well.

At the start of vapor phase epitaxial growth, the impurity density of the shrimp growth layer can be varied from 1014 to 1019 cm by changing the amount of dopant in the reaction gas.
When a typical ratio B3 is used, the relationship shown in FIG. The BB3 concentration can be determined accordingly.

After the p+ region 91 is formed, the amount of dopant in the reaction gas is reduced to zero and the growth is continuously switched to non-doped epitaxial growth.

As a result, a p region 92 is formed on the p+ region 91 by out-diffusion or auto-doping.
i 131 area 12 (below) is formed. During this series of processes, the PC-8i region 1 is placed on the PC-8T film 11.
3 are formed simultaneously. After the growth thickness of the i region 12 reaches a predetermined value, the entire n+lJ region 94 for pixel separation is grown to form an n+ region 93 on the entire surface of the light receiving section. Thereafter, a transparent electrode 17 is formed to complete the G, P, and D image pickup elements.

FIG. 9 (bl
Shown below. Depending on the epitaxial growth conditions, the n-region 14
．． Since the p region 92 can be made negligibly small, the photo transistor 96 is hereinafter referred to as n1pn type PT (Ph
(abbreviation for oto-Transistor) 96 on page 30.

As can be seen from the energy band diagram of the thermal equilibrium state of n1pn type pT95 in FIG. 7
This is a 0-ting base area.

By applying VT(>V,)k to the transparent electrode 17, n1
The pn type PT95 is in an operating state, and the energy band diagram at that time is shown in FIG. 9 fdl. Due to the incident light on the i region 12, pairs of electrons are generated in the n+ region 93.9.
4 and is discharged to the outside through the transparent electrode 17.

On the other hand, holes gather in p+ regions 9,1. As shown in the equivalent circuit of FIG. 9 (el), since the MOS switch 97 is off except during reading, the n+
Region 2 is in a 70-ting state.

Therefore, holes gather in p+4Ji region 91 and p+
The potential of the region 91 increases, and as shown in FIG. 9 fdl, the potential barrier 96 decreases as indicated by the dotted line. At this time, both the p+ region 1 and the n+ region 2 are in a floating state 31.

Since the contact potential difference between the two is maintained as it is, n+
The distribution area 2 potential also increases and changes as shown by the dotted line in FIG. 9 (dl).

After holes are thus accumulated in the p region 91 of the n1pn type PT 95, a pulse is applied to the gate electrode 6 to make the MOS switch 97'f conductive.

This gate electrode 6 is n
It also controls the potential of the p++ region 91, which is the base region of the 1pn type PT95.

Therefore, if the pulse voltage applied to the gate electrode 6 is small, the holes accumulated in the high-potential p++ region 91 will escape, approaching a non-destructive operation.

If the pulse voltage applied to the gate electrode 6 is high, p++
The holes accumulated as majority carriers in the region 91 are driven away to the n++ region 2 side and are removed, and the potential of the p++ region 91 returns to its initial state.

A multiplication effect also occurs during this readout.

Junction capacitance Cf between p''INNo1 and n+ region 2.

Ratio to capacitance C8 between the n+ region and the P substrate 1.

It has been rigorously proven that \Cs /Cf= rn is the multiplication factor of n1pn type PT (References: T, Oh
mi atal,”Non-Destructive
Image 5ensors"IEDM (1980) 1
), 350~).

Here, it will be explained qualitatively. When the MOS switch 97 becomes conductive, holes accumulate in the p++ region 91 and the potential barrier 96 lowers, as shown in FIG.
Electrons from ++ region 2 cross the potential barrier 96 and move to n++ region 9.
3 (ie operates in depletion mode).

At this time, corresponding to the above capacitance ratio c3B/cfVC, n++
Electrons Nn going from region 2 to n+ candy region 93, p+rgp
The hole N-ratio in region 91 is determined by Nn/Np (this is
Since the n++ region 2 and the p++ region 91 are in a floating state, the potential changes are the same, and CfΔ■−qNp−Qp
, C8Δ■-qNn-qi. ).

As described above, according to this embodiment, the photoelectric conversion section is n1pn
By using the type PT, (1) a pixel multiplication function is realized, and the multiplication factor is determined by C8/Cf, so the design of the multiplication factor is easy.

■ Non-destructive readout and destructive readout are performed using the gate electrode 33.
, can be controlled by the amplitude of the pulse voltage in A.

■ The gate electrode for reading signal charges from the storage diode is an n1pn type PT formed by epitaxial growth.
Since the 70-ting base potential of the structure is also controlled, the structure is not complicated.

It has the following characteristics.

Above, the first to fifth embodiments have been explained taking into consideration that the present invention can be applied even if all conventional MOS type, CCD type, etc. image sensors are used. In order to eliminate smear, which is the object of the invention, in principle, the smaller the distance between the light shielding material and the n+ region of the storage diode, the more reliable it is.

Therefore, MOS type, C
It is desirable for G-, P-, and D-type image sensors to realize a structure that is advantageous for smear removal using a MOS-type, CCD-type, or other image sensor, rather than using a CD-type image sensor.

Such an example is shown in FIG. 10 and will be described below as a sixth embodiment.

What is different in Fig. 10 from Fig. 1 is the source, drain, etc.
After the 34 vane diffusion and before the (m/p)C-8i simultaneous growth.

After forming the gate oxide film 101, the source n++ region 2
．． If an n+ region of the drain is formed and a metal electrode with a high melting point that is also a light-shielding material (for example, MOI and its solicide Mo 312) is formed as the gate electrode 102, it will be 0.1-0.2prn and PC-8T. By using a metal electrode with a high melting point that is also a light-shielding material as the drain electrode 103, the thickness of the drain electrode 103 is 0.3 to less than that of the commonly used AI electrode.
The thickness is only 0.2 μm, which is about τ or less.

Use of these high melting point metals is advantageous for alleviating step differences and flattening. Thereafter, an oxide film 104i is formed, and a light shielding portion 105 is formed using a high melting point metal material which is also a light shielding material. After this, a PC-8T film 11 is formed on the light shielding part 106,
After the surface of the n++ region 20 is exposed, (rr1/p)c-8t is simultaneously grown by the epitaxial growth method. After that, the process is exactly the same as that of the first embodiment shown in FIG. 1.

do.

As described above, this example uses a high-melting point metal (
By using the gate electrode and its Solizide) as the gate electrode and drain electrode, the distance between the surface of the male region 2 and the light-shielding part 105 becomes 7-τ or less, and the light-shielding The effectiveness of this is significantly increased and the possibility of smearing is more completely suppressed.

In all of the above embodiments, Ci, P, and D type imaging devices are constructed using P substrates, but the invention can be similarly applied to N substrates.

In addition to St, it is also possible to improve the response characteristics by using a compound material such as GaAs as the substrate material.

Furthermore, (m/p) pc-5i in the c-8i simultaneous growth region
The causes of afterimages and reservations caused by lateral epitaxial growth, including lateral epitaxial growth in which the mC-8t region in the center of the Tsukuda region is used as a base material, are further reduced. To achieve this, it is necessary to increase the mobility of Si on the surface of the PC-81'55 area, so the substrate Si
What is necessary is to form mc-8i having the same crystal orientation above the light-shielding region.

Effects of the Invention As described above, according to the present invention, (1) All areas other than the portion where the signal charge storage diode is epitaxially grown can be shielded from light, so smear does not occur in principle.

■ Since the (m/p)c-8i co-growth region is a photoelectric conversion region, the localized level originating from the crystal structure is
3i region only, and afterimages and reservations originating from localized levels are significantly reduced.

(2) Since (m/p) C-8i is simultaneously grown by epitaxial growth, a perfect crystal homojunction is formed on the surface of the storage diode region, so that no interface state exists. Moreover, at the homozygous interface, (me-8i) −(p c
Since no unnecessary oxide film is formed on the boundary between -8, i), no afterimage or retained image due to the interface state or the oxide film occurs.

(m/p) A pin type PD and a min type PD are used in the photoelectric conversion section formed in the c-S i simultaneous growth region.

37 Be-' The structure of n1pn type PT can be freely selected depending on the application.

(2) Since it is possible to simultaneously grow C-8i (m/I) by exposing the PDi surface of a conventional image sensor, it is an extremely versatile technology.

(, m/p) Since the epitaxial growth that realizes the simultaneous growth of C-8i is the same as the method used in bipolar ICs, there is no manufacturing difficulty at all.

It has the following characteristics, and its industrial effects are great.

[Brief explanation of drawings]

FIG. 1 fal is a cross-sectional view of the vicinity of the photoelectric conversion section of the solid-state imaging device according to the first embodiment of the present invention, (bl is a top view, and (c
l is an equivalent circuit diagram; FIG. 3 is a cross-sectional view of the photoelectric conversion section of a stacked image pickup device using an MO8 type image sensor, and FIG.
al, (bl, (cl is a cross-sectional view showing the manufacturing method of the first practical 38-peno embodiment shown in FIG. 1, FIG. 5 1a) is the (m/p) c-3t growth layer of the present invention. A diagram showing the relationship between the optical absorption coefficient and wavelength necessary to determine the thickness, (bl is a diagram showing the relationship between the depletion layer width and quantum efficiency, and FIG. 6 is a diagram showing the vicinity of the photoelectric conversion section of the solid-state imaging device according to the second embodiment of the present invention. FIG. 7 is a cross-sectional view of the vicinity of the photoelectric conversion section of a solid-state imaging device according to the third embodiment of the present invention, (bl is a main schematic diagram, (cl is an energy band diagram in a thermal equilibrium state, dl is an energy band diagram in the operating state, fel is an equivalent circuit diagram, and FIG.
(bl is an equivalent circuit diagram, (cl is a schematic diagram of the main part, the same is an energy band diagram in a thermal equilibrium state, (el is an energy band diagram in an operating state, ffl is an out-diffusion of epitaxial growth, and a diagram of a growth layer due to auto-doping. Impurity distribution diagram, FIG. 9 (al is a sectional view near the photoelectric conversion part of the solid-state imaging device of the fifth embodiment of the present invention, (bl is a schematic diagram of the main part, fcl is an energy band diagram in a thermal equilibrium state, ( dl is the energy link diagram in the operating state, (e
l is equivalent circuit diagram, ffl is B B r in shrimp growth gas
FIG. 10 is a sectional view of a photoelectric conversion section of a solid-state imaging device according to a sixth embodiment of the present invention. 1...p-type silicon substrate, 2.3...source. Drain, 5...LOCO8 oxide film, 6...
...Polycrystalline Si gate electrode, 11...Polycrystalline Si film, 12...Single crystal Si region, 13...
... Polycrystalline S1 region, 18 ... Storage diode. Name of agent: Patent attorney Toshio Nakao and 1 other person - Figure 1 Figure 1 Gun Y Hari W Ward Tatsushinjisu■juchi U〕 (96) (d-t)/Metsu/Q1. )l:Ii3 W
nlNVf)e
- Fig. 8 χ redundant layer 4

Claims (6)

[Claims] (1) A semiconductor substrate having a charge storage region and a signal readout circuit corresponding to the charge stored in the charge storage region, and a semiconductor substrate provided on the semiconductor substrate so as to have an opening in a part of the charge storage region. a light-shielding region formed on the insulating layer except for the opening, a single crystal region formed on the charge storage region through the opening by epitaxial growth, and a single crystal region formed on the light-shielding region through the opening. A solid-state imaging device characterized in that a photoelectric conversion region is formed by a polycrystalline region formed simultaneously with the single-crystalline region. (2) The solid-state imaging device according to claim 1, wherein a polycrystalline region is formed to cover the light-shielding region before epitaxial growth. (3) The solid-state imaging device according to claim 1, wherein a transparent electrode is formed on the surface of the photoelectric conversion region. (4) The solid-state imaging device according to claim 1, wherein a pixel separation region is provided in the photoelectric conversion region. (5) The solid-state imaging device according to claim 3, wherein a first region having a conductivity type opposite to that of the charge storage region is formed above the photoelectric conversion region under the transparent electrode. (6) A second region of the same conductivity type as the charge storage region is formed above the photoelectric conversion region under the transparent electrode, and a third region of the opposite conductivity type to the charge storage region is formed below the photoelectric conversion region. A solid-state imaging device according to claim 3, characterized in that: