JPS59177268U - power supply circuit - Google Patents
power supply circuitInfo
- Publication number
- JPS59177268U JPS59177268U JP6986683U JP6986683U JPS59177268U JP S59177268 U JPS59177268 U JP S59177268U JP 6986683 U JP6986683 U JP 6986683U JP 6986683 U JP6986683 U JP 6986683U JP S59177268 U JPS59177268 U JP S59177268U
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- supply circuit
- resistors
- connection point
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の電源供給回路の一余を示す図であり、第
２図は本考案になる電源供給回路の一実施例を示す図で
ある。
１０・・・コントロール信号入力端子、１１・・・カメ
ラ電源供給端子、１２・・・他の回路への電源供給端子
、Ｑ３． Ｑ４． Ｑ５・・・トランジスタ、Ｒ５乃至
Ｒｌｏ・・・抵抗。FIG. 1 is a diagram showing the remainder of a conventional power supply circuit, and FIG. 2 is a diagram showing an embodiment of the power supply circuit according to the present invention. 10... Control signal input terminal, 11... Camera power supply terminal, 12... Power supply terminal to other circuits, Q3. Q4. Q5...transistor, R5 to Rlo...resistance.
Claims (1)
と、この入力端への信号の印加によりＯＮとなるトラン
ジスタと、このトランジスタと電源間に設けられた直列
接続の第１、第２、第３、第４の抵抗と、ベースが第１
及び第２の抵抗の接続点に接続され、エミッタが第２及
び第３の抵抗の接続点に接続された第１のＰＮＰトラン
ジスタと、ベースが第３及び第４の抵抗の接続点に接続
され、エミッタが電源に接続された第２のＰＮＰトラン
ジスタとを具備し、第１第、２ＰＮＰトランジスタのコ
レクタより必要な電源を供給するようにしたことを特徴
とする電源供給回路。an input terminal into which a signal for controlling the supply of power is input; a transistor that is turned ON by application of a signal to this input terminal; and first, second, and second transistors connected in series between the transistor and the power supply. the third and fourth resistors, and the base is the first
and a first PNP transistor connected to the connection point of the second resistor, the emitter of which is connected to the connection point of the second and third resistors, and the base of which is connected to the connection point of the third and fourth resistors. and a second PNP transistor whose emitter is connected to a power supply, and the necessary power is supplied from the collectors of the first and second PNP transistors.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6986683U JPS59177268U (en) | 1983-05-12 | 1983-05-12 | power supply circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6986683U JPS59177268U (en) | 1983-05-12 | 1983-05-12 | power supply circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59177268U true JPS59177268U (en) | 1984-11-27 |
Family
ID=30200013
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6986683U Pending JPS59177268U (en) | 1983-05-12 | 1983-05-12 | power supply circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59177268U (en) |
-
1983
- 1983-05-12 JP JP6986683U patent/JPS59177268U/en active Pending
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