JPS59171169A - Field effect transistor and manufacture thereof - Google Patents

Abstract

PURPOSE:To obtain an FET of high withstand voltage with good uniformity at a high yield by a method wherein a part of an operating layer between a gate electrode and a drain electrode is made of high resistant semiconductor, in a Schottky gate FET. CONSTITUTION:A high resistant semiconductor region 11 is provided on the surface side between the gate 3 and the drain 4 of the Schottky FET, and the thickness of the N-channel layer 2 under this region 11 is more reduced than thickness under the source 4 and the gate 3. In other words, by introducing the region 11, the device having a flat structure can exhibit the characteristic of a substantially recess structure, making the electric field between the gate and drain average and reducing the maximum electric field, resulting in the improvement of the dain withstand voltage. Unlike on the source side, electrons run in the neighborhood of a substrate interface on the drain side, therefore the deterioration of mutual conductances does not generate even when a high resistant region is provided on the surface side.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a Schottky gate frost. The present invention relates to a field transistor and a method for manufacturing the same.

SHOSOTOGIGUTO ELECTRIC FIELD EFFECT TOFU JISTA (hereinafter ME)
SFET (abbreviated as SFET) is an ultra-high-speed, high-frequency device with 12 excellent characteristics, and is a MESFE using GaAs.
T has already been put to practical use as a Jψ width element for low noise and high output in a frequency band of 10 GHz or higher.

By the way, in high-output devices, it is an extremely important issue to increase the voltage resistance of the device in order to obtain high power output, and GaAs
In particular, in MESFET, in order to improve the tray 7-gate pressure resistance, for example, the distance between the twins is made larger than that shown in Figure 1 (as shown in al). 14) using an off-cut gate structure, or using a certain t7) &J. As shown in FIG. 1()), the average electric field between the gate and drain can be reduced by using a recess structure.kiT. J: h Attempts are being made to increase the withstand voltage. [7 However, the controllability of the positioning of the ono-ten gate during the manufacturing process in the stiff element structure is difficult; g <,'! ! -/, the uniformity of the groove depth, width, etc. is insufficient, and it is difficult to obtain a high output device with uniform characteristics at a high yield p, 3.
″・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・
A high-withstand-voltage, high-output electric current with a high yield and uniform characteristics.

An object of the present invention is to provide a field effect transistor and a method for manufacturing the same.・.

That is, the present invention provides a Schottky electrode having a gate Schottky electrode on a semiconductor active layer of a high-resistance substrate, a source electrode, and a drain electrode disposed opposite to the gate electrode.
A field effect transistor in which a part of the semiconductor active layer between the gate wire and the drain electrode is a high resistance semiconductor, and a field effect transistor in which the gate is used as a pole. This is a method for manufacturing a field effect transistor in which a semiconductor active layer between the drain electrode and the semiconductor active layer is irradiated with protons and then heat treated.

Hereinafter, embodiments of the present invention will be described in detail regarding a GaAs field effect transistor.

FIG. 2 is a cross-sectional structural diagram showing an example of a GaAs field effect tranny structure according to the present invention. The present invention provides a high resistance semiconductor region 11 on the front surface side between the gate 6 and drain 4 of a field effect transistor, and
'F's n-type channel, the thickness of the channel layer 2 under the north 4 and gate 3 is also reduced. That is, in the ME'5FET according to the present invention, by introducing the high resistance semiconductor region 11, 7<1. Hiragashi,! Although it has a structural wharf, it can demonstrate the characteristics of recess (packing), and has the effect of averaging the electric field of the drain 1HJ, reducing the maximum electric field, and improving the drain town life. has.

In addition, the gate breakdown voltage of GaAs MES7E'l' can be reduced to 42.5% by reducing the thickness of the active layer. Although t and ′ are known, the structure according to the present invention can also improve the reverse breakdown voltage between the gate and drain due to this effect.

Note that unlike the source side, electrons travel at high speed near the substrate interface on the drain side, so even if a high resistance region is provided on the front side, there is no deterioration in mutual conductance.

A method for manufacturing a field effect transistor according to the present invention will be described below.

First, the third step is performed using a known method. GILA8 shown in the figure.

Fabricate MESFET. , in Figure 3, 1 is C
For example, the r-doped semi-insulating GaAp' substrate, 2 has a carrier concentration of 7; α5 Ei
/'m of n-type GaAs grown in a vapor phase, 1.6 of Al in the active layer, 3. The gate length is 1 μm with the key gate electrode.
s4 is an AuGeNi varnish electrode, 5 is AuC, eN
This is the drain breakdown voltage of I. Here, between the source and gate,
Both the distance between the drain and the drain are 1 μm.

, then the third. Figure (A!, B, for example CVD5 on the element
After growing iO□21 for 2 DO, OA, 1. Third
5in2' between gate and drain as shown in figure (B)
) Gas etching using CF,
The surface of the active layer 2 is exposed. Furthermore, the accelerating voltage 5 keV, dose amount, 1. (11"
,, cm −” from above. Next, the cumulative surrounding air 1
．． After heat treatment at 290℃ for 1 hour in
3. Remove the film. MESFE'l shown in figure (0:
get. In FIG. 3(C), a portion 11 of the active layer 2 irradiated with protons becomes a high resistance layer.

The G a A s ME was fabricated using the above process.
The drain breakdown voltage of SFPi T is about 18v1 gate breakdown voltage, (d about 20v, which means that proton irradiation is applied and the drain breakdown voltage of the follower GaAs MESFET is about 1.
Considering that the gate breakdown voltage is approximately 1.2cm, the breakdown voltage has been significantly improved.
, it can be seen that the brightness is effective for '4σ.

Although the manufacturing method according to the present invention includes a heating process, a heating temperature of about 20°C (1,000°C) is sufficient. Even if the process according to the present invention is applied to after curing, the device characteristics will not deteriorate. Of course, the same effect can be obtained even if the process according to the present invention is performed in the middle of the device formation process. , this method is based on the chemistry of the working layer, etch,
Because it involves processes such as
can be significantly improved.

In the above embodiments, a GaAq MESFET and a method for manufacturing the same have been shown, but the present invention is of course effective for field effect transistors made of other semiconductor materials.

As is clear from the above description, according to the present invention, field effect transistors having high breakdown voltage can be obtained with good uniformity and high yield.
Can be applied to high-voltage devices to obtain excellent effects 3
,

[Brief explanation of the drawing]

Figures 1 (a) and (b) show conventional high-power GaAs
A cross-sectional view of MESFET, Figure 2 is the MESFFE of the present invention.
Cross-sectional views of T, FIG. 3 (5) to (Q is GaA according to the present invention)
s A diagram showing the manufacturing process of MESFET 1... Semi-insulating GaAs substrate 2... N-type GaAs operating layer 3... Gate electrode 4... Source electrode 5... Drain electrode 11... High-resistance GaAs region 21...SjO□ film 22...Proton irradiation patent applicant Uchiharaguchi, patent attorney and agent for NEC Corporation.

Claims (2)

[Claims] (1) In a Schottky gate field effect transistor in which a ridged gate Schottky electrode is disposed on a semiconductor active layer on a high-resistance substrate, and a north electrode and a drain electrode are arranged opposite to the gate electrode, the gate electrode and the drain electrode A field-effect transistor is characterized in that a part of the semiconductor active layer between the high-resistance semiconductor and (2) A method for spinning a Schottky gate field effect transistor in which a semiconductor operating node is formed on a high-resistance substrate, and a gate Schottky gate ti and a north and drain electrode terminal are formed on the semiconductor operating layer. C. A method for manufacturing a field effect transistor, characterized in that a raw sludge between a gate electrode and a drain electrode is irradiated with protons and then heat treated.