JPS62115781A - Field-effect transistor - Google Patents

Abstract

PURPOSE:To remarkably improve the drain dielectric strength even if an active layer has a high concentration of impurity, by utilizing a semiconductor having a large forbidden band width for the purpose of relieving the electric field produced by the application of a drain voltage. CONSTITUTION:An undoped or low-concentration semiconductor layer 8 is provided on an active layer 3 at least between the gate and drain, the layer 8 having an energy gap larger than that of the active layer. Further, a gate electrode 6 is provided on the active layer. The active layer 3 is formed of GaAs, and the undoped or low-concentration semiconductor layer 8 is formed of GaAlAs. Source and drain electrodes 4 and 5 are formed on the impurity- implanted regions of the undoped or low-concentration semiconductor layer. By providing the undoped GaAlAs on the surface in this manner, the dielectric strength of the drain can be improved remarkably.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to the structure of a junction field effect transistor used in the microwave band, and is particularly suitable for analog devices, and greatly improves drain breakdown voltage for high output. It is something.

[Background of the invention]

Conventional high-output field effect transistors used in the microwave band are designed to increase the drain voltage as shown in Figure 1 (a).
) as shown in FIG. 1(b), and a structure in which n-ten layer ohmic regions 7 were buried as shown in FIG. 1(b) [Signal Technical Report (IEICE) Vo 1.77,
Na212. ED77-80P19-25), in the figure, 1 is a semiconductor substrate, 2 is a buffer layer, 3 is an active layer, 4 is a source electrode, 5 is a drain electrode, and 6 is a gate electrode. However, these structures have the disadvantage that when the internal gain of the element at high frequencies is increased, the drain breakdown voltage is reduced. The reason for this is that in order to increase the internal gain of the device, it is necessary to increase the impurity concentration of the semiconductor layer, which becomes the functional layer, and as a result, as the impurity concentration of the semiconductor increases, the drain breakdown voltage decreases. .

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a field effect transistor that overcomes the above-mentioned drawbacks. That is, the object of the present invention is to provide a field effect transistor structure in which the drain breakdown voltage is increased without deteriorating even when the impurity concentration of the active layer is increased.

[Summary of the invention]

In order to achieve the above object, the present invention consists of the following main points.

(1) The active layer has shot metal or pn
Provide a direct connection.

(2) A semiconductor layer having a band gap larger than at least the semiconductor used for the active layer is provided between the source and the gate or between the gate and the drain.

(3) A semiconductor layer with a large forbidden band width is used with a small impurity concentration.

As described above, electric field relaxation by applying a drain voltage is achieved by using a semiconductor with a large forbidden band width. FIG. 2 shows the device structure of the present invention. The conventional structure is characterized in that a semiconductor 8 having a large forbidden band width and a small carrier concentration is provided on the active layer.

Generally, the breakdown voltage Va in semiconductors is experimentally determined and is expressed by the following equation.

VB': 60CEt/1. l)"(N[1/10")-
''That is, E is the forbidden width (energy gap) of the semiconductor, and Na is the carrier concentration within the semiconductor.

Therefore, in order to increase the drain breakdown voltage, it is better to use a semiconductor layer that breaks down with a large E8 value and a small NB value.

On the other hand, in GaxA Q, -xAs, Ex can be changed by changing the composition of Ga and AI2.

Eg increases as the amount of A2 increases. For example, G a
For 0.7A no, aA s, Et = 1.79
8eV, which is 1.42eV in the case of GaAs, and the Ex of GaAQAs is considerably large.

As described above, the breakdown voltage can be increased by using GaA Q As with a low concentration. Destruction of the drain breakdown voltage in field effect transistors is almost always caused by the concentration of the electric field on the surface between the gate and drain. Therefore, undoped GaA n As is formed on this surface.
By using this, the drain breakdown voltage can be significantly improved for the above reasons.

This example will be described below.

Example 1 A crystal structure as shown in FIG.
The O vacuum degree was 10-” Torr, and the growth condition was 650°C.
It is ℃. Si was used as the n-type dopant.

The amount of Si was controlled by the vapor pressure of Si. The substrate is a semi-insulating GaAs substrate 1 (crystal produced by undoped LEC method)
was used. The surface (100) was used. As a buffer layer, an undoped GaAs (not doped with Si) layer 2 was grown to a thickness of 0.5 μm. The active layer was made of n-type GaAs 3 doped with Si dopant and grown to a thickness of 0.12 μm with a concentration of 3×101°'Ql-''.Furthermore, an undoped GaA QAs layer 8 was grown on top of the active layer. .The composition of GaA Q As 8 is Ga 0.7A
Qo, aAs was used and the thickness was 0.15 μm.

These layers were formed by continuous growth.

After that, mesa etching was used for isolation between elements. The etching solution used was NHaOH: HzO.
z: Hz○ system. The etching mask used at that time was photoresist [Az 1350 J].

After removing the photoresist film, the undoped GaA in the regions that will become the source electrode 4 and drain electrode 5 as shown in FIG.
The Q As B layer was removed using an HCQ-based etching solution. At this time, CVD (Chemistry) using 5iHa gas was performed.
An insulating film of 3,000 layers is deposited using a cal vapor deposition method, holes for source/drain electrode regions are formed in a photoresist process, and using these as a mask, a GaAQAs thickness of 8 is selectively etched.

Thereafter, an AuG/eNi-based ohmic metal was deposited to a thickness of 3,500 mm, and a pattern was formed using a lift-off method. Then, in order to make it completely ohmic, it was alloyed in a reducing atmosphere.

After that, as shown in FIG. 3(c), the gates', i! Pole 6 was formed. The gate electrode 6 is made of undoped GaAQAs on the upper part.
Formed on 8. The formation method uses photolithography technology,
A gate pattern was formed, and the insulating film was etched using the photoresist film as a mask to expose the GaAα 8s layer, and 5,000 gate metals AQ were deposited. The gate metal pattern was formed by a commonly used soft-off method.

As a result, a drain breakdown voltage of 18V was obtained.

Example 2 To form the source/drain electrodes shown in FIG. 3(b) described in Example 1, undoped GaAQAs 8 was not selectively etched, but Si was etched using a photoresist film as a mask.
After implanting ions and annealing, an ohmic metal was deposited and an ohmic electrode of 4°5 was formed.The ion implantation conditions were 150Kev, 5XIQ"csl""
Multiple implantation of 8,120 KaV and 3×10''-8 was performed. Also, annealing was performed by an instantaneous annealing method using light.Other steps were the same as in the example.

The drain breakdown voltage of the field effect transistor prototyped as described above was 20V, which was twice the improvement compared to the conventional transistor.

〔Effect of the invention〕

According to the present invention, there is an effect that the drain breakdown voltage of a field effect transistor can be greatly improved. Especially undoped GaA
Q As crystal can change the forbidden IF band width by changing the AQ composition. In that sense, G for GaAs
The combination of aA Q As is optimal.

When InP is used for the active layer, InA Q As, I
For nGaAs, InP or InA Q As are used in combination.

The present invention can also be applied to a field effect transistor in which a layer having an impurity concentration opposite to that of the active layer is provided directly below the active layer (n-GaAs layer 3 in the embodiment) serving as a channel layer.

[Brief explanation of drawings]

FIG. 1 is a sectional view of a conventional device structure, FIG. 2 is a sectional view of the device structure of the present invention, and FIG. 3 is a sectional view of the device fabrication process. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... Buffer layer, 3... Active layer (n GaAs layer), 4... Source electrode, 5...
... Drain electrode, 6... Gate electrode, 7... High concentration semiconductor layer for ohmic use (n+ -GaAs layer), 8.
・・Semiconductor layer with wide forbidden band width (undoped GaA Q
As layer), 9... Insulating film (SiOz) m Bud 1 concave (long) Figure 2 Chi 3 concave (a)

Claims (1)

[Claims] 1. An undoped or low concentration semiconductor layer having a wider energy gap than the active layer is provided on the active layer at least between the gate and drain, and a gate electrode is provided on the active layer. Characteristics of field effect transistors. 2. In claim 1, Ga is used as the active layer.
As is used as an undoped or low concentration semiconductor layer.
A field effect transistor characterized by using AlAs. 3. A field effect transistor according to claim 1, wherein the source/drain electrodes are formed on a region in which an impurity is introduced into an undoped or low concentration semiconductor layer.