JP3534370B2 - Method for manufacturing semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and its manufacturing method.

[0002]

2. Description of the Related Art In recent years, in order to improve the performance of semiconductor devices, InxAl1-xAs (0 <x <1,
Hereinafter referred to as InAlAs) and InyGa1-yAs (0 <y
<1. In the following, referred to as InGaAs), the research and development of devices using materials such as InGaAs are active. The purpose of research and development of these elements is mainly to manufacture semiconductor devices having excellent characteristics such as basic devices of millimeter wave frequency band (30 GHz-300 GHz) utilization systems.

In order to reduce variations in the performance of semiconductor elements, it is necessary to perform highly accurate semiconductor processing for removing the semiconductor layer to a desired depth. As such a semiconductor processing technique, InGaAs is used as a layer to be etched. As I
There is a selective etching technique using nAlAs as an etching stop layer, and a selective etching technique using an aqueous citric acid solution has been reported by Tong et al. at the University of Illinois (T.
ong, et al., IEEE Electron Device Lett., Vol.13, N
o.10, 1992, pp.525-527).

[0004]

However, a field effect transistor (FET) manufactured by the above-described selective etching technique using an aqueous citric acid solution.
There is a problem that the gate characteristics, which is one of the electrical characteristics of ransistor), become defective.

An object of the present invention is to provide an FE having good gate characteristics.
A semiconductor device having T and a method of manufacturing the same are provided.

[0006]

The object is to perform a semiconductor device manufacturing process, an etching step of etching a semiconductor film of a sample having a semiconductor film formed on the surface from the surface, and an N--H bond next to the etching step. This can be achieved by including a step of immersing the sample in a basic aqueous solution of the compound having the above and a step of depositing a metal film to be a gate electrode.

According to the method of the present invention, Al is provided between the contact interface between the conductive material region serving as the gate electrode and the semiconductor material region in contact with the conductive material serving as the gate electrode and the end portion of the semiconductor material region serving as the channel layer. And a semiconductor film containing Ga is contained in the semiconductor material serving as the channel layer, and the channel layer is formed from the contact interface between the conductive material region serving as the gate electrode and the semiconductor material region contacting the conductive material region serving as the gate electrode. Distance to the edge of the semiconductor material region is 40 nm
It is possible to realize a semiconductor device having a FET having a novel structure as described below.

[0008]

DETAILED DESCRIPTION OF THE INVENTION

Example 1 An example of a method of manufacturing a semiconductor device according to the present invention will be described with reference to FIGS. 1 to 3 show InAlAs / I using the method for manufacturing a semiconductor device according to the present invention.
nGaAs HEMT (High Electron
FIG. 7 is a process diagram for manufacturing a gate recess of a Mobility Transistor.

The manufacturing steps up to the step shown in FIG. 1 in the HEMT manufacturing process of this embodiment will be described below.

MBE is formed on one main surface of the semi-insulating InP substrate 1.
A non-doped InAlAs layer 2 serving as a buffer layer by the (Molecular Beam Epitaxy) method,
Non-doped InGaAs layer 3 which becomes a channel layer, non-doped InAlAs layer 4 (2 nm) which becomes a spacer layer, n-type InAlAs layer 5 (12 nm, which becomes a carrier supply layer)
Impurity Si concentration for supplying n-type carriers 5 × 10 ¹⁸ cm
~ ² ), a non-doped InAlAs layer 6 (1
0 nm), the n-type InGaAs layer 7 to be an ohmic layer
(100 nm) was sequentially grown from the semi-insulating InP substrate 1 side. Here, the In composition ratio x of the InAlAs layer and the In composition ratio y of InGaAs were set to x = 0.52 and y = 0.53 so as to be lattice-matched to the InP substrate. Then, using a normal photolithography technique and a normal wet etching technique, a groove reaching from the surface to at least the non-doped InAlAs layer 2 serving as a buffer layer was formed in a portion other than the HEMT fabrication region (not shown). Next, the insulating film 8 was deposited, and the portions for forming the source electrode and the drain electrode were opened by the ordinary photolithography technique and the ordinary dry etching method to form the source electrode 9 and the drain electrode 10. Although silicon oxide SiO2 is used as the insulating film 8 here, other materials such as silicon nitride SiNx may be used, or a laminated structure of a plurality of insulating materials may be used. Next, the opening 11 corresponding to the gate length was formed in the insulating film 8 by the normal photolithography technique and the normal dry etching method. FIG. 1 is a cross-sectional view of what has undergone the above steps. Although the photoresist film used in the above-mentioned photolithography process is still deposited on the insulating film 8 in FIG. 1, the photoresist film is omitted.

And citric acid: hydrogen peroxide (30%):
The n-type InGaAs layer 7 serving as the ohmic layer was removed by etching using a water = 1: 1: 1 (weight) solution to expose the non-doped InAlAs layer 6 serving as the barrier layer (FIG. 2). Then, after washing with pure water and drying, an ammonia treatment (aqueous ammonia solution (aqueous ammonia solution (29%): water =
After immersing in 1: 100 (volume), washing with pure water) was performed.

Then, a gate electrode was formed to complete the HEMT (FIG. 3). The normal lift-off method was used for the electrode formation method.

The gate characteristic of the HEMT manufactured by using the HEMT manufacturing process of this embodiment is shown by a characteristic line 401 in FIG. Further, the gate characteristic of the HEMT manufactured without performing the above-mentioned ammonia treatment in the HEMT manufacturing process of this embodiment is shown by a characteristic line 402 in FIG. Regarding the gate characteristics, the absolute value of the gate current Igs was measured while the source voltage was 0 V and the gate voltage Vgs was changed. The ideal factor n and the effective built-in potential ΦB obtained from the gate voltage 0V to 0.4V are as follows.
ΦB = about 0.50 eV, n = about 1.4 on the characteristic line 402,
ΦB = 0.33 eV, and the ideal factor n is the characteristic line 40.
1 is improved by about 0.2. The characteristic line 402
ΦB of characteristic line 401 is about 0.17
eV has been improved. The absolute value of the gate current at a gate voltage of −3 V is about 1.6 A / cm ^{2 on} the characteristic line 401 and about 200 A / cm ² on the characteristic line 402.
The characteristic line 401 has a smaller leakage current by about two digits than Regarding the gate characteristics, the characteristic line 401 is improved as compared with the characteristic line 402 on both the positive side and the negative side of the gate voltage. This is because the above-described ammonia treatment was performed in the HEMT manufacturing process. In other words, performing the ammonia treatment has an effect of improving the gate characteristics.

In this embodiment, the thickness of the semiconductor layer is 24 nm from the interface between the gate electrode 12 and the non-doped InAlAs layer 6 serving as the barrier layer to the non-doped InGaAs layer 3 serving as the channel layer. Use structure. Therefore, it can be seen that the ammonia treatment of the present invention is effective for the production of HEMT having the specifications of advanced thinning. That is, since the ammonia treatment of the present invention is a process in which the semiconductor layer is hardly etched, the threshold voltage Vth does not change even with the thinned specifications, and the HE
MT can be manufactured with high accuracy and high yield. The large influence of etching on the threshold voltage Vth is, for example,
Even when the thickness of the non-doped InAlAs barrier layer 6 is increased from 10 nm in this embodiment to 26 nm in order to increase the process margin, the barrier layer 6 is scraped by 1 nm more than the designed value, and the HEMT threshold value is reduced. It can be seen that the voltage Vth changes by about 100 mV.

In other words, the advantage of the present invention in reducing the thickness of the ammonia treatment is that the distance from the interface between the gate electrode 12 and the barrier layer 6 to the channel layer 3 is 40 nm or less.
Realized EMT. In addition, the millimeter wave frequency band (3
0 GHz-300 GHz) The distance from the interface between the gate electrode 12 and the barrier layer 6 to the channel layer 3 which can be used for HEMT which is a basic device of the system is 24 n.
It has made it possible to realize a new HEMT that is less than m.

In the present embodiment, the ammonia treatment is carried out when forming the gate electrode of the HEMT, but a semiconductor element other than HEMT, for example, MESFET (MEtal Se) is used.
The same effect can be obtained for a micro field effect transistor (FET).

In this embodiment, the ohmic layer n
The type InGaAs layer 7 was etched using citric acid, which is a kind of organic acid. However, the effect of improving the gate characteristics is the same when other types of organic acids or inorganic acids are used. can get.

The aqueous ammonia solution used in this example was diluted to the above-mentioned specifications, but it is not limited to the above-mentioned specifications.

Further, the same effect can be obtained by using a basic solution of a compound having an NH bond instead of the ammonia used in this example.

Further, in this embodiment, the channel layer is made of InGa.
AsA, spacer layer, carrier supply layer, and barrier layer are made of InA.
It was made of InAs, but this InGaAs and InAlAs
For example, a combination of InGaAs and AlGaAs, a combination of GaAs and AlGaAs, and a combination of GaAsSb and A
It goes without saying that changing the material such as the combination of 1 GaAs does not depart from the gist of the present invention.

Embodiment 2 Another embodiment of the method of manufacturing a semiconductor device according to the present invention will be described. This embodiment is also shown in FIG.
The description will be made using 3 to 3. As described above, FIGS.
Is manufactured using the method for manufacturing a semiconductor device according to the present invention.
As / InGaAs HEMT (High Elect
FIG. 6 is a process diagram for producing a gate recess of a ron Mobility Transistor).

In the HEMT manufacturing process of the present embodiment, the manufacturing steps up to the step shown in FIG. 1 are the same as those in the first embodiment, and are omitted in this embodiment.

Next, the HEMT in the process of being manufactured up to the step shown in FIG. 1 was evacuated by a vacuum pump until a vacuum degree of 1 × 10 to ⁷ Torr or less was reached, and hydrogen bromide gas (HBr) was 60 mTorr. And fluorine gas (F ₂ ) 12
By irradiating light of about 193 nm emitted from the ArF excimer laser device in a mixed gas atmosphere of 0 mTorr, the n-type InGaAs layer 7 to be the ohmic layer is removed by etching and the non-doped InAlA to be the barrier layer is removed.
The s layer 6 was exposed (FIG. 2). Then, after washing with pure water and drying, an ammonia treatment (washing with pure water after immersing in an aqueous ammonia solution (aqueous ammonia solution (29%): water = 1: 100 (volume))) was performed.

Then, a gate electrode was formed to complete the HEMT (FIG. 3). The normal lift-off method was used for the electrode formation method.

The gate characteristic of the HEMT manufactured by using the HEMT manufacturing process of this embodiment is shown by a characteristic line 501 in FIG. A characteristic line 502 of FIG. 5 shows the gate characteristics of the HEMT manufactured without performing the above-mentioned ammonia treatment in the HEMT manufacturing process of this embodiment. Regarding the gate characteristics, the absolute value of the gate current Igs was measured while the source voltage was 0 V and the gate voltage Vgs was changed. The ideal factor n and the effective built-in potential ΦB obtained from the gate voltage 0V to 0.4V are n = about 1.2 on the characteristic line 501,
ΦB = about 0.55 eV, n = about 2.2 on the characteristic line 502,
ΦB = about 0.67 eV, and the characteristic line 501 is improved by n by about 1.0 compared with the characteristic line 502. The value obtained from the characteristic line 502 is larger for ΦB, but in the vicinity of the gate voltage 0 V to 0.4 V, the characteristic line 401
The gate characteristic is better when the gate current increases linearly (actually exponentially because the vertical axis of the figure is a logarithmic axis) as in FIG. That is, comparing the characteristic line 501 and the characteristic line 502, the characteristic line 501 shows better gate characteristics. This is because the above-described ammonia treatment was performed in the HEMT manufacturing process. In other words, performing the ammonia treatment has an effect of improving the gate characteristics.

For the same reason as described in the first embodiment, the HEMT in which the distance from the interface between the gate electrode 12 and the barrier layer 6 to the channel layer 3 is 40 nm or less, or further thinning is performed, and this embodiment is performed. The distance from the interface between the gate electrode 12 and the barrier layer 6 to the channel layer 3 as shown in FIG.
The production of a novel HEMT having a thickness of nm or less has become possible by using the present invention.

In the present embodiment, the ammonia treatment was performed when forming the gate electrode of the HEMT, but a semiconductor element other than HEMT, for example, MESFET (MEtal Se).
The same effect can be obtained for a micro field effect transistor (FET).

In this embodiment, the ohmic layer n
Type InGaAs layer 7 is etched with hydrogen bromide gas (HB
r) 60 mTorr and fluorine gas (F ₂ ) 120 mTo
The irradiation was performed by irradiating light of about 193 nm emitted from the ArF excimer laser device in a mixed gas atmosphere of rr, but a gas partial pressure different from the gas partial pressure, another kind of gas containing a halogen atom, etc. Even when the light emitted from the excimer laser devices of the above types is used, the effect of improving the gate characteristics can be obtained similarly.

The aqueous ammonia solution used in this example was diluted to the above specifications, but it is not limited to the above specifications.

Further, the same effect can be obtained by using a basic solution of a compound having an NH bond in place of the ammonia used in this example.

Further, in this embodiment, the channel layer is made of InGa.
AsA, spacer layer, carrier supply layer, and barrier layer are made of InA.
It was made of InAs, but this InGaAs and InAlAs
For example, a combination of InGaAs and AlGaAs, a combination of GaAs and AlGaAs, and a combination of GaAsSb and A
It goes without saying that changing the material such as the combination of 1 GaAs does not depart from the gist of the present invention.

[0032]

According to the present invention, the millimeter wave frequency band (30
(GHz-300 GHz) HEMT which is a basic device of a utilization system can be manufactured with a high yield.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a manufacturing process of a semiconductor device according to first and second embodiments of the present invention.

FIG. 2 is a sectional view of a semiconductor device manufacturing process according to the first and second embodiments of the present invention.

FIG. 3 is a sectional view of a semiconductor device manufacturing process according to the first and second embodiments of the present invention.

FIG. 4 is a diagram showing the gate characteristics of the HEMT with and without the ammonia treatment in the manufacturing process of the semiconductor device according to the first embodiment of the present invention.

FIG. 5 is a diagram showing the gate characteristics of a HEMT with and without ammonia treatment in the semiconductor device manufacturing process according to the second embodiment of the present invention.

[Explanation of symbols]

1 ... Semi-insulating InP substrate, 2 ... Non-doped InAlAs layer serving as buffer layer, 3 ... Non-doped InGaAs layer serving as channel layer, 4 ... Non-doped InAlAs layer serving as spacer layer, 5 ... Carrier supply layer n-type InAlAs layer, 6 ... Non-doped In serving as a barrier layer
AlAs layer, 7 ... n-type InGaA to be an ohmic layer
s, 8 ... Insulating film, 9 ... Source electrode, 10 ... Drain electrode, 11 ... Opening, 12 ... Gate electrode, 401,
501: HEMT gate characteristic line when ammonia treatment is performed. 402, 502 ... HEMT gate characteristic line without ammonia treatment.

─────────────────────────────────────────────────── --- Continuation of the front page (56) References JP-A-4-124839 (JP, A) JP-A-6-275656 (JP, A) JP-A-4-226041 (JP, A) JP-A-5- 206174 (JP, A) JP 7-235666 (JP, A) JP 8-83779 (JP, A) JP 64-66972 (JP, A) JP 7-263643 (JP, A) (58) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 21/28 H01L 21/28 301 H01L 21/306 H01L 21/338 H01L 29/812

Claims (2)

(57) [Claims] 1. A step of etching away a part of a semiconductor laminated film formed on one main surface of a semiconductor substrate by using an acidic aqueous solution, and a step of removing ammonia from the semiconductor surface exposed by the etching removal. a step of processing by Hita淅the basic aqueous solution containing, 該A
Treatment by immersing in a basic aqueous solution containing ammonia
And a step of depositing a metal to be a gate electrode on the exposed semiconductor surface in succession. 2. A step of etching away a part of a semiconductor laminated film formed on one main surface of a semiconductor substrate by using a gas containing a halogen atom, and a semiconductor surface exposed by performing the etching removal. A step of immersing the solution in a basic aqueous solution containing ammonia and a step of immersing the solution in a basic aqueous solution containing ammonia.
And a step of depositing a metal to be a gate electrode on the exposed surface of the semiconductor subsequent to the step of treating by the method described above.