JPS5916438A - Communication system - Google Patents

Abstract

PURPOSE:To attain the simultaneous transmission of a picture signal in a frequency band, by superimposing a digital signal on a synchronizing signal in the burst form with a pulse width of a horizontal synchronizing signal of the picture signal and transmitting the result simultaneously with the picture signal. CONSTITUTION:A shift register of a speed converting circuit 3 is shifted sequentially with an external clock to store an inputted digital signal. Since an output gate of the speed converting circuit 3 is opened when a pulse signal is applied with a clock having a frequency N times that of an external clock capable of superimposing about 10 bits of the stored digital signal in a pulse width of a horizontal synchronizing signal, the digital signal is read out and the data read out in about 10 bits is transmitted to a synthesizer 2 in the burst form. Further, the data is transmitted by being superimposed on the synchronizing signal of the picture signal transmitted to the synthesizer 2.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a communication system for transmitting an image signal and a digital signal, and more particularly to a communication system for transmitting a digital signal within the frequency band of the image signal.

(b) Prior Art and Problems Conventionally, when transmitting an image signal and a digital signal, a carrier wave with a frequency higher than the frequency band of the image signal was modulated with the digital signal and transmitted together with the image signal. This has the disadvantage that the occupied frequency band becomes wider.

(c) Object of the Invention An object of the present invention is to eliminate the above-mentioned drawbacks and to provide a communication system that can simultaneously transmit digital signals and image signals within the frequency band of image signals.

(d) Structure of the Invention In order to achieve the above object, the present invention provides a digital signal on a synchronization signal consisting of a horizontal synchronization signal, an equal picture signal, and a vertical synchronization signal of an image signal with the pulse width of the horizontal synchronization signal of the image signal. is characterized in that it is transmitted simultaneously with the image signal in burst form.

(e) Embodiment of the Invention An embodiment of the invention will be described below with reference to the drawings. 1st
The figure is a block diagram of a communication system according to an embodiment of the present invention.
The figure is a block diagram of the synchronization signal extraction circuit in Figure 1, and Figure 3 is a time chart of the waveforms of each part in Figure 2 (A) (B) (
C') corresponds to points a, b, and c in Figure 2. FIG. 4 shows a waveform mainly composed of a synchronization signal of an image signal, and the lower side shows the higher level. Figure 5 is a time chart of the waveforms of each part in Figure 1, where the image signal is the image signal, ■) is the output of the synchronization signal extraction circuit, 0 is the digital signal, (2) is the output of the speed conversion circuit 3, and (6) is the output of the speed conversion circuit 3. A waveform that combines an image signal and a digital signal (A), (+3), (c), Q)),
@ is a, a', b, b', b'', e, c in Figure 1.
', d -, 13g corresponds to point e"te'.

In the figure, 1 and 5 are synchronous signal extraction circuits, 2 is a synthesizer, 3°8 is a speed conversion circuit, 4 is a branching device, 6 is a clock signal extractor, 7 is a synchronous signal line regeneration circuit, a 9-digit frequency divider, 10 is a phase locked circuit (PLL circuit), 11 is a delay circuit, 12 is a NOT circuit, and 13 is a NAND circuit.

As is well known, the image signal is a signal as shown in Fig. 4, and the synchronization signal is a pulse signal with a frequency of 15.76 KHz, including a horizontal synchronization signal, an equivalent signal, a vertical synchronization signal, and a vertical synchronization signal. The pulse of the signal is wider than that of the horizontal synchronization signal, and the equivalent signal is a pulse signal with twice the frequency of the horizontal synchronization signal. Further, the waveform in FIG. 5(4) represents the part A in FIG. 4 as a representative image signal.

On the transmitting side, when an image signal is transmitted, a signal with a frequency of 15.76 KHz is extracted from the image signal in the synchronization signal extraction circuit 1 shown in FIG. 1, and a pulse signal is applied to the speed conversion circuit 3. To explain with reference to Fig. 2 and Fig. 3, a pulse signal as shown in (5) synchronized with a frequency of 15.76 KH2 is generated in the phase synchronization circuit 10 based on the image signal, and this pulse signal and this pulse signal are synchronized with each other. A signal delayed by the delay circuit 11 to generate a pulse 11 which is slightly narrower than the pulse of the horizontal synchronizing signal is inverted by the knot circuit 12, and a signal as shown in (B) is sent to the NAND circuit 13. The addition and logical product generate a signal as shown in D(C). this(
The signal shown at 0 is synchronized to the horizontal sync signal and is slightly narrower during the pulse than during the pulse of the horizontal sync signal. The signal shown in (C) corresponds to the signal shown in FIG. 5(B). - A digital signal as indicated by 0 in the 5-th power diagram is applied to the speed conversion circuit 3 in FIG. 5) is sequentially shifted and memorized, and this memorized digital signal is transferred to a clock with a frequency N times that of the external clock, which allows about 10 bits to be placed in the pulse of the horizontal synchronization signal, as shown in Fig. 5. ) When the pulse signal shown in FIG.
Approximately 10 bits of read data as shown in FIG. 0 is sent in burst form to the synthesizer 2 in FIG. It is sent out as a waveform as shown.

Note that the frequency of the equivalent signal is twice that of the horizontal synchronization signal, so 1
A digital signal is placed in the pulse position.

Next, the reception 11Ill will be explained using FIGS. 1 and 5. The received image signal superimposed with the digital signal shown in (■) is split into two at the splitter 4, one of which is input to the synchronization signal line regeneration circuit 7, and the other is input to the clock signal extraction circuit 6 and speed conversion circuit 8. input. At this time, the synchronization signal extraction circuit 5 extracts a 15.76 KHz synchronization signal from the image signal sent to the synchronization signal line regeneration circuit 7, and the synchronization signal extraction circuit 1 extracts the synchronization signal as explained in FIGS. 2 and 3. In a similar manner, generate a pulse of the same width as the horizontal sync pulse and a pulse of a slightly narrower width as described above,
Pulses of the same width are applied to the synchronization signal line regeneration circuit 7, and pulses of slightly narrower width are applied to the clock signal extraction circuit 6 and speed conversion circuit 8. In the synchronization signal line regeneration circuit 7, from the first point of this applied pulse, that is, the beginning point of the signal in the case of a horizontal synchronization signal and equivalent signal, to the end point, that is, the end point of the horizontal synchronization signal and equivalent signal. Up to this point, in the case of a vertical synchronizing signal, the digital signal is held slightly after the digital signal, and the digital signal is removed and sent out as the original image signal by holding it in the sample and hold circuit. On the other hand, in the clock signal extraction circuit 6, during the above-mentioned pulse sent to the synchronization signal extraction circuit 5, the external clock is
A clock with twice the frequency is extracted and added to the speed conversion circuit 8.

During the above-described pulse sent from the synchronization signal extraction circuit 5 using the clock frequency N times higher, the digital signal superimposed on the image signal is read and stored in a shift register (not shown). , a clock with the same frequency as the external clock on the transmitting side is generated by the frequency divider 9 at the VN branch point, and the digital signal stored in the shift register is read out by this clock ν. Sends the digital signal sent from the transmitting side.

The external clock used for the speed conversion circuit 3.6, a clock equivalent to this, and a clock multiplied by N times the same are the clocks generated by the synchronization signal extraction circuit 1.5 and are multiplied as required based on the clock shown in Figure 2 (O). If this is done, the clock extraction circuit 6 becomes unnecessary.

As described above, since the digital signal is transmitted along with the synchronization signal of the image signal, the frequency band used may be the same as that of the image signal.

(f) Effects of the Invention As explained in detail above, according to the present invention, when transmitting an image signal and a digital signal, the digital signal is transmitted along with the synchronization signal of the image signal, so that the image signal cannot be transmitted during the frequency band used. This has the effect of being able to transmit signals within the frequency band used.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a communication system according to an embodiment of the present invention;
Figure 2 is a block diagram of simultaneous signal extraction in Figure 1;
2 is a time chart of waveforms of each part in FIG. 2, FIG. 4 is a waveform mainly consisting of a synchronization signal of an image signal, and FIG. 5 is a time chart of waveforms of each part of FIG. 1. In the figure, 1.5 is a synchronization signal extraction circuit, 2 is a synthesizer, 3.8 is a speed conversion circuit, 4 is a brancher, 6 is a clock signal extractor, 7 is a synchronization signal line regeneration circuit, 9 is a frequency divider, 10 is a phase synchronization circuit, and 11 is a delay circuit. 12 shows a NOT circuit, and 13 shows a NAND circuit.

Claims (1)

[Claims] In a communication system for transmitting image signals and digital signals, the digital signal is placed in a burst on the synchronization signal of the image signal with the width of the horizontal synchronization signal of the image signal, and the digital signal is transmitted simultaneously with the image signal. A communication method characterized by: