JPH0213982B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a modulation device that performs MSK modulation of a control signal in a personal radio or the like.

Configuration of Conventional Example and Its Problems FIG. 1 shows a conventional MSK modulation device for control signals in a personal radio. The configuration of this conventional example will be explained below with reference to FIG. 1.

In FIG. 1, reference numeral 1 denotes a microprocessor, and this microprocessor 1 is connected to an NRZ signal receiving section 2 via a signal line 8. 3 is an address generation section, and this address generation section 3 is an NRZ
It is connected to the signal receiving section 2 by a signal line 9, and is also connected to the PLA section (program logic array section) 6.
is connected to by a signal line 10. 7 is a D/A converter (digital-to-analog converter), and this D/A converter 7 is connected to the PLA section 6 through a signal line 11, and the signal line 12 converts MSK modulation into an analog signal. Output a signal. 5 is a synchronous clock generating section, and this synchronous clock generating section 5
are microprocessor 1, NRZ signal receiver 2,
It is connected to the address generation section 3 and the PLA section 6 via a signal line 4, and the timings of each are synchronized.

Next, the operation of the above conventional example will be explained.

In Figure 1, the microprocessor 1 is
It works to create an NRZ signal that is MSK modulated. Therefore, MSK modulation of the NRZ signal is actually carried out by the five components from the NRZ signal receiving section 2 to the D/A converting section 7 in FIG. The NRZ signal receiving section 2 receives the NRZ signal sent from the outside in synchronization with the synchronous clock generated by the synchronous clock generating section 5, and controls the address generating section 3 through the signal line 9 using the received signal. Do the following. This address generator 3 is
Based on the signal received by the NRZ signal receiving section 2,
The address of output pattern data is controlled for the PLA section 6 through a signal line 10. Based on this address information, the PLA section 6 performs MSK conversion on the input NRZ signal, and outputs the digital signal to be outputted to the next D/A conversion section 7 through the signal line 11. These NRZ signal receiving section 2, address generating section 3, and PLA section 6 operate smoothly without malfunction by operating in synchronization with the clock signal generated by the synchronous clock generating section 5.

In this way, the output pattern signal created by the PLA section 6 is sent to the D/A converter section 7 through the signal line 11, converted into an analog signal, and outputted from the signal line 12.

However, in the conventional example described above, each component is made of hardware, and therefore a synchronization clock generator is required to synchronize the entire system, resulting in an expensive problem in terms of cost. It was hot.

OBJECT OF THE INVENTION The present invention eliminates the drawbacks of the above-mentioned conventional examples, which were conventionally realized only by hardware.
The purpose is to realize MSK modulation of control signals in personal radios, etc. using software.

Structure of the Invention In order to achieve the above object, the present invention arranges the synchronization of each component by the number of software steps, and also decomposes each bit into a plurality of samples when converting an NRZ signal to MSK. It is something that will be realized.

DESCRIPTION OF EMBODIMENTS The configuration of an embodiment of the present invention will be described below with reference to the drawings.

In FIG. 2, 13 is a microprocessor, and this microprocessor 13 is connected to a D/A converter 15 through three signal lines 14. The D/A converter 15 is a 3-bit D/A converter, and the result is sent to the signal line 1 as an analog signal.
It is output from 6.

Next, the operation of the above embodiment will be explained. The NRZ signal is MSK inside the microprocessor 13.
The result of the conversion is output to the D/A converter 15 as 3-bit data. thus,
The NRZ signal is MSK converted by software and becomes an analog signal in the D/A converter.

Next, details of the procedure for converting the NRZ signal to MSK will be explained below with reference to FIG. 3.

In FIG. 3, 17 is a step for inputting 1 bit of data to be transmitted after MSK conversion. 18 determines whether the input data is 1 or 0,
If it is 0, the output inversion flag is inverted in step 19. When this output inversion flag is 1, the two's complement is calculated for the MSK converted data to be output. 20 corresponds to the data entered in step 17
This is a step to set the initial address of the MSK conversion table. 21 is a step of reading data according to the address of the MSK conversion table.
Next, in step 22, it is determined whether the output inversion flag is 1 or 0, and in step 21, it is determined whether to calculate the two's complement of the data read from the MSK conversion table. If the output inversion flag is 1,
At step 23, a two's complement number is calculated. In step 24, the MSK converted data is output to the D/A converter.

Next, in step 25, the address of the MSK conversion table is incremented, and in step 26, the address of the MSK conversion table is incremented.
It is determined whether the 1-bit MSK conversion has been completed.
Twelve data are held in the MSK conversion table for each bit, and the process returns to the table reading routine again according to the address in step 21 until the 12 data have been output.

Once one bit of data has been output, it is determined in step 27 whether all transmission has been completed, and if it has been completed, the process returns to the main routine. If it has not yet been completed, the process returns to step 17, the 1-bit data input routine.

In this MSK conversion routine, the interval at which data is output to the D/A converter is fixed by the number of machine cycles in the software, so that it can be performed with the precision of a crystal that determines the machine cycle time. By adopting this method, it is possible to keep the frequency tolerance of MSK signals required for personal radios within ±200 ppm.

Next, the MSK conversion table is shown in FIG.

FIG. 4a is an MSK conversion table corresponding to data 0. There are 12 pieces of data, each with 3
It consists of bit data. FIG. 4b is an MSK conversion table corresponding to data 1. Using this table, the result of MSK conversion is
As shown in the figure.

In FIG. 5, a indicates data subjected to MSK modulation. FIG. 5b shows the result of MSK modulation of data a. While keeping the phase continuous, 1200Hz signal for data 1, and 1200Hz signal for data 0.
MSK modulation is performed while supporting 1800Hz signals. c is an output inversion flag, and the output inversion flag is inverted when data a is 0. thus,
In the section where the output inversion flag is 1, data in the MSK conversion table is output to the D/A converter while being converted into two's complement.

In this way, according to this embodiment, MSK modulation, which was conventionally possible only with hardware, becomes possible with software.

Effects of the Invention The present invention has the above-described configuration, and provides the following effects.

(a) MSK modulation method can be realized by software.

(b) Since the MSK modulation method can now be implemented using software, costs can be reduced.

[Brief explanation of drawings]

Fig. 1 is a block diagram of a conventional modulation device, Fig. 2 is a block diagram of a modulation device according to an embodiment of the present invention, Fig. 3 is a flowchart of the same device, and Figs. 4a and b are tables of the same device. Diagram showing data, 5th
The figure is an explanatory diagram of the operation of the device. 13...Microprocessor, 14...D/A
Conversion section.

[Claims]

1. A receiving means for receiving a signal modulated by the MSK method, a converting means for converting the signal received by the receiving means into a zero-crossing signal, a sampling means for sampling the zero-crossing signal at an arbitrary number per bit, and a sampling result. A delay detection means performs delay detection from the delay detection means, and when the data at an arbitrary sampling position matches the sampling data at the next position with respect to the delay detection signal of this delay detection means, the sampling data is stored as is, and when it does not match, the sampling data is stored as is. is a waveform shaping means that shapes the waveform of the sampled data while replacing it with the result of waveform shaping one sampling before, detects a change point of the waveform shaped signal in an arbitrarily determined 1 bit interval, and detects a change point of the waveform shaped signal in an arbitrarily determined 1 bit interval The value of the phase shift counter is controlled based on the positional relationship corresponding to the bit interval, and if the value of the phase shift counter exceeds an arbitrarily determined interval, bit synchronization with the waveform-shaped signal is achieved by controlling the 1-bit interval. What is claimed is: 1. A demodulating device comprising means for determining the bit synchronization signal and a waveform-shaped signal.