JPS59164241U - セラミツクパツケ−ジ - Google Patents

セラミツクパツケ−ジ

Info

Publication number
JPS59164241U
JPS59164241U JP1983057528U JP5752883U JPS59164241U JP S59164241 U JPS59164241 U JP S59164241U JP 1983057528 U JP1983057528 U JP 1983057528U JP 5752883 U JP5752883 U JP 5752883U JP S59164241 U JPS59164241 U JP S59164241U
Authority
JP
Japan
Prior art keywords
ceramic package
package
ceramic
package body
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1983057528U
Other languages
English (en)
Inventor
小沢　紀子
平賀　幸二郎
Original Assignee
沖電気工業株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 沖電気工業株式会社 filed Critical 沖電気工業株式会社
Priority to JP1983057528U priority Critical patent/JPS59164241U/ja
Publication of JPS59164241U publication Critical patent/JPS59164241U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第１図は従来のセラミックパッケージを示す断面図、第
２図は本考案によるセラミックパッケージの第１の実施
例を示す断面図、第３図は第２の実施例を示す断面図で
ある。 ４・・・半導体素子、５・・・シリコン樹脂またはエポ
キシ樹脂、６・・・パッケージ本体、７・・・接ｉ面、
８・・・ひさし部、９・・・リード端子、１０・・・ひ
さし部、１１・・・パッケージ本体、１２・・・金属リ
ング、１３・・・接着面、１４・・・リード端子。

Claims (1)

    【実用新案登録請求の範囲】
  1. 内部に半導体素子を実装するパッケージ本体と、このパ
    ッケージ本体上部の接着面に接着される蓋とを有するセ
    ラミックパッケージにおいて、パッケージ本体の内周面
    側にセラミックまたは金属材料によりひさし部を設けた
    ことを特徴とするセラミックパッケージ。
JP1983057528U 1983-04-19 1983-04-19 セラミツクパツケ−ジ Pending JPS59164241U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1983057528U JPS59164241U (ja) 1983-04-19 1983-04-19 セラミツクパツケ−ジ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1983057528U JPS59164241U (ja) 1983-04-19 1983-04-19 セラミツクパツケ−ジ

Publications (1)

Publication Number Publication Date
JPS59164241U true JPS59164241U (ja) 1984-11-02

Family

ID=30187829

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1983057528U Pending JPS59164241U (ja) 1983-04-19 1983-04-19 セラミツクパツケ−ジ

Country Status (1)

Country Link
JP (1) JPS59164241U (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62172176U (ja) * 1986-04-15 1987-10-31
JP2018206825A (ja) * 2017-05-31 2018-12-27 新電元工業株式会社 電子モジュール

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62172176U (ja) * 1986-04-15 1987-10-31
JP2018206825A (ja) * 2017-05-31 2018-12-27 新電元工業株式会社 電子モジュール

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