JPS59161897A - Multilayer printed circuit board - Google Patents

Multilayer printed circuit board

Info

Publication number
JPS59161897A
JPS59161897A JP3580883A JP3580883A JPS59161897A JP S59161897 A JPS59161897 A JP S59161897A JP 3580883 A JP3580883 A JP 3580883A JP 3580883 A JP3580883 A JP 3580883A JP S59161897 A JPS59161897 A JP S59161897A
Authority
JP
Japan
Prior art keywords
multilayer printed
printed circuit
circuit board
clearance
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3580883A
Other languages
Japanese (ja)
Other versions
JPH0449797B2 (en
Inventor
小沢 芳幸
千石 則夫
博 香西
川島 誠一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP3580883A priority Critical patent/JPS59161897A/en
Publication of JPS59161897A publication Critical patent/JPS59161897A/en
Publication of JPH0449797B2 publication Critical patent/JPH0449797B2/ja
Granted legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は、貫通スルーホールと多重スルーホールを有す
る多層印刷回路基板に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a multilayer printed circuit board having through-holes and multiple through-holes.

〔従来技術〕[Prior art]

第1図は従来の多層印刷回路基板の一例を示す断面図で
あり、1は基材、2は貫通スルーポール、イ     
 6は多重スルーホール、4はプリプレグの熱圧着によ
る接着剤である。電源層としての内層5には、貫通スル
ーホール2用のクリアランス3以外のクリアランスは設
けられていない。このような構造では、層間の接着強度
が不足し、基板の剥離等が生じ易い。
FIG. 1 is a cross-sectional view showing an example of a conventional multilayer printed circuit board, in which 1 is a base material, 2 is a through-hole pole, and
Reference numeral 6 indicates multiple through holes, and reference numeral 4 indicates an adhesive for thermocompression bonding of prepreg. The inner layer 5 serving as the power supply layer has no clearance other than the clearance 3 for the penetrating through hole 2. In such a structure, the adhesion strength between the layers is insufficient, and peeling of the substrate is likely to occur.

これに対処するために、従来の多層印刷回路基板には、
電源層としての内層に、貫通スルーホール用のクリアラ
ンスと同径のクリアランスを設けた構造のもつもある。
To address this, traditional multilayer printed circuit boards include
Some have a structure in which the inner layer serving as the power supply layer has a clearance with the same diameter as the clearance for the through-hole.

第2図はそのような構造を示す部分断面平面図であり、
第1図と同じ部分には同符号を付しである。3′が追加
されたクリアランスである。
FIG. 2 is a partially sectional plan view showing such a structure,
The same parts as in FIG. 1 are given the same reference numerals. 3' is the added clearance.

この構造によれば、追加したクリアランス30分だけ層
内の接着強度が増すことは明らかである。
It is clear that this structure increases the bond strength within the layer by the additional 30 minutes of clearance.

しかしその反面、電源層としての内層5の抵抗が増加す
るため、内層5を通じて搭載部品に供給される電源電圧
の安定度が悪化するという問題がある。
However, on the other hand, since the resistance of the inner layer 5 as a power supply layer increases, there is a problem that the stability of the power supply voltage supplied to the mounted components through the inner layer 5 deteriorates.

〔発明の目的〕[Purpose of the invention]

本発明は前述の問題点に鑑み、十分な層間接着強度を有
し、かつ、電源電圧の安定化をはかった多層印刷配線基
板を提供しようとするものである。
In view of the above-mentioned problems, the present invention aims to provide a multilayer printed wiring board that has sufficient interlayer adhesive strength and stabilizes the power supply voltage.

〔発明の概要〕[Summary of the invention]

本発明は、貫通スルーホールと多重スルーホールを有−
jる多層印刷回路基板において、少な(とも電源層どし
て用いられる内層に、貫通スルーホール用のクリアラン
スより径の小さなりリアランスを設けることにより、上
記目的を達成しようとするものである。
The present invention has through-holes and multiple through-holes.
In a multilayer printed circuit board, the above object is achieved by providing a small clearance (which is smaller in diameter than the clearance for a through-hole) in an inner layer used as a power supply layer or the like.

〔発明の実施例〕[Embodiments of the invention]

第3図および第4図によって、本発明の一実施例を説明
する。
An embodiment of the present invention will be described with reference to FIGS. 3 and 4. FIG.

第3図は本発明による多層印刷回路基板の断面図であり
、第4図はその部分断面平面図である。
FIG. 3 is a cross-sectional view of a multilayer printed circuit board according to the present invention, and FIG. 4 is a partially cross-sectional plan view thereof.

なお、第1図と同一部分は同一符号を付し説明に代える
Note that the same parts as in FIG. 1 are designated by the same reference numerals and will not be described.

本実施例においては、内wI5に、貫通スルーホール2
用の直径φ1のクリアランス3のほかに、直径φ2(た
だしφ2くφ1)のクリアランス7が多重スルーホール
6と対応して設けられている。
In this embodiment, a through hole 2 is provided in the inner wI5.
In addition to the clearance 3 having a diameter of φ1, a clearance 7 having a diameter of φ2 (however, φ2 minus φ1) is provided corresponding to the multiple through hole 6.

このクリアランス7の直径φ2は、内層5の抵抗(を圧
降下)が搭載部品への供給電圧の安定度の面で決まる上
限を越えないように、かつ必要な層間接着強度が得られ
るように決められるものである。本実施例ではφ1 =
 1.6 mm、φ2 = 0.8 mm 。
The diameter φ2 of this clearance 7 is determined so that the resistance (pressure drop) of the inner layer 5 does not exceed the upper limit determined by the stability of the voltage supplied to the mounted components, and so that the necessary interlayer adhesive strength is obtained. It is something that can be done. In this example, φ1 =
1.6 mm, φ2 = 0.8 mm.

格子間隔=1.905 mmとなっており、φにφ2=
 l、 6 mmの従来品(第2図の構造のもの)に比
べ、内層5の抵抗値(電圧降下)は約65%に減少し、
電源電圧の安定度を大幅に改善でき、またほぼ同等の十
分な層間接着強度を得られた。
The grid spacing is 1.905 mm, and φ2=
The resistance value (voltage drop) of the inner layer 5 is reduced to approximately 65% compared to the conventional product (with the structure shown in Figure 2) with a diameter of 6 mm.
It was possible to significantly improve the stability of the power supply voltage, and to obtain almost the same sufficient interlayer adhesion strength.

〔発明の効果〕〔Effect of the invention〕

本発明は前述のようK、少なくとも電源層としての内層
に、貫通スルーホール用クリアランスより小径のクリア
ランスを設けることによって、十分な層間接着強度を持
ち、かつ電源安定度を大幅に改善した多層印刷配線基板
を実現できる効果を有するものである。
As mentioned above, the present invention provides a multilayer printed wiring that has sufficient interlayer adhesion strength and greatly improves power stability by providing a clearance smaller in diameter than the clearance for the through-hole in at least the inner layer serving as the power supply layer. This has the effect of realizing a substrate.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は多層印刷回路基板の従来例を示す断面図、第2
図は他の従来例を示す部分断面平面図、第3図は本発明
の一実施例を示す断面図、第4図は同実施例を示す部分
断面平面図である。 2・・・貫通スルーホール、  3.7・・・クリアラ
ンス、  5・・・内層(を源層)。 代理人弁理士 高 橋 明 夫 〆・・ ゛。 ゝ     〆 第3図 ”!f−4図
Figure 1 is a sectional view showing a conventional example of a multilayer printed circuit board;
The figure is a partially sectional plan view showing another conventional example, FIG. 3 is a sectional view showing an embodiment of the present invention, and FIG. 4 is a partially sectional plan view showing the same embodiment. 2... Penetrating through hole, 3.7... Clearance, 5... Inner layer (source layer). Representative Patent Attorney Akio Takahashi...゛.ゝゝFigure 3''!Figure f-4

Claims (1)

【特許請求の範囲】[Claims] (11X通スルーホールおよヒ多重スルーホールを有す
る多層印刷回路基板において、少な(とも電源層として
の内層に1貫通スルーホール用のクリアランスより小径
のクリアランスを設けたことを特徴とする多層印刷回路
基板。
(In a multilayer printed circuit board having 11X through-holes and multiple through-holes, a multilayer printed circuit board is characterized in that a clearance smaller in diameter than that for a 1-through through-hole is provided in an inner layer serving as a power supply layer.) substrate.
JP3580883A 1983-03-07 1983-03-07 Multilayer printed circuit board Granted JPS59161897A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3580883A JPS59161897A (en) 1983-03-07 1983-03-07 Multilayer printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3580883A JPS59161897A (en) 1983-03-07 1983-03-07 Multilayer printed circuit board

Publications (2)

Publication Number Publication Date
JPS59161897A true JPS59161897A (en) 1984-09-12
JPH0449797B2 JPH0449797B2 (en) 1992-08-12

Family

ID=12452224

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3580883A Granted JPS59161897A (en) 1983-03-07 1983-03-07 Multilayer printed circuit board

Country Status (1)

Country Link
JP (1) JPS59161897A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6355943A (en) * 1986-08-26 1988-03-10 Matsushita Electric Works Ltd Chip carrier
US6846993B2 (en) 2001-10-12 2005-01-25 Nec Corporation Multilayer printed wiring board and its manufacturing method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6355943A (en) * 1986-08-26 1988-03-10 Matsushita Electric Works Ltd Chip carrier
US6846993B2 (en) 2001-10-12 2005-01-25 Nec Corporation Multilayer printed wiring board and its manufacturing method
US7290333B2 (en) 2001-10-12 2007-11-06 Nec Corporation Manufacturing method of a multilayer printed wiring board

Also Published As

Publication number Publication date
JPH0449797B2 (en) 1992-08-12

Similar Documents

Publication Publication Date Title
JPH0163136U (en)
JPS59198790A (en) Printed circuit board
JPS59161897A (en) Multilayer printed circuit board
JPS6286793A (en) Mounting methed of electronic part
JPS60180186A (en) Printed board
JPS627192A (en) Printed wiring board
JPS5998669U (en) double-sided printed wiring board
JPS59113683A (en) Printed board
JPS5920671U (en) printed wiring board
JPS5812973U (en) multilayer printed circuit board
JPS618987A (en) Composite printed circuit board
JPS60146344U (en) electronic components
JPS62102589A (en) Manufacture of double-sided connection type flexible printedcircuit substrate
JPH02220306A (en) Tape for tab and manufacture thereof and tape film for tab to be used therein
JPS60119771U (en) hybrid integrated circuit board
JPS61245596A (en) Multilayer mounted structure
JPS6355997A (en) Electronic unit
JPS62239597A (en) Electronic parts attaching plate
JPS61136281A (en) High permeability printed circuit board
JPS58122436U (en) composite parts
JPS6355943A (en) Chip carrier
JPS58216495A (en) Printed circuit board
JPS6092828U (en) Electronic component mounting structure
JPS59185870U (en) Mounting structure of chip components on printed circuit board
JPS59135791A (en) Flexible jumper