JPS5916058A - Program - Google Patents

Program

Info

Publication number
JPS5916058A
JPS5916058A JP57124446A JP12444682A JPS5916058A JP S5916058 A JPS5916058 A JP S5916058A JP 57124446 A JP57124446 A JP 57124446A JP 12444682 A JP12444682 A JP 12444682A JP S5916058 A JPS5916058 A JP S5916058A
Authority
JP
Japan
Prior art keywords
execution process
subroutine
program
execution
abnormality
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57124446A
Other languages
Japanese (ja)
Inventor
Toshikazu Takato
高藤 敏和
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP57124446A priority Critical patent/JPS5916058A/en
Publication of JPS5916058A publication Critical patent/JPS5916058A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Preventing errors by testing or debugging software

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Testing And Monitoring For Control Systems (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To prevent the storage of incorrect execution process by adding a function of checking the adequacy of an execution process to an execution process tracing function, and stopping the storage of the execution process immediately if abnormality of the execution process is found. CONSTITUTION:When subroutines are executed normally in the order of a main routine, subroutine 1, subroutine 2- subroutine 9, the final result of an execution process information area is shown by a figure (a). If some abnromality occurs during original execution transition from the subroutine 1 to the subroutine 2 to cause transition to the middle of a subroutine 4, the execution process area is shown by a figure (b). In this case, there is not exit passing information corresponding to pieces of exit passing information 1 and 4, so the execution processing is detected as program execution abnormality.

Description

【発明の詳細な説明】 発明の対象 本発明は、電子計算機システム、その他各種装置を制御
するプログラムに係り、特にプログラムの動作の異常を
検証するために好適な、プログラム実行過程をトレース
する機能をもったプログラム如関する。
DETAILED DESCRIPTION OF THE INVENTION Object of the Invention The present invention relates to a program for controlling computer systems and other various devices, and provides a function for tracing the program execution process, which is particularly suitable for verifying abnormalities in program operation. Please refer to the program.

従来技術 従来より、プログラムの異常動作を検証する手段として
、プログラムの動作過程をトレースする機能を持ったプ
ログラムは存在した。
BACKGROUND ART Conventionally, there have been programs that have a function of tracing the operating process of a program as a means of verifying abnormal program operations.

その方法はプログラムの要Pfr(例えばサブルーチン
の入口)K、その部分を経過したことを記憶するプログ
ラムを挿入しておく方法が一般的であった。この方法に
よれば、プログラムの実行過程を記憶することが出来、
異常が発生した後に停止して、その実行過程を読み出す
ことKよって、異常の発生箇所を推定し得る。
A common method for this is to insert a key point Pfr (for example, the entrance of a subroutine) K of the program and a program that memorizes the passage of that part. According to this method, it is possible to memorize the program execution process,
By stopping after an abnormality occurs and reading out the execution process, the location where the abnormality has occurred can be estimated.

しかし、従来の方法であれば、プログラムの動作によっ
ては、異常発生時に実行過程記憶エリア自体を破壊、あ
るいは不要な情報を記憶してしまう等、実行過程記憶エ
リア自体をプログラムの異常動作から保護する機能を持
っていなかった。このため、正しい実行過程を得られず
却って異常解析が混乱するという欠点を持っていた。
However, with conventional methods, depending on the program's behavior, the execution process storage area itself may be destroyed or unnecessary information may be stored when an abnormality occurs, so the execution process storage area itself is protected from abnormal program operations. It had no function. For this reason, it has the disadvantage that the correct execution process cannot be obtained and, on the contrary, abnormality analysis is confused.

発明の目的 本発明の目的は、プログラムの実行過程トレース機能に
、実行過程の妥当性を検査する機會巨を付加し、実行過
、程に異常が認められた場合kま、ただちに実行過程の
記憶を停止することによって、正しくない実行過程を記
憶することを防く゛手段を提供することにある。
Purpose of the Invention The purpose of the present invention is to add the opportunity to check the validity of the execution process to the program execution process trace function, and to immediately store the execution process when an abnormality is detected in the execution process. The object of the present invention is to provide a means to prevent an incorrect execution process from being stored by stopping the process.

本発明は、プログラムの実行過程に異常〃;発生したこ
とを、入口の通過と出口の通過75;対応しているサブ
ルーチン群で構成されてし・るプログラムにおいては、
サブル−チンの入口を実行した後、必らずそれに対応し
た出口を実行することに着目し、 (1)  サブルーチンの入口と出口を通過する毎に入
口と出口を識別する符号ビットとすブルーチン番号を記
憶するプログラムを実行する。
The present invention detects an abnormality in the execution process of the program; the passage of an entrance and the passage of an exit 75; and a program consisting of a group of corresponding subroutines.
Focusing on the fact that after executing a subroutine entry, the corresponding exit is always executed. Execute the program that stores the .

+21  +1)に示した符号とサブルーチン番号なI
己憶する記憶装置の容量はプログラム全体の最大ネスト
数の2倍(入口と出口)以上準備する。
+21 +1) The code and subroutine number I
The capacity of the self-storage device should be at least twice the maximum number of nests (entrance and exit) of the entire program.

(8)  サブルーチンの出口を実行し、実行過程情報
格納後、当該サブルーチンの入口を通過した実行過程情
報が記憶されているか否かを検査する機能を設け、サブ
ルーチンの出口を通過した実行過程情報に対応した当該
サブルーチンの入口を通過した実行過程情報が見つから
ないときは異常として、実行過程情報を退避又は、実行
過程情報の記憶を停止する。
(8) After executing the exit of a subroutine and storing the execution process information, a function is provided to check whether the execution process information that passed through the entrance of the subroutine is stored, and the execution process information that passed through the exit of the subroutine is If the execution process information that has passed through the entrance of the corresponding subroutine is not found, it is considered an abnormality and the execution process information is saved or storage of the execution process information is stopped.

(4)  サブルーチンの入口を経過する際、実行過程
情報に、いずれかのサブルーチンの出口を経過した実行
過程情報が記憶されているか否かを検出する機能を設け
、サブルーチンの出口を経過した実行過程情報が見つか
らないときは、異常として実行過程情報を退避又は実行
過程情報の記憶を停止する。
(4) When passing the entrance of a subroutine, a function is provided to detect whether execution process information that has passed the exit of any subroutine is stored in the execution process information, and the execution process that has passed the exit of the subroutine is If the information is not found, it is assumed that there is an abnormality and the execution process information is saved or storage of the execution process information is stopped.

の4つの機能により、プログラムの実行過程を記憶する
ことと、実行過程情報の正当性を保証することを実現す
るものである。
These four functions realize the storage of the program execution process and the guarantee of the validity of the execution process information.

発明の実施例 以下、本発明の一実施例を第1図〜第5図により説明す
る。
Embodiment of the Invention An embodiment of the present invention will be described below with reference to FIGS. 1 to 5.

第1図は、本発明を実施するプログラムのサブルーチン
の構成であり、入口と出口に、実行過程情報を記憶する
サブルーチンである実行過程情報記憶サブルーチン(1
)、実行過程情報記憶サブルーチン(2)を実行する。
FIG. 1 shows the configuration of a subroutine of a program that implements the present invention, and shows the execution process information storage subroutine (1), which is a subroutine that stores execution process information at the entrance and exit.
), the execution process information storage subroutine (2) is executed.

第2図は、実行過程情報エリアの例であり、入口/出口
は、入口通過または出口通過を識別する符号ピットであ
る。
FIG. 2 is an example of an execution process information area, where the entry/exit is a code pit that identifies an entrance passage or an exit passage.

サブルーチン番号は、各サブルーチンに個有の番号を示
す。
The subroutine number indicates a number unique to each subroutine.

第3図、第4図は、それぞれ実行過程記憶サブルーチン
[11、実行過程記憶サブルーチン(2)の処理例を示
す。なお、実行過程情報エリアは初期状態において、出
口通過状態に設定しておく第5図〜第8図は、本発明を
実施した際の具体的実行例である。
3 and 4 show processing examples of the execution process storage subroutine [11] and the execution process storage subroutine (2), respectively. Note that the execution process information area is set to the exit passing state in the initial state. FIGS. 5 to 8 show specific examples of implementation of the present invention.

第5図は、正常時のサブルーチン動作順序でメインルー
チン−サブルーチン1〜サブルーチン2〜サブルーチン
5〜サブルーチン9の順序に実行され、実行過程情報エ
リアの最終結果は第6図のとおりになる。この結果、入
口通過情報と出口通過↑W報は対応しており正常な動作
であったことが判る。
In FIG. 5, the subroutines are executed in the order of main routine - subroutine 1 - subroutine 2 - subroutine 5 - subroutine 9 in the order of normal subroutine operation, and the final result in the execution process information area is as shown in FIG. 6. As a result, it can be seen that the entrance passage information and the exit passage ↑W information correspond to each other, indicating that the operation was normal.

第6図は異常時の一例であるが、本来サブルーチン1か
らサブルーチン2へ移行、すべきときに何らかの異常に
よりサブルーチン4の途中に移行したと仮定すると実行
過程情報エリアは第8図のとおりとなる。ここで出口通
過情報(1゜4)に対応する入[1通過情報が存在しな
いため、プログラム実行異常として検出する。
Figure 6 is an example of an abnormality.If we assume that the transition was originally from subroutine 1 to subroutine 2, but due to some abnormality the transition was made to subroutine 4, the execution process information area would be as shown in Figure 8. . Here, since the input [1 passage information corresponding to the exit passage information (1°4) does not exist, it is detected as a program execution abnormality.

発明の効果 本発明によれば、 (1) プログラム実行過程を記憶することによって異
常動作時の検証が可能である。
Effects of the Invention According to the present invention, (1) By storing the program execution process, it is possible to verify abnormal operation.

(2) プログラム実行過程の異常を検出し、実行過程
情報の保護、退避等の処理を実行できる等の機能があり
、これによって、従来欠点であった、実行過程情報の喪
失、破壊、等を防止できる。
(2) It has a function that can detect abnormalities in the program execution process and perform processing such as protecting and saving the execution process information, thereby preventing the loss or destruction of the execution process information, which was a conventional drawback. It can be prevented.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本発明を採用したサブルーチンの構成図、第
2図は、実台過程情報記憶エリアの構成図、第3図は、
実行過程記憶サブルーチン+11の内容例説明図、第4
図は、実行過程配憶サブルーチン(2)の内容例説明図
、第5図は、正しいプログラムの実行過程の説明図、第
6図は、第5図のプログラム実行後の実行過程情報記憶
エリアの内容説明図、第7図は、プログラムの実行過程
に異常がある場合の説明図、第8図は第7図のプログラ
ム実行後の実行過程情報記憶エリアの内容説明図である
。 1・・・実行過程情報記憶エリア 2・・・実行過程情報ポインタ 才 4 図 莫才1杼寥乙召し一η−7)トーチン(2)ys   
FIG. 1 is a block diagram of a subroutine employing the present invention, FIG. 2 is a block diagram of a real machine process information storage area, and FIG.
Explanatory diagram of an example of the contents of the execution process storage subroutine +11, No. 4
The figure is an explanatory diagram of a content example of the execution process storage subroutine (2), Figure 5 is an explanatory diagram of the correct program execution process, and Figure 6 is an illustration of the execution process information storage area after the program execution in Figure 5. 7 is an explanatory diagram of the case where there is an abnormality in the program execution process, and FIG. 8 is an explanatory diagram of the contents of the execution process information storage area after the program execution of FIG. 7. 1... Execution process information storage area 2... Execution process information pointer pointer
figure

Claims (1)

【特許請求の範囲】[Claims] 1 プログラムによって制御または実行される装置にお
いて、そのプログラムが異常な動作をおこしたどき、異
常の解析を容易ならしめるためにそのプログラムが実行
した過程を記憶するための処理ルーチンを持たせ、更に
プログラムの暴走等が発生した場合K、実行過程の記憶
を停止する機能を与えること釦より、暴走等により、実
行過程の記憶そのものが無意味になることを防止するこ
とを特徴としたプログラム。
1. In a device controlled or executed by a program, when the program causes an abnormal operation, the program is provided with a processing routine to memorize the process executed by the program in order to facilitate analysis of the abnormality. This program is characterized in that the memory of the execution process itself is prevented from becoming meaningless due to runaway, etc. by providing a function to stop the memory of the execution process when a runaway occurs.
JP57124446A 1982-07-19 1982-07-19 Program Pending JPS5916058A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57124446A JPS5916058A (en) 1982-07-19 1982-07-19 Program

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57124446A JPS5916058A (en) 1982-07-19 1982-07-19 Program

Publications (1)

Publication Number Publication Date
JPS5916058A true JPS5916058A (en) 1984-01-27

Family

ID=14885707

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57124446A Pending JPS5916058A (en) 1982-07-19 1982-07-19 Program

Country Status (1)

Country Link
JP (1) JPS5916058A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08314765A (en) * 1995-05-15 1996-11-29 Nec Corp Debug information collecting system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08314765A (en) * 1995-05-15 1996-11-29 Nec Corp Debug information collecting system

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