JPS5914344U - Hybrid integrated circuit device - Google Patents

Hybrid integrated circuit device

Info

Publication number
JPS5914344U
JPS5914344U JP1248483U JP1248483U JPS5914344U JP S5914344 U JPS5914344 U JP S5914344U JP 1248483 U JP1248483 U JP 1248483U JP 1248483 U JP1248483 U JP 1248483U JP S5914344 U JPS5914344 U JP S5914344U
Authority
JP
Japan
Prior art keywords
integrated circuit
hybrid integrated
circuit device
heat dissipation
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1248483U
Other languages
Japanese (ja)
Inventor
要 柴田
大豆生田 征夫
Original Assignee
スタンレー電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by スタンレー電気株式会社 filed Critical スタンレー電気株式会社
Priority to JP1248483U priority Critical patent/JPS5914344U/en
Publication of JPS5914344U publication Critical patent/JPS5914344U/en
Pending legal-status Critical Current

Links

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案に係る混成集積回路装置の放熱ブロック
とセラミック基板との結合状態を示す略示的平面図、第
2図は同装置の縦断側面図である。 1・・・・・・導電性放熱ブロツダ、2・・・・・・電
力用半導体素子、3・・・・・・取付孔、4・・・・・
・セラミック基板、5・・・・・・導電部、6・・・・
・・ワイヤー又はリード線、7・・・・・・放熱ケース
、8・・・・・・段部、9・・・・・・ねじ孔、10・
・・・・・ねじ、11・・・・・・充填剤又はエポキシ
樹脂。 補正 昭58. 6.29 図面の簡単な説明を次のように補正する。 明細書の図面の簡単な説明の欄(第8頁2行〜6行目を
を下記の通り補正する。 「第1図は本考案に係る混成集積回路装置の放熱ブロッ
クとセラミック基板との結合状態を示す略示的平面図、
第2図は同装置の縦断側面図、第3図及び第4図は第2
実施例を示すもので、第3図は第1図と同様の平面図、
第4図は第2図と同様の縦断側面図である。」
FIG. 1 is a schematic plan view showing a state in which a heat dissipation block and a ceramic substrate are coupled to each other in a hybrid integrated circuit device according to the present invention, and FIG. 2 is a longitudinal sectional side view of the device. 1... Conductive heat dissipation blocker, 2... Power semiconductor element, 3... Mounting hole, 4...
・Ceramic substrate, 5... Conductive part, 6...
... Wire or lead wire, 7 ... Heat dissipation case, 8 ... Stepped part, 9 ... Screw hole, 10.
...screw, 11...filler or epoxy resin. Amended 1984. 6.29 The brief description of the drawings is amended as follows. The column for a brief explanation of the drawings in the specification (page 8, lines 2 to 6 has been amended as follows: ``Figure 1 shows the combination of a heat dissipation block and a ceramic substrate of a hybrid integrated circuit device according to the present invention. A schematic plan view showing the state;
Figure 2 is a vertical side view of the device, Figures 3 and 4 are
This shows an example, and Fig. 3 is a plan view similar to Fig. 1;
FIG. 4 is a longitudinal side view similar to FIG. 2. ”

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 制御部及び電力用半導体素子を含む混成集積回路におい
て、制御部を搭載したセラミック基板と、電力用半導体
素子を搭載した導電性放熱ブロックとを一部において重
合接続させ、該導電性放熱ブロックの重合接続しない部
分を直接金属製の放熱ケースに取付けたことを特徴とす
る混成集積回路装置。
In a hybrid integrated circuit including a control unit and a power semiconductor element, a ceramic substrate on which the control unit is mounted and a conductive heat dissipation block on which the power semiconductor element is mounted are partially polymerized and connected, and the conductive heat dissipation block is polymerized. A hybrid integrated circuit device characterized in that unconnected parts are directly attached to a metal heat dissipation case.
JP1248483U 1983-01-31 1983-01-31 Hybrid integrated circuit device Pending JPS5914344U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1248483U JPS5914344U (en) 1983-01-31 1983-01-31 Hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1248483U JPS5914344U (en) 1983-01-31 1983-01-31 Hybrid integrated circuit device

Publications (1)

Publication Number Publication Date
JPS5914344U true JPS5914344U (en) 1984-01-28

Family

ID=30143886

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1248483U Pending JPS5914344U (en) 1983-01-31 1983-01-31 Hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JPS5914344U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0542122U (en) * 1991-11-07 1993-06-08 柳井紙工株式会社 Multi-stage paper box

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0542122U (en) * 1991-11-07 1993-06-08 柳井紙工株式会社 Multi-stage paper box

Similar Documents

Publication Publication Date Title
JPS5914344U (en) Hybrid integrated circuit device
JPS6027441U (en) Hybrid integrated circuit device
JPS6157562U (en)
JPS5822742U (en) semiconductor equipment
JPS5933254U (en) semiconductor equipment
JPS606242U (en) hybrid integrated circuit
JPS5844871U (en) wiring board
JPS58114049U (en) semiconductor equipment
JPS58189593U (en) circuit element assembly
JPS60149166U (en) Hybrid integrated circuit device
JPS58166048U (en) IC package
JPS5954956U (en) semiconductor package
JPS59131192U (en) Mounting structure of transistor circuit
JPS5996845U (en) semiconductor equipment
JPS60935U (en) High power hybrid integrated circuit
JPS5856452U (en) Hybrid electronic components
JPS605170U (en) Printed circuit board for semiconductor devices
JPS60172346U (en) Resin-sealed semiconductor device
JPS59169048U (en) semiconductor equipment
JPS614431U (en) double-sided wiring circuit board
JPS599553U (en) semiconductor equipment
JPS587341U (en) Semiconductor integrated circuit package
JPS5914338U (en) hybrid integrated circuit
JPS5878666U (en) Hybrid integrated circuit device
JPS58187172U (en) hybrid integrated circuit