JPS59132219A - Oscillating circuit - Google Patents

Abstract

PURPOSE:To set externally the frequency and duty by setting the frequency to the 1st program counter and setting the duty to the 2nd program counter. CONSTITUTION:An output O1 of a program counter 4 is connected to a set signal input terminal S of an FF8, an output O2 of a program counter 5 is connected to a reset signal input terminal R of the FF8 and an output OUT2(Q') of the FF8 is taken as the reset signal input terminal R of the program counter 5, then a value being a variable data N is set to a frequency set buffer 2 and a variable data M is set to a duty setting buffer 3. Further, when the oscillating frequency of a reference signal oscillator 1 is taken as fO, an output of the program counter 4 becomes a frequency of fO/N and the FF8 is set in the frequency interval of fO/N.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an oscillation circuit that is constructed of a digital circuit controlled by a microcomputer or the like and whose frequency and duty are variable.

Conventional oscillation circuits are of an analog type mainly composed of C@R circuits.

Conventional oscillation circuits are composed of C-R circuits, and when changing the frequency, this is mainly done by making R variable, but it is difficult to change the duty, so C-R
It is necessary to have a multi-stage configuration and to provide C-R circuits for each duty setting, which results in a large-scale and expensive device.

An object of the present invention is to provide an economical oscillation circuit that allows frequency and duty settings to be made externally, operates with high precision under the control of a microcomputer, etc., and has a simple circuit configuration. It's about doing.

The oscillation circuit of the present invention includes a buffer that latches first data, a program counter that uses its output as data setting input, a buffer that latches second data, and a second buffer that uses its output as data setting input. a program counter; the outputs of the first and second program counters are used as a set input and a reset input, respectively; one of the two outputs is given as a start signal to the second program counter; a reference signal oscillator for supplying a clock signal to the first and second program counters;
and means for applying a control signal for writing data to the second buffer, and a selection circuit for selecting which of the first and second buffers to write data to, the first program counter The present invention is characterized in that a frequency is set and a duty is set for the second program counter.

In the configuration shown in Figure 1, 2 is a frequency setting buffer, 3
The output 01 of the program counter 4 is connected to the set signal input terminal S of the flip-flop 80, and the output 0. of the program counter 5 is used as a duty setting buffer. is connected to the reset signal input terminal R of the flip-flop 8, and when the output 0UT2 (Q) of the flip-flop 8 is used as the reset signal R of the program counter 5, a value of variable value data N is set in the frequency setting buffer 2. , when variable value data M is set in the duty setting buffer 3, and the oscillation frequency of the reference signal oscillator 1 is fo, the output of the program counter 4 becomes a frequency of fo/N, and the flip-flop 8 becomes fo/'. It will be set at frequency intervals of H. At this time, the flip-flop 8 is at a higher level than the program counter 4 (hereinafter referred to as "H").
) is applied, the output 0UTI becomes @H'' and 0UT2 becomes low level (hereinafter referred to as 'L'). Assuming that the program counter 5 becomes active when 0UT2 is 'L', it will output a pulse of H# to the flip-flop 8 after '/fo/M'. Flip-flop 8 is reset by this signal and outputs 0UTI.
It inverts the output 0UT2 to "H" at It L n, and the program counter 5 stops counting at the ninth time when 0UT2 of the flip-flop 8 changes to H#. The program counter 4 continues counting and generates a new set signal 1/fo/N after the previous set signal was generated.

Therefore, the frequency fo/N is output from the output 0UTI terminal.

A pulse with duty M/N will be generated. Also, from the output 0UT2, the frequency fO/N and the data (
A pulse of MN)/N is generated.

According to the present invention, by digitizing the oscillation circuit and making the frequency and duty variable by controlling a microconbeater or the like, it can be used as an inexpensive built-in variable oscillator in various devices.

[Brief explanation of the drawing]

Fig. 1 is a configuration diagram showing an embodiment of the present invention, Fig. 2 a - e
2 is a waveform chart showing the operation of FIG. 1. FIG. 1... Reference signal oscillator, 2... Buffer, 3... Buffer, 4... Program counter, 5... Program counter, 6・
...Data signal line group, 7...Data signal line group, 8...Flip-flop, 9...
・Data bus, 10...Address bus, 11・
...Selection circuit, 12...Control line. Part 1, Figure 2

Claims (1)

[Claims] a buffer that latches first data; a program counter that uses its output as a data setting input; a buffer that latches second data; a second program counter that uses its output as a setting input; and a flip-flop in which the output of the second program counter is used as a set input and a reset input, respectively, one of the two outputs is given as a start signal to the second program counter, and one of the two outputs is used as an output signal. a reference signal oscillator for providing a clock signal to the first and second program counters; means for providing a control signal for writing data to the first and second buffers; An oscillation circuit comprising: a selection circuit for selecting which one to write data to, and setting a frequency to the first program counter and a duty to the second program counter.