JPS59132075A - Picture processing device - Google Patents

Abstract

PURPOSE:To shorten object recognition processing time by storing only the profile of an object in a picture memory to reduce the information volume of the object recognition. CONSTITUTION:The analog picture signal of an object image is inputted by an image sensor 3 and is converted to a digital picture signal. This conversion signal is supplied to an edge detecting circuit 5 to attain the profile as the edges of the object image. The information of the profile of this object is stored in a picture memory 7 through a memory control circuit under the control of a CPU circuit 8. In this case, the output of a drive signal generating circuit 2 is inputted to the image sensor as the input device of the picture signal and the memory control circuit 6 as the storage device of the picture signal to synchronize respective devices with each other. The CPU8 gives commands to the memory control circuit 6. The CPU8 controls the input, the storage, and the output of the picture signal and analyzes and processes directly information of the object profile on the picture memory to recognize the object and extract features.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an image processing device for object recognition applied to automatic assembly machines and the like.

Conventional devices of this type store all part of the object information in the image memory, and when analyzing the features of the object, there is a large amount of information, and the outline of the object is also extracted from all the information using software. However, the processing time was extremely long.

In order to eliminate these drawbacks, the present invention is characterized by detecting edges of object information and storing only the outline of the object in an image memory.The purpose of this invention is to reduce the amount of information for object recognition. , to shorten object recognition processing time.

The present invention will be described in detail below with reference to the drawings.

@1 Figure shows an embodiment of the present invention, where 1 is a clock signal oscillation circuit, and the output of the clock signal oscillation circuit 1 is input to a drive signal generation circuit 2 and an edge detection circuit 5. The output signal of the drive signal generation circuit 2 drives the image sensor 3 and synchronizes the image sensor 3 and the memory control circuit 6. The output image signal of the image sensor 3 is converted into a digital signal by a comparator 4 and outputted to an f-edge detection circuit 5. Ru. The output signal of the edge detection circuit 5 is input to the memory control circuit γ
The image is stored in the LX image memory 7. The CPU circuit 8 controls the memory control circuit 6 and can directly write and read information to and from the image memory 7.

A case will be described in which the image processing for detecting edges of an object image according to the present invention is activated in the above state. A drive signal generation circuit 2 generates an image sensor drive signal from a clock signal oscillated by a clock signal generator 1, and drives the entire image sensor 3.

The image sensor 3 inputs an analog image signal of the object image, and this analog image signal is sent to the comparator 4.
Convert it to a digital image@signal. This transformation f′
The resulting digital image signal is used by an edge detection circuit 5 to obtain a contour, which is an edge of the object image.

This information on the outline of the object is passed through the memory control circuit 6, and C
The image data is stored in the original image memory 7 under the control of the PU circuit 80.

At this time, the output of the drive signal generation circuit 2 is input to the image sensor 3, which is an image signal input device, and the memory control circuit 6, which is an image signal storage device, thereby synchronizing each device. . CPU circuit 8 is memory control circuit 6
(iii) Controls the input, storage, and output of image signals, performs tangential analysis processing of the object contour information on the image memory, and performs all object recognition and feature extraction.
The figure shows a detailed circuit diagram of the edge detection circuit 5. The output of the comparator 4 is connected to the input of the flip-flop 9.
When the flip-flop 9 is turned off, the clock signal of the flip-flop 9 is input to the output of the clock signal oscillation circuit 1. FiX-O
RIO has the output of comparator 4 and the output of flip-flop 9 connected as inputs, and the output of this EX-ORIQ is connected to the next stage memory controller G'! connected to one circuit.

The first match of the day in which the edge detection circuit is activated in the above-mentioned state will be explained.

The flip-flop 9 receives all clocks from the clock signal oscillation circuit 1, and receives the digital image signal from the comparator 4 as DCLtα. The input D (L t
(With a delay of two clocks.

Fj X - OR10 output. EX-ORIQ compares the digital image signal from the comparator 4 and the digital image signal delayed by one clock, which is the output of the flip-flop 9, and if they are the same, the logic I
Output I Q # level, logic °'1 if
This output of EX-OR, 10 detects only the edge part of the object image, and this output is input to the memory system 4111\iμ6, which detects the edge part of the object, that is, the contour part. Only the image is input to the image memory 7.

At this time, the image sensor 3, which is an input device for image signals,
, the memory control circuit 6, which is a storage device for image signals, is synchronized by the output signal of the drive signal generation circuit 2, and the drive signal generation circuit 2 and the edge detection circuit 5 are synchronized by the output signal of the clock signal oscillation circuit 1. The circuit system that is synchronized by a certain clock signal and transmits the image signal of the image processing device that detects the edges of this object image is as follows.
This means that everything is synchronized. Note that the clock signal output from the clock oscillation circuit 1 corresponds to one pixel of the digital image signal.

As explained above, since this device stores only the outline of the image of the object in the image memory, unlike the conventional method of storing the entire image, the processing information for object recognition is reduced.

This method has the advantage of shortening the time required to memorize objects, such as shape recognition, object center, object angle, object circumference, etc.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an image processing apparatus according to an embodiment of the present invention. FIG. 2 is a detailed circuit diagram of the edge detection circuit shown in FIG. 1. Clock signal oscillation circuit 20. Drive signal generation circuit 3, image sensor 4, #comparator 50. Edge detection circuit 6°, memory control circuit 700, image memory 8, CPU circuit 90. Flip-flop IQo, EX-OR Applicant Anji Seiko Co., Ltd. Joint Agent Patent Attorney Tsutomu Mogami

Claims (2)

[Claims] (1) a clock oscillation circuit, a drive signal generation circuit that receives the clock and drives the image sensor, an image sensor that inputs an image signal, and a through comparator that converts the image signal of the image sensor into a digital signal;
an edge detection circuit that detects a change point in a digital image signal and detects an edge of an object image; a digital image memory that stores this information; a memory control circuit that controls this digital image memory; Numerical analysis of digital image memory and control of ^11 memory control circuit 81 QC! Consists of a PU circuit,
An image processing device that detects the edges of an object image and captures the outline of the object. (2) In item 1, the edge detection circuit is composed of the 1d flip-flop and the IBX-OR circuit, and
An image processing apparatus characterized in that the X-OR circuit has a configuration in which a comparator and the output of the flip-flop are inputted.