JPS59130294U - system controller - Google Patents

Abstract

(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

FIG. 1 is a schematic diagram showing the mutual relationship among the processing unit, main memory, and system control unit; FIG. 2-A is a diagram showing the format of commands sent from the processing unit to the system control unit and the meaning of each bit; Figure 2-B is a diagram showing a specific example of the command, Figure 3 is a diagram showing an embodiment of the system control device according to the present invention, and Figure 4 is a diagram showing the central directory, directory, and their peripheral circuits shown in Figure 3. FIG. 1...System control unit (abbreviation 5CU), 2 and 3...Central processing unit (abbreviation CPU), 4...
...Channel device (abbreviation CH), 5 and 6...
...Main memory (abbreviation MM), 7...Central directory (abbreviation CD), 8 and 9...Buffer memory means (abbreviation BM), 10...Request control Circuit, 11...Reply control circuit.

Claims (1)

[Scope of utility model registration request] a plurality of processing units, at least one of which includes buffer memory means controlled in a swap manner, and a main memory which is independently accessible to each of the plurality of processing units; A system control device that controls the main memory and the buffer memory in response to a write request from any one of the processing devices, the system control device being provided corresponding to a plurality of blocks included in the buffer memory means. A write state storage means for storing whether or not writing has occurred in the block, and a buffer memory means of a processing device other than the write request source, which stores the data specified by the address information sent from the write request source processing device. a write detection means for outputting a write detection signal in response to a write request when the write status storage means is stored and the write state storage means stores that there is a write; and the write detection means When a write detection signal is output from the main memory, the write detection means detects the write state of the write data sent along with the write request from the write request source processing device without accessing the main memory. A system control device comprising: writing means for writing into a portion of a buffer memory means of a detected processing device designated by the address information.