JPS59124374A - Crt display unit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION FIELD OF INDUSTRIAL APPLICATION This invention relates to a rask scan type CRT display device that simultaneously displays a plurality of pieces of video information stored in a memory block on a screen.

Structure of the Conventional Example and Its Problems FIG. 1 shows a block diagram of the main parts of a conventional CRT display device. In Figure 1, 1□2 and 3
are the first. This is a memory block that stores second and third video information. 4 is memory block 1, 2.3
A video signal conversion circuit 5.6 and 7 sequentially reads the video information of the memory blocks 1, 2, . These are video signal output terminals corresponding to 3. In this case, the reading of video information from each memory block 1, 2.3 is carried out by applying a sequentially changing address signal to memory blocks 1, 2.3 in common.
．． The video information of the three same addresses is read out simultaneously.

Such a CRT display device is used, for example, to perform color display. That is, by storing the video information of each color in the memory blocks 1, 2.3, reading out the video information of each color from these memory blocks 1, 2.3, and converting these into video signals of each color, the image can be displayed on the screen. Color images can be displayed.

However, in such a conventional example, the same number of memory blocks as the number of video information is required, resulting in high cost, large size, and weight.

Purpose of the Invention This invention provides a C
The purpose is to reduce the cost, size, and weight of RT display devices.

Structure of the Invention The CRT display device of the present invention divides a single-address memory block having a storage capacity multiple times that of a conventional memory block into a plurality of storage areas, and stores a plurality of pieces of video information in each of the plurality of storage areas. The video signal conversion circuit obtains the required input from the plurality of storage areas of the memory block in one data conversion cycle by sequentially time-sharing accessing the plurality of storage areas of the memory block using the time-sharing access means. Based on this, the video signal conversion circuit outputs a plurality of video signals corresponding to a plurality of video information.

DESCRIPTION OF THE EMBODIMENTS FIG. 2 shows a block diagram of the main parts of a CRT display device according to an embodiment of the present invention. In Figure 2,
8 is a single-address memory block having three times the storage capacity of memory block 1 (for example, from address 1 to address 300); address 1 to address 100 is the first storage area a; The area from address 201 to address 300 is assumed to be the second storage area, and the area from address 201 to address 300 is assumed to be the third storage area C.
, 0 to the first. Second and third video information are stored respectively. Reference numeral 9 denotes a video signal conversion circuit that inputs the output data of the memory block 8 directly or after data conversion and converts it into a video signal.Reading of video information from the memory block is performed by a time division access means (not shown). 1. The second and third storage areas a, b, c are at address 1,
101, 201; 2, 102, 202
Address: 3rd, 103rd.

203 address...;100 address, 200 address, 3
By sequentially time-divisionally accessing address 00, the video signal conversion circuit 9 obtains the three pieces of data required in one data conversion cycle, and based on this, data conversion including serial data conversion is performed to obtain the first data. ．． The first video information corresponds to the second and third video information. Second and third video signals are output. 10, 11 and 12 are video signal output terminals, respectively.

Thus, this embodiment stores a single address memory block 8 in the first . It is divided into second and third storage areas a, b, and o, and each storage area a, b, and c has a first storage area. 22nd and 3rd
This is different from the conventional example because the video signal conversion circuit 9 obtains the data necessary for one data conversion cycle by storing the video information of Different large capacity memory block 8 is 1
Only one piece is required, and the printed circuit board for mounting becomes smaller, making it possible to reduce costs, size, and weight.

FIG. 3 shows a block diagram of the main parts of a CRT display device according to another embodiment of the invention. In FIG. 3, 13 is a timing correction circuit, and a memory block 8
A set of data read out by storage areas a, b, and c of memory block 8 is simultaneously input to video signal conversion circuit 9 by correcting the shift in data output timing due to 0 time division access.

In this embodiment, since timing correction is performed, the first. There is no time lag between the second and third video signals, and the image quality can be improved.

Effects of the Invention According to the present invention, it is possible to reduce the cost, size, and weight of a CRT display device that simultaneously displays a plurality of pieces of video information on a screen.

[Brief explanation of drawings]

FIG. 1 is a block diagram of the main parts of a conventional CRT display device, FIG. 2 is a block diagram of the main parts of one embodiment of the invention, and FIG. 3 is a block diagram of the main parts of another embodiment of the invention. It is a diagram. 8...Memory block, 9...Video signal conversion circuit,
10 to 12...-Video signal output terminal, 13...Timing correction circuit, g, b, c...Storage area;-1...
, -1

Claims (2)

[Claims] (1) A memory block with a single address that is divided into a plurality of storage areas and stores video information in each of the storage areas, and video information that is stored in each of the storage areas using the output of this memory block as input. a video signal conversion circuit that outputs video signals corresponding to the respective video signals;
By time-divisionally accessing a plurality of storage areas of the memory block, data necessary for one data conversion cycle of the video signal conversion circuit is read out from the plurality of storage areas and applied to the video signal conversion circuit in a time-division manner. A CRT display device comprising an access means. (2) A timing correction circuit for inputting data read from the memory block by time-division access to the video signal conversion circuit at the same time is inserted in the preceding stage of the video signal conversion circuit. ) CR stated in section
T display device.