JPS59122234A - Lsi device - Google Patents

Abstract

PURPOSE:To incorporate three circuits in one chip only by increasing one terminal by constituting two circuits in an internal cell and connecting an I/O buffer to any circuit by a circuit selecting signal. CONSTITUTION:Circuits A26, B27 are built in an internal cell 25 of an LSI device 11. When a logical signal from a circuit selecting terminal 19 is ''0'', the output of a circuit selecting signal supplying circuit 20 is inputted to a distribution circuits 13, output signal selecting circuits 15 and control signal selecting circuits 16 in an input buffer 12, a two-way buffer 14, an output buffer 17, and a tri-state output buffer 18 to connect a signal course to an input buffer 3, a two- way buffer 5, an output buffer, and a tri-state buffer 8 with the circuit A26. When the circuit selecting signal terminal 19 is ''1'', the circuit B27 is connected to respective buffers. Consequently, I/O output signal terminals 2, 4, 7, 9 can be used for both the circuits A26, B27 in common.

Description

DETAILED DESCRIPTION OF THE INVENTION This invention relates to a gate array.
Semi-custom (semi-cuatom)
) It is related to LSI.

Conventionally, this type of LSI has been constructed as shown in FIG. In FIG. 1, (1) shows the entire LSI device constituting the gate array, (2) shows input signal terminals,
(3) &i buffer, (4) is a bidirectional signal terminal, (5) is a bidirectional buffer, (6) is an output buffer, (
7) is an output signal terminal, (8) is a tri-state output buffer, (9) I″i is a tri-state output signal terminal,
The UO is an internal cell in which various circuits are housed.

Terminals (2), (4), (7), and (9) are each a plurality of terminals, but in order to make the drawing easier to read, only one terminal is shown in full.

In such an LSI device v(1), an LSI device having the same configuration is used for various purposes depending on the purpose of use by the user.

In a highly integrated LSI such as CMO8, it is easy to configure a large number of circuits in the internal cell 00, and any part of this large number of 1i:Il paths can be used according to the intended use of all users. However, it is better to leave the other parts unused, so that different circuits can be connected to separate L
Rather than configuring it as SI and using it for each purpose, L
It is easy to manage the production and use of SI, and it is overall economical.

When LSIs with the same configuration are used for a variety of different purposes, the parts of the circuits used in the internal cell 00 differ depending on the purpose of use, and the terminals for connecting input signals and the output signals are connected accordingly. The terminals differ depending on the purpose of use of the LSI.

Types of terminals to which input signals are connected include input signal terminals (2
) and bidirectional signal terminal (4). Types of terminals to which output signals are connected include bidirectional signal terminal (4), output signal terminal (7), and tristate output signal terminal (9). Since the types of these terminals are well known in the past, their explanation will be omitted, but a large number of these types of terminals are required to correspond to the large number of circuits in the internal cell qO.

If you manufacture an LSI with a large number of circuits and a large number of terminals corresponding to the large number of circuits and change the terminals connected to the outside according to the purpose of use, you can achieve the function for the purpose of use. It becomes a equipped LSI. This is why it is called a semi-custom LSI.

However, due to physical constraints, there is a limit to the number of terminals that can be provided on one LSI, and therefore, the range of use of the LSI is limited by the limit on the number of terminals, and it cannot be used for purposes other than that range. However, the disadvantage was that different types of LSIs had to be produced all the time.

This invention was made in order to eliminate the drawbacks of the conventional ones as described above, and takes advantage of the relatively easy production of highly integrated circuits to integrate two internal circuits into one LSI device. A circuit A and a circuit B corresponding to a cell are provided, the number of terminals is the same as the conventional one, and only one terminal for inputting a circuit selection signal is added.
By switching whether the terminals of the device are connected to circuit AfC or [circuit B] and increasing the number of terminals, a single type of LSI device can be used for two types of conventional LSI devices. This invention facilitates the management of LSI production and use, and will be described in detail below with reference to the drawings.

FIG. 2 is a block diagram showing an embodiment of the present invention, in which the same reference numerals as in FIG. 1 indicate the same or corresponding parts, α
η is an LSI device, (12I'i input buffer, (6) is an input signal distribution circuit, 04 is a bidirectional buffer 'X (to) is an output signal selection circuit, Q is a control signal selection circuit, αη is an output buffer, aυ is a tri-state output buffer, α燵 is a signal terminal for circuit selection, 4 is a circuit selection signal supply circuit, 0
2 is the input buffer selection signal, (A) is the bidirectional buffer selection signal, @ is the output buffer selection signal, (C) is the tri-state output cover sofa selection signal, (C) is the internal cell, (C) is Circuit A1 (a) is circuit B.

Compared to FIG. 1, the LSI device 01) in FIG.
Although the number of terminals has increased by one terminal, the internal cell - has twice as many circuits as the internal cell (10).In other words, the circuit A (g) and the circuit B@ are each connected to the internal cell (10). 10. Therefore, in Fig. 2, terminal f2), (4)
The number of terminals in , (7), and (9) is only for one circuit, circuit A (c) or circuit B@, but if the logic of one signal is "0", for example, When the terminal (
2), (4), (7), and (9) are all connected to circuit A (c), and when the logic of the signal at terminal α is "1", terminals (2), (4), and (7) are connected to circuit A (c). , (9) all have a built-in switching mechanism connected to circuit B@, so the LSI device α can be used for either of the two types of LSI devices (1). .

The input signal input from the input signal terminal (2) is sent to the buffer (
3) Enters the input signal distribution circuit (13) through the input signal distribution circuit (13).If the signal logic of the circuit selection signal terminal (to) is "0", the selection signal (
The logic of C) is also "0", and the input signal input to the input distribution circuit 03 is input to the circuit A (C), for example, and if the signal logic of the terminal (to) is "1", the selection signal (C) is The logic of is also "1", and the input signal is input to the circuit B.

The same applies to the input signal that enters the bidirectional buffer 0/Q from the bidirectional signal terminal (4). However, the selection signal in this case is the selection signal.

The output signals of circuit A (c) and circuit B @ are bidirectional buffer 0
4, one of them is selected by the selection signal (a) and enters the buffer (5). In addition, the output control signals from circuit A (a) and circuit B@ are selected and outputted by the control signal selection circuit +1e in the bidirectional buffer α, and the output from the output signal selection circuit α is controlled by the control signal selection circuit +1e at the terminal (4 ) is output.

Similarly, the output signals from circuit A (c) and circuit B@ are input to the output signal selection circuit α9 in the output buffer αη, and one of the output signals is selected according to the logic of the selection signal □□□ and the buffer (6 ) and is output from the output signal terminal (7).

Furthermore, the output signals from circuit A (c) and circuit Bv) are output from output signal selection circuit 0 in tri-state output buffer αυ.
According to the logic of the selection signal (c), one of the output signals is selected and input to the buffer (8). In addition, the output control signals from circuit A (to) and circuit B @ are selected and output by the control signal selection circuit (IQ) in the tri-state output vanofer αυ, and the contents of the buffer (8) are controlled by the tri-state output signal terminal for (
9) is output.

As described above, according to the present invention, an LSI device used as a gate array has a switching function for all input/output signals except for the circuit selection signal, so that multiple circuits with no connection relationship can be switched. can be accommodated within the allowable number of cells, and the disadvantage of having to increase the number of LSI types due to the limitation on the number of signal terminals can be avoided. This invention is particularly effective in LSIs such as CMOS, which have high integration and do not require high speed.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a conventional device, and FIG. 2 is a block diagram showing an embodiment of the present invention. (2)...Input signal terminal, (3)...Buffer,
(4)...Bidirectional signal terminal, (5), (6)...
・Respectively buffer, (7)...output signal terminal, (
8)... Buffer, (9)... Tri-state output signal terminal, (11)... LSI device, ■... Input cover sofa, u3... Input signal distribution circuit, α→... Bidirectional buffer, α9...output signal selection circuit, OQ...
・Control signal selection circuit, aη...output buffer, (1→
... Tri-state output buffer, (A)...Circuit A1 (A)...Circuit B0 Note that the same symbols in each figure indicate circuits -
or a corresponding portion. Agent Shin Kuzuno - Figure 1 Figure 2

Claims (1)

[Scope of Claims] An LSI comprising an input signal terminal, a bidirectional signal terminal, an output signal terminal, and a tristate output signal terminal, the internal cells of which constitute a gate array between the input signal and the output signal. In the device, a circuit selection signal terminal, an input buffer selection signal having a logic corresponding to the logic inputted from the circuit selection signal terminal, a bidirectional buffer selection signal, and an output. a circuit selection signal supply circuit that outputs a buffer selection signal and a tri-state output buffer selection signal; means for configuring a circuit A part and a circuit B part in an internal cell; and an input buffer from the input signal terminal. means for inputting a signal input into the bidirectional buffer to the circuit or circuit B according to the logic of the input buffer selection signal; and means for inputting the signal input to the bidirectional buffer from the bidirectional signal terminal to the bidirectional buffer selection signal. Means for inputting to the circuit A or circuit B according to the logic of the selection signal, and selecting and outputting one of the output control signals output from the circuit A and the circuit B according to the logic of the bidirectional buffer selection signal. a control signal selection circuit within the bidirectional buffer; and an output signal within the bidirectional buffer that selects and outputs either of the output signals output from the circuit A and the circuit B according to the logic of the bidirectional buffer selection signal. a selection circuit; means for connecting the output of the output signal selection circuit to the bidirectional signal terminal according to the logic of the output of the control signal selection circuit in the bidirectional buffer; and the circuit A and the circuit B.
means for connecting one of the output signals output from the output buffer to the output signal terminal according to the logic of the output buffer selection signal; A control signal selection circuit within the tri-state buffer selects and outputs the signal according to the logic of the state output buffer selection signal, and selects one of the output signals output from the circuit A and circuit B according to the logic of the tri-state output buffer selection signal. An output signal selection circuit in the tri-state buffer that selects and outputs according to the logic, and the output of this output signal selection circuit is connected to the tri-state output signal terminal according to the logic of the output of the control signal selection circuit in the tri-state buffer. An LSI device whose mission is to be equipped with the means to