JPS59189726A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To enhance the degree of integration and reduce expenses of LSI development and shorten the development time by using plural multifunction slice LSIs of the same type. CONSTITUTION:Plural input signal lines I1-I4 are connected as a common input signal line I to the input side of circuit blocks 1-4, and the output side of circuit blocks 1-4 is connected to the input side of a multiplexer 5, and a circuit block selecting signal C is given to this multiplexer 5 to select one of output signals of four circuit blocks, and the selected output signal is outputted to a common output signal line O. ''00'', ''01'', ''10'', and ''11'' are given to LSIs 1, 2, 3, and 4 respectively as the circuit block selecting signal C, and the circuit block 1 is operated in the LSI1, and the circuit block 2 is operated in the LSI2, and the circuit block 3 is operated in the LSI3, and the circuit block 4 is operated in the LSI4.

Description

[Detailed Description of the Invention] L with improved balance between the number of input/output pins and the number of cells used
This relates to SI circuits.

Problems in LSI circuit design include limitations on the number of input/output pins and limitations on the number of usable cells. For example, a highly integrated L
In the case of SI, internal cells cannot be used effectively due to the limited number of input/output pins, which may make it impossible to implement the planned circuit. In such a case, it is conceivable to develop another LSI and convert the circuit into an LSI, but developing a plurality of LSIs requires a large amount of development cost and development time.

The present invention provides LSI circuit design i-l and I,SI which effectively balances the limitation on the number of input/output bins and the limitation on the number of usable cells.
The present invention is designed to reduce the number of products to be developed, and one embodiment of the present invention will be described below with reference to the drawings.

Figure 1 shows circuit block 1 cut out for LSI implementation.
~4 is shown. In FIG. 1, numerals 4 to 4 are input signal lines, and 01 to 04 are output signal lines. At this time Ni=
When Ii+Qi (i = 1 to 4), Ni is LS
If the number of input/output signal pins exceeds the number of I/O signal pins, it is common to develop LSIs with four types. In this case, a large amount of LSI development cost and time will be required.

Therefore, in the present invention, as shown in FIG. 2, the plurality of input signal lines (1 to 4) shown in FIG. The output sides of circuit blocks 1 to 4 are connected to the input side of a multiplexer 5, a circuit block selection signal C is applied to the multiplexer 5, and any one of the output signals of the four circuit blocks is selected to output a common output signal. It is output to line O.

Figure 3 shows circuit block 1 according to circuit block selection signal C.
It is a figure which shows the state of selection of -4. Therefore, the first
In order to realize the circuit shown in the figure, as shown in Figure 4,
This problem can be solved by using four LSs 11 to 4 having the structure shown in FIG. That is, the circuit block selection signal C for each LSI is 00 for LSII, 01 for LSI2, and L
By giving 10 to SI3 and 11 to LSI4, circuit block 1 of LSII operates, circuit block 2 of LSI2 operates, circuit block 3 of LSI3 operates, and LSI4 operates. circuit block 4
operates, and the circuit shown in FIG. 1 can be realized.

Therefore, according to the present invention, by using a plurality of one type of multi-function slice type LSI,
This has the effect of increasing the degree of integration and reducing LSI development costs and development time.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a circuit block to be implemented in an LSI, FIG. 2 is a diagram showing a circuit block diagram of an LSI of the present invention, and FIG.
This figure shows the state of selection of circuit blocks 1 to 4, and FIG. 4 is a diagram showing an example of a circuit for realizing the circuit of FIG. 1 by combining the LSIs of the present invention. 1.2, 3.4...Circuit block, 5...Multiplexer, ■...Common input signal line, 0...Common output signal line Patent applicant: NEC Corporation Agent Patent attorney Kanno 9 Figure 2 2〇-

Claims (1)

[Claims] (1) A common input signal line is connected to the input side of a plurality of circuit blocks, and the input side of a multiplexer that selects one of the output signals of the circuit block is connected to the output side of the common input signal line, and the output side of the multiplexer is connected to the input side of the multiplexer. A semiconductor integrated circuit characterized in that a common output signal line is connected to the semiconductor integrated circuit.