JPS5911981B2 - Update target extraction processing method in virtual memory method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides an update target extraction processing method in a virtual storage system, in particular, for example, in order to assist in page-out target extraction when executing page-in/page-out processing using software. Update target extraction processing that includes an update ranking candidate determination processing unit that extracts and manages page-out target candidates on the condition that the central processing unit is in a non-processing state, and extracts the page-out target candidates in advance. It is related to the method.

In a data processing system that adopts a virtual memory method, (1) reference information is created for each page on the real storage device, (ii) the reference information is set up when the page unit is accessed, and ( (Company) Periodically or when the need for page-out occurs, for example, software checks the reference information corresponding to each page and extracts the page-out target.

However, as the storage capacity of a real storage device increases, the overhead of the software processing becomes a problem. For this purpose, it may be considered to extract candidates to be paged out in advance, for example by firmware.

However, regarding this candidate extraction, if the extraction is executed after temporarily suspending the processing by the central processing unit or the channel, it is not preferable because the processing of the entire system will be affected. The present invention aims to solve the above-mentioned problems, and aims to execute the candidate extraction process only on the condition that the central processing unit is in a non-processing state.

Therefore, in the update target extraction processing method in the virtual storage system of the present invention, a virtual storage system is adopted, and update order information is created for each predetermined information unit on the real storage device. In a data processing system that changes the update order information corresponding to an information unit when an access occurs to the information unit, the above update order information is composed of a plurality of bits, and the update order information corresponding to a certain information unit is changed. A stacker is provided that extracts the information unit as an update target candidate when the ranking information is in a predetermined state, and updates each of the above information units when activated when the central processing unit is in a non-processing state. It includes an update ranking candidate determination processing unit that checks and/or changes the ranking information and initializes the updated ranking information corresponding to the information unit when an access occurs to any of the information units, and at least The update ranking candidate determination processing unit performs a process of storing update target candidates in the stacker and a re-judgment process of checking whether the update target candidates stored in the stacker are still update target candidates at the present time. It is characterized by the fact that This will be explained below with reference to the drawings. The figure shows the configuration of an embodiment of the present invention.

In the figure, reference numeral 1 is the main memory, 2 is the central processing unit, 3 is the channel, 4 is the update order candidate determination processing unit, and 5 is the LRU counter table, which updates n bits given corresponding to each page. 6 is an LRU page stacker that stores information regarding update target candidates; 7 is a real page pointer; and 8 is an LRU counter initialization mechanism. When an access occurs to a page, the update order information on the LRU counter table 5 corresponding to the page is updated, for example, all "1-1", 9
1 is a control mechanism that determines, for example, whether the stacker 6 is full or not, and also controls the interface with, for example, paging processing software;
0 is a real page pointer updating mechanism that updates the contents of the real page pointer 7; 11 is an LRU counter updating mechanism that executes processing to be described later; 12 is an auxiliary control bit checking mechanism; For example, the existence of a resident bit that corresponds to each page (logical ``1'').
In this case, it is considered to be resident).
Reference numeral 13 represents a stacker registration mechanism which executes processing to be described later, 15 represents a NAND logic section, 16 and 17 each represent an AND logic section, and 18 represents an OR logic section. As described above, n (n>1) bits of update ranking information are prepared corresponding to the real pages, and this information is held collectively on the LRU counter table 5, for example.

When a certain page is accessed by the CPU or a channel, the LRU counter initialization mechanism 8 sets all n bits of update order information of the page to "1".
The non-processing state of the central processing unit is when there are no executable processing requests and no interrupts are pending.

When the central processing unit detects a non-processing state, it issues a logic [1], and the real page pointer update mechanism 10 is started by the AND logic section 16 on the condition that the control mechanism 9 sets the permission signal to logic "1". do. As a result, the contents of the real page pointer 7 are incremented by 1, and the contents of the LRU counter table 5 pointed to by the contents of the real page pointer 7 are checked. At this time, the auxiliary control bit checking mechanism 12 detects whether or not the auxiliary bit is set for the page (eg, the page is made resident).

The LRU counter update mechanism 11 determines whether the content (update order information) of the LRU counter table corresponding to the page is (1) value "O" or (4) value "1".
(1:1) Determines whether the value is "O" or other than "1", and in the case of (1) above, immediately issues a logic "O", and in the case of (11) above, the corresponding LRU counter table Since the content of 5 is -1 and the result is the value "0", logic [1] is output, and in the case of (111) above, the corresponding LRU
The contents of the counter table 5 are set to 1 and a logic "O" is issued. The condition is that the auxiliary control bit checking mechanism 12 is logic "1" (that is, it is not made resident, for example), and the LRU counter updating mechanism 11 is logic [1] (that is, the result of -1 becomes the value "0"). Then, the AND logic section 17 is turned on and the stacker registration mechanism 13 is activated.

Further, if the auxiliary control bit checking mechanism 12 is logic 1-0 or the LRU counter updating mechanism 11 is logic "0", the NAND logic unit 15 outputs logic "1" and the update ranking candidate determination process is performed. The control mechanism 9 indicates that one step has been completed.
Report to. When the stacker registration mechanism 13 is activated as described above, the mechanism 13 stores the real page address information of the corresponding page or the contents of the real page pointer 7 in LRU.
It is stored in the page stacker 6, outputs a logic "1", and reports it to the control mechanism 9. When the LRU page stacker 6 is full during the storage process, the mechanism 13 generates a logic "0" and reports to the control mechanism 9 that addition to the stacker 6 is impossible. The control mechanism 9 has logic "1" as stated above.
If this is reported, it is determined that the update ranking candidate determination process has been completed for one step. At this point, if the central processing unit 2 is also in the non-processing state, the central processing unit 2 issues a logic "1" to the AND logic unit 16 and enters the next step. However, when the control mechanism 9 receives the logic "O" as described above, it sets the illustration permission signal to the logic "0".Then, the control mechanism 9 enters the next mode of processing, namely (1) LR
For each page registered as an update ranking candidate in the U-page stacker 6, it is checked whether it is still a candidate at this point in time.

(2) In this process, check the contents of the LRU counter table 5 for the registered page, and check the contents of the LRU counter table 5 for the registered page.
Extract pages that are not "0".

(3) Needless to say, this means that the page was accessed after it was once designated as a candidate. (4) Then, the page extracted in the above process (2) is deleted from the LRU page stacker 6.

(5) Next, the page whose registration was attempted first is registered on the LRU page stacker 6. The control mechanism 9 further performs processing in the next mode.

That is, the contents of the LRU counter table 5 are updated for pages registered in the LRU page stacker 6 periodically or when it is necessary to page out at least one page in the interface with the software. Check again to see if it still has the value "O". If the value remains "O", the page is passed to the software and left to the software's processing, such as invalidating the page. Needless to say, the invalidated page is
The software will eventually page you out as is known. As described above, according to the present invention, candidate extraction processing is performed while the central processing unit is in a non-processing state to support software processing.

Then, each time the extraction process completes, for example, one step, if the non-processing state is resolved, the processing is returned to the central processing unit, so there is virtually no interference with the processing of the central processing unit. . Moreover, since candidates once registered as candidates are rechecked at any time, there is no need to worry about the time difference between when candidates are extracted and when they are actually entrusted to software processing. This makes it possible to achieve one of the goals of "not affecting processing." In addition, in a virtual storage machine that is actually in operation, the central processing unit does not go into a non-processing state and remains in a processing state for a long period of time; It is normal that there is always a non-processing state, the so-called CPU idle state, and during that time the L
It may be considered that the process of storing update target candidates in the RU page stacker functions sufficiently.

[Brief explanation of the drawing]

The figure shows an embodiment of the invention. In the figure, 1 is the main memory, 2 is the central processing unit, 3 is the channel, 4 is the update ranking candidate determination processing unit, 5 is the update ranking information storage table, 6 is the update ranking candidate storage stacker, and 7 is the real page horn. 8 is an LRU counter initialization mechanism, 9 is a control mechanism, 10 is a real page pointer update mechanism, and 11 is an LRU counter initialization mechanism.
12 represents an RU counter updating mechanism, 12 represents an auxiliary control bit checking mechanism, and 13 represents a stacker registration mechanism.

Claims (1)

[Claims] 1. A virtual storage system is adopted, and update order information is created for each predetermined information unit on the real storage device, and when an access occurs to a certain information unit, the update order information is In a data processing system that changes update ranking information corresponding to an information unit, the update ranking information is configured by a plurality of bits, and the update ranking information corresponding to a certain information unit is in a predetermined state. A stacker is provided that extracts the information unit as an update candidate when the central processing unit is in a non-processing state, and checks and/or changes the update ranking information for each of the above information units when activated when the central processing unit is in a non-processing state. and an update ranking candidate determination processing unit that initializes update ranking information corresponding to the information unit when an access occurs to any of the information units, and at least the update ranking candidate determination processing unit is attached to the stacker. A virtual memory characterized in that a process of storing update target candidates and a re-judgment process of checking whether the update target candidates stored in the stacker are still update target candidates at the present time are performed. Update target extraction processing method in the method. 2. The update ranking candidate determination processing unit is configured to once again confirm whether or not the processing device is in a non-processing state at the time when processing for a predetermined number of the update ranking information is completed. An update target extraction processing method in a virtual storage method according to claim 1.