JPS59119727A - Dry etching method - Google Patents
Dry etching methodInfo
- Publication number
- JPS59119727A JPS59119727A JP23291382A JP23291382A JPS59119727A JP S59119727 A JPS59119727 A JP S59119727A JP 23291382 A JP23291382 A JP 23291382A JP 23291382 A JP23291382 A JP 23291382A JP S59119727 A JPS59119727 A JP S59119727A
- Authority
- JP
- Japan
- Prior art keywords
- etched
- etching
- cover
- etching method
- dry etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims description 25
- 238000001312 dry etching Methods 0.000 title claims description 23
- 238000005530 etching Methods 0.000 claims abstract description 22
- 238000001020 plasma etching Methods 0.000 claims abstract description 9
- 238000000992 sputter etching Methods 0.000 claims abstract description 8
- 239000004020 conductor Substances 0.000 claims description 4
- 239000000428 dust Substances 0.000 abstract description 17
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract description 16
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 abstract description 2
- 229910052799 carbon Inorganic materials 0.000 abstract description 2
- 239000000758 substrate Substances 0.000 abstract 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 abstract 1
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052593 corundum Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 238000004544 sputter deposition Methods 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
- 229910001845 yogo sapphire Inorganic materials 0.000 abstract 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 238000004140 cleaning Methods 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 6
- 239000010703 silicon Substances 0.000 description 6
- 230000007547 defect Effects 0.000 description 5
- 150000002500 ions Chemical class 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 101100536577 Caenorhabditis elegans cct-4 gene Proteins 0.000 description 1
- 101000653567 Homo sapiens T-complex protein 1 subunit delta Proteins 0.000 description 1
- 102100029958 T-complex protein 1 subunit delta Human genes 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 239000012634 fragment Substances 0.000 description 1
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 239000000376 reactant Substances 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明はウエノ・等の被エツチング体をドライ、エツチ
ングする方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for drying and etching an object to be etched such as Ueno.
従来、ドライエツチング装置、例えば第1図に示すリア
クティブイオンエツチング装置によるエツチングは以下
に示す方法により行なわれている。すなわち、まずチャ
ンノ々−1内の電極2上の被エツチング体3・・・を設
置する。これらの被エツチング体3・・・はシリコンウ
エノ1上に絶縁膜を介して燐ドーゾ多結晶シリコン膜を
堆積したもので、更に同多結晶シリコン膜表面にはレジ
ストパターンが形成されている。つづいて、チャンバ−
1底部にバタフライ弁4を介して連結した真空ポンプ5
を作動してチャンノ々−1内の空気を抜き、ガス導入口
6からCC24ガスと02ガスを導入し、夫々の分圧が
例えばCC24゜0、I Tot+r # 02 ;
0.04 Tobrとなるよう調整する。次いで、13
.56 MHzの100OV P −Pの高周波電圧を
印加することにより、電極2に直流バイアス−800v
が印加されてチャンノず一1内のCC44がイオンに分
解し、方向性をもって被エツチング体3・・・のレジス
ト/やターンから露出する多結晶シリコン膜と反応する
ため、サイドエツチングがほとんどなく多結晶シリコン
膜がエツチングされる。このようなドライエツチング方
法ではサイドエツチングがitとんどカくエツチングで
きるため、微細加工に適し、最近の超LSIの加工に頻
繁に使用されている。Conventionally, etching using a dry etching apparatus, such as a reactive ion etching apparatus shown in FIG. 1, has been carried out by the following method. That is, first, the object to be etched 3 is placed on the electrode 2 in the channel 1. These objects to be etched 3 are made by depositing a phosphorous doped polycrystalline silicon film on a silicon wafer 1 via an insulating film, and a resist pattern is further formed on the surface of the polycrystalline silicon film. Next, the chamber
1 A vacuum pump 5 connected to the bottom via a butterfly valve 4
is operated to remove the air from the channels 1, and CC24 gas and 02 gas are introduced from the gas inlet 6, so that the respective partial pressures are, for example, CC24°0, I Tot+r # 02;
Adjust to 0.04 Tobr. Then 13
.. By applying a high frequency voltage of 100OV P-P at 56 MHz, a DC bias of -800V was applied to the electrode 2.
is applied, CC44 in the channel 1 decomposes into ions and reacts directionally with the polycrystalline silicon film exposed from the resist/turns of the object to be etched 3. The crystalline silicon film is etched. This dry etching method allows for thorough side etching, and is therefore suitable for microfabrication and is frequently used in the fabrication of recent VLSIs.
しかしながら、上述した従来のドライエツチング方法に
あってはLSIの微細化に伴なって次のような問題が生
じる。即ち、エツチング前又はエツチング中に被エツチ
ング体の多結晶シリコン膜にゴミが付着した場合、ゴミ
の下の多結晶シリコン腰部分がエツチングされずに残シ
、この部分が不良となる。ゴミの成分は被エツチング体
3・・・上もしくは周辺のレジストのかけら、多結晶シ
リコンやレジストと反応ガス(CCt4のイオン)との
反応物質、ウェハからのシリコン屑、その他多種多様で
ある。また、ゴミの被エツチング体3・・・への付着は
、真空引きの時の空圧によって生じるもの、チャンバ−
1内壁面に付着したものがエツチング中に被エツチング
体3・・・の多結晶シリコン膜の落下するもの、或いは
被エツチング体3・・・を電極2上に設置した時の機械
的接触によって生じるものなど種々の形態がある。こう
したゴミは大きさが数μm以上のものが犬1冬ある。However, in the conventional dry etching method described above, the following problems arise as LSIs become smaller. That is, if dust adheres to the polycrystalline silicon film of the object to be etched before or during etching, the lower part of the polycrystalline silicon under the dust is not etched and remains, resulting in a defect. Components of the dust include fragments of resist on or around the object to be etched 3, polycrystalline silicon, a reaction material between the resist and the reactive gas (CCt4 ions), silicon debris from the wafer, and many others. In addition, the adhesion of dust to the object to be etched 3 is caused by the air pressure during vacuuming, and the adhesion of dust to the object to be etched 3.
1 Adhering to the inner wall surface is caused by falling of the polycrystalline silicon film of the object to be etched 3 during etching, or by mechanical contact when the object to be etched 3 is placed on the electrode 2. There are various forms such as things. This kind of garbage is more than a few micrometers in size every winter.
このようなことから、リアクティブイオンエツチング装
置のチャンバ−1内壁面、電極2上などに付着したゴミ
を洗浄、除去すればよい。For this reason, the dust adhering to the inner wall surface of the chamber 1, the top of the electrode 2, etc. of the reactive ion etching apparatus may be cleaned and removed.
しかしながら、洗浄には装置を分解する必要があシ、シ
かも洗浄後も装置の乾燥、エツチング条件の設定し直し
が必要で、1回の洗浄には半日乃至1日程度必要となる
。また、チャン−々−1の内壁面にはエツチング毎に反
応物質が付着するので、ゴミを極力少々くするためには
毎回洗浄する必要があり、多大な労力を要するばかシか
、装置のスループットも大巾に減少する。However, cleaning requires disassembling the device, and even after cleaning, it is necessary to dry the device and reset the etching conditions, and one cleaning takes about half a day to a day. In addition, reactants adhere to the inner walls of the chambers 1 each time they are etched, so it is necessary to clean them every time to minimize the amount of dust. It also decreases drastically.
洗浄頻度は、通常、装置のスループットとゴミの量を考
慮して決めていたが、ゴミによる歩留シの低下は回避す
ることができず、LSIの歩留シ低下の大きな問題と々
る。The cleaning frequency is usually determined by taking into account the throughput of the device and the amount of dust, but the reduction in yield due to dust cannot be avoided, and this is a major problem in reducing the yield of LSI.
なお、上述した問題点はりアクティブイオンエツチング
装置を用いる方法に限らず、ス・母ツタエツチング装置
やイオンエツチング装置等のドライエツチング装置を用
いてエツチングする場合でも同様に起こる。The above-mentioned problems are not limited to the method using an active ion etching device, but also occur when etching is performed using a dry etching device such as a base etching device or an ion etching device.
本発明はシリコンウェハ等の被エツチング体表面へのゴ
ミ付着によるLSIの不良を解消し、歩留り向上とスル
ープットの改善化に寄与し得るドライエツチング方法を
提供しようとするものである。The present invention aims to provide a dry etching method that can eliminate LSI defects caused by dust adhering to the surface of an object to be etched, such as a silicon wafer, and can contribute to improved yield and throughput.
本発明はチャンバー内に設置した被エツチング体をガス
が通過しうる微細孔を有す−る榎、で囲むことによって
、ドライエツチング時に被エツチング体表面にゴミが付
着するのを前記覆で防止し、被エツチング体のエツチン
グ不良を回避することを骨子とするものである。The present invention prevents dust from adhering to the surface of the object to be etched during dry etching by surrounding the object to be etched placed in a chamber with a cover having fine holes through which gas can pass. The main purpose of this method is to avoid etching defects of the object to be etched.
次に、本発明をリアクティプイオンエッチグ装置を用い
たドライエツチング方法に適用した例について第2図及
び第3図を参照して説明する。Next, an example in which the present invention is applied to a dry etching method using a reactive ion etching apparatus will be described with reference to FIGS. 2 and 3.
まず、第2図に示す如くチャンバー内の電極2上に被エ
ツチング体3・・・を設置した後、該電極2上に駿被エ
ツチング体3・・・を囲むように覆1・・・を設置した
。この被エツチング体3・・・は例えばシリコンウェハ
上に酸化膜を介して燐ドープ多結晶シリコン膜を堆積し
たもので、更に同多結晶シリコン膜表面に所望のレジス
ト・やターンが形成されている。また、前記覆Jは第3
図に示す如く、上面開口にステンレス製の網体8が張設
されたAt2o、 、 5to2等の絶縁材料からなる
円筒状の支持台9と、この支持台9上面に固定された複
数の微細孔を有する多孔質フィルタ10とから構成され
ている。なお、多孔質フィルタは石英ガラスAt203
の粉末状物を焼結したもの、カーボン成形物、等を挙げ
ることができる。但し、覆りを三極管のグリッドのよう
に使用して電界を積極的に変化させる場合には、多孔質
フィルタとして、AA 、 Cu 、 Auなどの金属
箔に複数の微細孔を穿設したものを用いることができる
。微細孔の径はl 11m以下に設定することが望まし
い。First, as shown in FIG. 2, the object to be etched 3 is placed on the electrode 2 in the chamber, and then the cover 1 is placed on the electrode 2 so as to surround the object to be etched 3. installed. The object to be etched 3 is, for example, a phosphorous-doped polycrystalline silicon film deposited on a silicon wafer via an oxide film, and a desired resist or turn is further formed on the surface of the polycrystalline silicon film. . Moreover, the above-mentioned cover J is the third
As shown in the figure, there is a cylindrical support base 9 made of an insulating material such as At2o, 5to2, etc., with a stainless steel net 8 stretched over the top opening, and a plurality of fine holes fixed to the top surface of the support base 9. The porous filter 10 has a porous filter 10. Note that the porous filter is made of quartz glass At203.
Examples include sintered powders, carbon molded products, and the like. However, if the covering is used like a triode grid to actively change the electric field, a porous filter with multiple fine holes perforated in metal foil such as AA, Cu, or Au can be used. Can be used. The diameter of the micropores is desirably set to 11 m or less.
次イで、チャンバー底部にバタフライ弁ヲ介して連結し
た真空ポンプを作動してチャンバ内の空気を抜き、ガス
導入口からcct4ガスと02ガスを導入し、夫々分圧
が例えばCCl2: 0.ITorr + 02:0.
04 Torrとなるように調整した。Next, a vacuum pump connected to the bottom of the chamber via a butterfly valve is operated to remove the air from the chamber, and CCT4 gas and 02 gas are introduced from the gas inlet, and the partial pressure of each is set to, for example, CCl2:0. ITorr+02:0.
04 Torr.
つづいて、13.56 MHzの100OV p−p
ノ高周波電圧を印加することによシ、電極2に直流バイ
アス−800Vを印加して、チャンバー内のCCl2が
イオンに分解し、方向性をもって覆L・・・の多孔質フ
ィルタxo7);−び網体8を通って同種7・・・内の
被エツチング体3・・・のレジストパターンがら露出す
る多結晶シリコン膜と反応してサイドエッチジグがほと
んどなく多結晶シリコン膜がエツチングされる。Next, 13.56 MHz 100OV p-p
By applying a high frequency voltage, a DC bias of -800V is applied to the electrode 2, and the CCl2 in the chamber is decomposed into ions, and the porous filter with the cover L... It reacts with the polycrystalline silicon film exposed from the resist pattern of the object to be etched 3 . . . in the same type 7 .
しかして、上記方法によれば、真空引きの時やエツチン
グの時にゴミが被エツチング体3・・・表面に落ちても
、同被エツチング体3・・・は覆7・・・で囲まれてい
るため、ゴミが抜工・ッチング体3・・・表面に付着す
るのを阻止できる。また、覆!・・・は第3図に示す如
く支持台9の網体8上に多孔質フィルターoを固定した
構造となっているため、チャンバー内のイオン化したc
ctガスはフィルターo及び網体8全通して自由に同種
l・・・内に流通でき、その結果、被エツチング体3・
・・(7) L/ シス) /?ターンから露出した多
結晶シリコン膜を支障なくエツチングできる。更に、覆
l・・・は交換可能で、1回のエツチングの都度、洗浄
済の覆を用いれば、覆の上面からゴミがその内に侵入す
るという心配はな込。しかも、覆7・・・はりアクティ
ブイオンエツチング装置のチャンバーに比べて極めて小
さいため、洗浄も極めて容易である。According to the above method, even if dust falls onto the surface of the object to be etched 3 during vacuuming or etching, the object to be etched 3 is surrounded by the cover 7. Therefore, it is possible to prevent dust from adhering to the surface of the cutting/etching body 3. Also, covered! ... has a structure in which a porous filter o is fixed on the net 8 of the support stand 9, as shown in Fig. 3, so that the ionized c inside the chamber is
The ct gas can freely flow through the filter o and the mesh body 8 into the same kind l..., and as a result, the etched body 3...
...(7) L/ sis) /? The polycrystalline silicon film exposed from the turns can be etched without any problem. Furthermore, the cover l... is replaceable, and if you use a cleaned cover each time you etch, you don't have to worry about dirt getting into the cover from the top surface. Moreover, since the cover 7 is extremely small compared to the chamber of the active ion etching apparatus, cleaning is also extremely easy.
したがって、被エツチング体のレジ7) ノjターンか
ら露出する多結晶シリコン膜をエツチングするに際し、
被エツチング体3・・・を覆7・・・で囲むことによシ
、被エツチング体3・・・表面へのゴミ付着するエツチ
ング不良を防止でき、しかも洗浄が容易で装置の保守も
簡単となる。その結果、LSIを高歩留勺で製造できる
と共に、リアクティブイオンエツチング装置のヌル−プ
ツトも向上できる。Therefore, when etching the polycrystalline silicon film exposed from the resist 7) turn of the object to be etched,
By surrounding the object 3 to be etched with the cover 7, it is possible to prevent etching defects caused by dust adhering to the surface of the object 3 to be etched, and also to facilitate cleaning and maintenance of the apparatus. Become. As a result, LSIs can be manufactured with high yield, and the nullput of the reactive ion etching apparatus can also be improved.
なお、上記実施例では電極上に被エツチング体を設置し
、同電極上に被エツチング体を囲むように覆を設置した
が、例えば第4図に示す如くチャック11上に被エツチ
ング体3を設置し、同チャック1ノ上に被エツチング体
3を囲むように覆7i設置して被エツチング体3をチャ
ック11と覆Jとで完全に囲むようにしてドライエツチ
ングを行なってもよい。このように、被エツチング体3
をチャック11と覆7で完全に囲み、エツチングの都度
洗浄したチャックと覆とを用いて被エツチング体の多結
晶シリコン膜のエツチングを行なえば、電極2上のゴミ
が被エツチング体3表面に付着するのを完全に防止でき
る。In the above embodiment, the object to be etched was placed on the electrode, and the cover was placed on the electrode so as to surround the object to be etched, but the object to be etched 3 was placed on the chuck 11 as shown in FIG. However, dry etching may be performed by placing a cover 7i on the chuck 1 so as to surround the object 3 to be etched so that the object 3 to be etched is completely surrounded by the chuck 11 and the cover J. In this way, the object to be etched 3
If the polycrystalline silicon film of the object to be etched is completely surrounded by the chuck 11 and the cover 7, and the chuck and cover are cleaned each time the etching is performed, the dust on the electrode 2 will not adhere to the surface of the object to be etched 3. This can be completely prevented.
上記実施例で覆として第3図に示す構造のものを用いた
が、これに限定されない。例えば第5図に示す如く開口
部に網体(図示せず)を張設した円筒状の支持台9とこ
の網体上に載置された多孔質フィルタ10と、前記支持
台9の上面に固着され、該フィルタ10f挾持する網体
12が張設されたリング状の押え部材13とからなる覆
7f用いてもよい。また、第6図に示す如く底面のみが
開口された中空形状をなす石英ガラス、At203など
の絶縁材料からなる多孔質の覆りを用いてもよい。更に
1第7図に示す如く多孔質フィルタIQ及びリング状の
押え部材13′ヲ導電材で形成すると共に、その一部に
舌片14を突出させ、更にこの舌片14に配線15を接
続して覆りを構成し、該配線15によシ押え部材13′
と多孔質フィルタ10′の電位を固定してもよい。Although the structure shown in FIG. 3 was used as the cover in the above embodiment, the structure is not limited thereto. For example, as shown in FIG. A cover 7f consisting of a ring-shaped presser member 13 fixed to the ring-shaped holding member 13 on which a net body 12 for holding the filter 10f is stretched may also be used. Further, as shown in FIG. 6, a porous cover made of an insulating material such as quartz glass or At203 and having a hollow shape with only the bottom open may be used. Furthermore, as shown in FIG. 7, the porous filter IQ and the ring-shaped holding member 13' are made of a conductive material, and a tongue piece 14 is made to protrude from a part thereof, and a wiring 15 is connected to this tongue piece 14. A holding member 13' is attached to the wiring 15 to form a cover.
The potential of the porous filter 10' may be fixed.
上記実施例ではシリコンウニノー上に酸化膜を介して多
結晶シリコン膜を堆積した形態の被エツチング体を用い
て該多結晶シリコン膜をエツチングする方法について述
べたが、シリコンウェハのみ、シリコンウニノー上に5
i02膜を堆積した形態の被エツチング体を用いて、シ
リコンウェハやSiO□膜のエツチングを行なってもよ
い。In the above embodiment, a method was described in which a polycrystalline silicon film was etched using an object to be etched in which a polycrystalline silicon film was deposited on a silicon wafer through an oxide film. 5 on top
A silicon wafer or a SiO□ film may be etched using an object to be etched with an i02 film deposited thereon.
本発明は上記実施例の如きリアクティブイオンエツチン
グ装置を用いたドライエツチングに限らず、スパッタエ
ツチング装置、イオンエツチング装置、更にいわゆる等
方性プラズマエツチング装置を用いてドライエツチング
する場合でも同様な効果を発揮できる。The present invention is not limited to dry etching using a reactive ion etching apparatus as in the above embodiment, but also applies to dry etching using a sputter etching apparatus, an ion etching apparatus, and even a so-called isotropic plasma etching apparatus. I can demonstrate it.
以上詳述した如く、本発明によればドライエツチングに
際しての真空引きやエツチング中にゴミが被エツチング
体表面に付着するのを阻止してエツチング不良を回避で
き、ひいてはLSIを高歩留りで量産的に製造できる等
顕著な効果を有する。As detailed above, according to the present invention, etching defects can be avoided by preventing dust from adhering to the surface of the object to be etched during vacuuming and etching during dry etching. It has remarkable effects such as being able to be manufactured.
第1図はりアクティブイオンエツチング装置の概略図、
第2図は本発明の実施例に用いられるリアクティブイオ
ンエツチング装置の電極付近の概略図、第3図は第2図
の装置に用いられる覆の分解斜視図、第4図は本発明の
他の実施例に用いられるリアクティブイオンエツチング
装置の電極付近の概略図、第5図〜第7図は夫夫本発明
のドライエツチング方法に用いられる覆の他形態を示す
斜視図である。
1・・・チャンバー、2・・・電極、3・・・被エツチ
ング体、5・・・真空号?ング、6・・・ガス導入口、
Z・・・覆、9・・・支持台、10.10’・・・多孔
質フィルタ、13 、13’・・・押え部材、15・・
・配線。
出願人代理人 併理+ 鈴 江 せ 彦第1図
第4図
第5図
123−
第6図Figure 1: Schematic diagram of beam active ion etching device;
FIG. 2 is a schematic diagram of the vicinity of the electrodes of a reactive ion etching device used in an embodiment of the present invention, FIG. 3 is an exploded perspective view of a cover used in the device of FIG. 2, and FIG. 5 to 7 are perspective views showing other forms of the cover used in the dry etching method of the present invention. 1...Chamber, 2...Electrode, 3...Etched object, 5...Vacuum number? 6... gas inlet;
Z...cover, 9...support stand, 10.10'...porous filter, 13, 13'...pressing member, 15...
·wiring. Applicant's agent: Sehiko Suzue Figure 1 Figure 4 Figure 5 123- Figure 6
Claims (9)
ツチングするドライエツチング方法において、前記被エ
ツチング体をガスが透過しうる微細孔を有する覆で囲む
ことを特徴とするドライエツチング方法。(1) A dry etching method for etching an object to be etched placed in a chamber, characterized in that the object to be etched is surrounded by a cover having micropores through which gas can pass.
チング法によシ行なうことを特徴とする特許請求の範囲
第1項記載のドライエツチング方法。(2) A dry etching method according to claim 1, characterized in that the object to be etched is etched by a step etching method.
チング法によル行なうことを特徴とする特許請求の範囲
第1項記載のドライエツチング方法。(3) The dry etching method according to claim 1, wherein the object to be etched is etched by an ion etching method.
オンエッチング法によシ行なうことを特徴とする特許請
求の範囲第1項記載のドライエツチング方法。(4) The dry etching method according to claim 1, characterized in that the object to be etched is etched by a reactive ion etching method.
有するものであることを特徴とする特許請求の範囲第1
項記載のドライエツチング方法。(5) Claim 1, characterized in that the plurality of micropores opened in the cover have a diameter of 1 μm or less.
Dry etching method described in section.
ルタと、このフィルタを支える支持部とからなるもので
あることを特徴とする特許請求の範囲第1項記載のドラ
イエツチング方法。(6) The dry etching method according to claim 1, wherein the cover is composed of a porous filter having micropores through which gas can pass, and a support portion that supports the filter.
求の範囲第1項記載のドライエツチング方法。(7) The dry etching method according to claim 1, wherein a part of the cover is made of a conductor.
位を外部から制御すること全特徴とする特許請求の範囲
第7項記載のドライエツチング方法。(8) The dry etching method according to claim 7, characterized in that a wiring is connected to the conductor portion of the cover, and the potential of the conductor portion is controlled from the outside.
る特許請求の範囲第1項記載のドライエツチング方法。 α1 被エツチング体がウェハ上に被膜を形成したもの
であることを特徴とする特許請求の範囲第1項記載のド
ライエツチング方法。(9) The dry etching method according to claim 1, wherein the object to be etched is a wafer. α1 The dry etching method according to claim 1, wherein the object to be etched is a wafer with a film formed thereon.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23291382A JPS59119727A (en) | 1982-12-24 | 1982-12-24 | Dry etching method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23291382A JPS59119727A (en) | 1982-12-24 | 1982-12-24 | Dry etching method |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59119727A true JPS59119727A (en) | 1984-07-11 |
Family
ID=16946795
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP23291382A Pending JPS59119727A (en) | 1982-12-24 | 1982-12-24 | Dry etching method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59119727A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62106628A (en) * | 1985-11-01 | 1987-05-18 | Fujitsu Ltd | Vacuum processing device |
JPS62119925A (en) * | 1985-11-20 | 1987-06-01 | Mitsubishi Electric Corp | Semiconductor manufacturing device |
-
1982
- 1982-12-24 JP JP23291382A patent/JPS59119727A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62106628A (en) * | 1985-11-01 | 1987-05-18 | Fujitsu Ltd | Vacuum processing device |
JPS62119925A (en) * | 1985-11-20 | 1987-06-01 | Mitsubishi Electric Corp | Semiconductor manufacturing device |
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