JPS59107553A - Wire bonding process of semiconductor device - Google Patents

Wire bonding process of semiconductor device

Info

Publication number
JPS59107553A
JPS59107553A JP57217965A JP21796582A JPS59107553A JP S59107553 A JPS59107553 A JP S59107553A JP 57217965 A JP57217965 A JP 57217965A JP 21796582 A JP21796582 A JP 21796582A JP S59107553 A JPS59107553 A JP S59107553A
Authority
JP
Japan
Prior art keywords
wire
island
frame
wire bonding
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57217965A
Other languages
Japanese (ja)
Inventor
Koichi Takegawa
光一 竹川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP57217965A priority Critical patent/JPS59107553A/en
Publication of JPS59107553A publication Critical patent/JPS59107553A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49517—Additional leads
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    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49558—Insulating layers on lead frames, e.g. bridging members
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To cope with the increase of leads by a method wherein an insulator frame adheres to external periphery of the island for semiconductor element while a lead frame provided with a groove between frame and element is utilized. CONSTITUTION:A semiconductor pellet 1 is soldered 3 on an island 2 and the solder is prevented from flowing out by a groove 10. Next an insulator frame 9 adheres to the island 2 by soldering process. In such a constitution, wire is elongated in stabilized wire loop made supported by the frame 9, thereby wire bonding with high reliability may be assured coping with the increase of leads.

Description

【発明の詳細な説明】 本発明は、半導体装置の製造方法におけるワイヤーポン
ディング方法の改良に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a wire bonding method in a semiconductor device manufacturing method.

通常の樹脂封止形半導体装置の製造方法は、外部導出用
リード（以下リードと称す）を備えたリードフレームを
用意し、該リードフレームの半導体素子搭載部（アイラ
ンド）に半導体素子を固着し、リードと半導体素子の雷
、極とを金ＲＪ３ｆＳ（、ワイヤー）でボンディング後
、エポキシ＠ｌｌ旨等で聞ｊ止し、リードの一端をｎ呈
させたものでちる。A typical method for manufacturing a resin-encapsulated semiconductor device is to prepare a lead frame equipped with external leads (hereinafter referred to as leads), fix the semiconductor element to the semiconductor element mounting part (island) of the lead frame, and After bonding the leads and the poles of the semiconductor element with gold RJ3fS (wire), seal with epoxy or the like, and then tear one end of the lead with a wire.

ここで、上記半導体装置の製造工程のうち　Ｅ？導体素
子−ヒの電接とアイランド周囲に配列されン辻リードと
をワイヤーで結ぶボンディング工程においては、最近の
半導体素子能力の増力１に伴って電極数の増加が著しく
なシ■々の問題が生じてきている。Here, in the manufacturing process of the above semiconductor device, E? In the bonding process that connects the electrical contacts of conductor elements and the cross-leads arranged around the island using wires, there are various problems associated with the significant increase in the number of electrodes due to the recent increase in the capacity of semiconductor elements1. It's starting to happen.

即ち、電極数の（’；ｌ加は、アイランド周囲に配列さ
せる電極に対応するリードの截を増加させる結果となる
が、リードフレームの製造能力に限度があること、およ
びワイヤーが半導体素子やアイランドの縁に接触１７な
いように、ワイヤーループを正常に形成するだめのワイ
ヤーの長さに制限があること等によってアイランド周囲
に配列可能なす−ド数には限度がある。In other words, adding (';l) to the number of electrodes results in an increase in the cutout of the leads corresponding to the electrodes arranged around the island, but there is a limit to the manufacturing capacity of lead frames, and the wires are not suitable for semiconductor devices or islands. There is a limit to the number of wires that can be arranged around the island, such as because there is a limit to the length of the wire that can properly form a wire loop so as not to touch the edge of the island.

この問題声を解決する方法としては、ワイヤー長さの制
御ＳＰを緩和する方向に求める方が効果が大きい。彷゛
′って従来、ワイヤー長さを長くするために、例えは第
１Ｍに示す如く、リード５の先端を上方に曲げてワイヤ
ー４の支えとする方法や、第２図に丞す如＜、リードと
アイランドの間に支え６をワイヤーボンディング時の加
計・用ヒーターを兼ねたステージ７に設ける方法等が試
みられている。同、第１図、第２図において、１は半導
体装置、２はアイランド（３はろう材である。As a method for solving this problem, it is more effective to seek a direction in which the wire length control SP is relaxed. Conventionally, in order to increase the length of the wire, there have been methods such as bending the tip of the lead 5 upward to support the wire 4, as shown in Fig. 1M, and a method as shown in Fig. 2. Attempts have been made to provide a support 6 between the lead and the island on a stage 7 that also serves as a heater for wire bonding. 1 and 2, 1 is a semiconductor device, 2 is an island (3 is a brazing material).

しかしながら、−ヒｄ［２方法のうち、曲者については
、ボンティング後のワイヤーが半導体素子やアイランド
の緑に接触を防ぐ効果が十分でないばかシでなく、リー
ド先端を上方に曲げるために、リードフレームを重ねて
保管することが困難になること勿の欠点を持っている。However, among the two methods, the bending method is not effective enough to prevent the wire after bonding from coming into contact with the semiconductor element or the green of the island, but in order to bend the lead tip upward, The disadvantage of course is that it becomes difficult to stack and store lead frames.

また伝者については、メツ１争 ボンディング後、ボンディングステージから離れ、支え
が無くなりブこ状態でのワイヤーループに信頼性が乏し
いことの他、第３図に示す如くアイシンド支持す−ド上
には、支え６を設けることができないために、該支持リ
ードを横切ってワイヤーボンディングされたワイヤー１
１については支えの効果は期待できない等の欠点を持っ
ている。In addition, regarding the wire loop, it separated from the bonding stage after the first bonding, and the wire loop was unreliable due to the lack of support, as shown in Figure 3. , the wire 1 wire-bonded across the support lead because the support 6 cannot be provided.
Regarding 1, it has drawbacks such as not being able to be expected to have a supporting effect.

本発明は、アイランド上に絶縁体の枠を設けることによ
りボンゲインクワイヤーの支えとし、安定したワイヤー
ループを保持しながらワイヤー長さを長くすることを可
能にすることによって、従来の方法の欠点を解決すると
ともにリード数の増加に対応１〜ようとするものである
。The present invention overcomes the shortcomings of previous methods by providing a frame of insulator over the island to support the bondage wire, allowing wire lengths to be increased while maintaining a stable wire loop. The aim is to solve this problem and to cope with the increase in the number of leads.

すなわち庫坑５明の％　昏ｉＪ、リードフレームの半導
体素子搭載部に半導体素子を固着する前または後に、槍
縁体材を半導体素子搭載部上外周に位置するように接着
し、その後ワイヤーボンディングする半導体装置のワイ
ヤーボンディング方法にある。又、上記方法において、
リードフレームの半導体素子搭載部上の絶縁体枠と半導
体素子との間に溝を設けたリードフレームを用いてワイ
ヤーボンディングすることができる。That is, before or after fixing the semiconductor element to the semiconductor element mounting part of the lead frame, the lance body material is glued so as to be located on the upper outer periphery of the semiconductor element mounting part, and then wire bonding is performed. A wire bonding method for semiconductor devices. Moreover, in the above method,
Wire bonding can be performed using a lead frame in which a groove is provided between the insulator frame on the semiconductor element mounting portion of the lead frame and the semiconductor element.

以下実旋例により本発明の詳細な説明する。The present invention will be explained in detail below using practical examples.

本説明によるワイヤーボンティング方法の一実施例を第
４図の平面図及びそのＡ　−Ａ′　　の断面図を第５図
に示す。同図において、■はペレット、２はアイランド
、５はリードである。ワイヤー４は、絶縁体枠９により
支えられている。アイランド上にあるｒＪ４１０は、ペ
レットをアイランド１（・Ｃ固着する時のろう材及び絶
縁体枠をアイランド上に接着する時の接着剤が流出し、
各々の［（１定に影響を及ぼすことに防止するために設
けたものである。An embodiment of the wire bonding method according to the present description is shown in a plan view in FIG. 4 and in a sectional view taken along line A-A' in FIG. 5. In the same figure, ■ is a pellet, 2 is an island, and 5 is a lead. The wire 4 is supported by an insulator frame 9. rJ410 on the island, the brazing material when fixing the pellet to island 1 (C) and the adhesive when bonding the insulator frame onto the island leaked out,
This is provided to prevent any influence on each [(1).

上記の￥ｔｊ＋！ｉ□ρ１１は、ペレットをアイランド
に固着し、絶縁体枠をアイランドに接着後ワイヤーボン
ディングする力・、絶α体枠を先にアイランドに接着し
、ペレットヲアイランドに同着後ワイヤーボンディング
することによって実施することができるが、ペレット固
着方法の多くは、ろう材にＡＬＩ−８ｉ　　共晶合金や
はんだ等の高温で実施されるＪ合が多いため、ペレット
固着後に給源体枠を接着した方が、絶縁体及びその接着
剤の材質上有利である。なお、ワイヤーボンディングも
熱圧着のプヒめ、通常高温で実施されるが、超音波熱圧
着法で行なえば、温厩は寸分に丁げることができ、牲に
問題はない、。Above ¥tj+! i□ρ11 is the force of adhering the pellet to the island, adhering the insulator frame to the island, and then wire bonding. However, most of the pellet fixing methods involve J-bonding, which is carried out at high temperatures using ALI-8i eutectic alloy or solder for the brazing filler metal, so it is better to bond the source frame after pellet fixing. This is advantageous in terms of the materials of the insulator and its adhesive. Note that wire bonding is usually carried out at high temperatures just like thermocompression bonding, but if it is carried out using ultrasonic thermocompression bonding, warm wire bonding can be cut into small pieces without any problems.

また、絶縁体枠の擬看敵、あらかじめ絶ν体枠に接着剤
をつりで接着するか、アイランド上ヒにに着剤を塗布１
〜で接着するか、゛まだは４・ｈ餘体枠乍ｔトを熱硬化
性樹１１ｂ等で形成し、アイランド上に加熱圧着する方
法′６【によって実施することが−Ｃ′きる。。In addition, to simulate the insulator frame, you can attach adhesive to the insulator frame in advance, or apply adhesive to the top of the island.
Alternatively, it can be carried out by the method '6' of forming a 4.h resin frame 11b of thermosetting resin 11b or the like and heat-pressing it onto the island. .

さらに、ペレソトンーン′イランド（Ｃ固］Ｕするろう
ルすに釧ペースト等の嵌肩剤を１更用フ”る−賜会は、
βらかじめア・１７７１１体に懐着帽を伶布しＣおンル
シ゛、ペレット及Ｕ・１把縁体枠の接着は、１・月−９
着剤にて容易に芙冷でき、この場合については、第・１
図の溝も年債となる。In addition, apply a shouldering agent such as sushi paste to the wax.
Begin by placing a pocket cap on the body of A.17711, attaching the pellets and the U.1 gripping body frame, and attaching the pellets and U.
It can be easily cooled with adhesive, and in this case, the first
The grooves in the figure are also annual bonds.

以上のｙ！　＜　、’ｐ　ｓ’ｅ明によるワ、（ｐｙ−
ボンディング方法によれば、従来の方法に比べより信頼
性の高い９ｇでワ・イヤー長百を長くすることが可能と
なり、それによってリード数の増力ｎにともなって生じ
るワイヤーボンディング工程ｅこおける問題点を緩和し
、最近の半導体装置のリード数増、υ口の１頃向に対処
することができる。More than y! < , 'p s'e wa, (py-
According to the bonding method, it is possible to increase the length of the wire at 9g, which is more reliable than the conventional method, and thereby eliminates problems in the wire bonding process that occur as the number of leads increases. This makes it possible to deal with the recent increase in the number of leads in semiconductor devices and the υ limit.

岡、本発明に用いる絶縁枠はセラミックや樹脂状のもの
あるいは表面が？緑化された金属でもよい。又、接着剤
は樹脂状のものや金属粉を含んだもの丈でなく合金ろう
拐や、半田でも良い。Oka, is the insulating frame used in this invention made of ceramic or resin, or does it have a surface? Green metal may also be used. Further, the adhesive does not need to be resin-like or contain metal powder, but may be alloy wax or solder.

【図面の簡単な説明】[Brief explanation of drawings]

第１図、第２図、第３図は従来の方法による半導体装置
の断面図と平面図であり、第４図は本発明の実施例によ
る半導体装置の平面図、第５図は第４図Ａ−Ａ’　の断
面図である。 １・・・・・・半導体装置、２・・・・・・アイランド
、３・・・・・・ろう材、４・・・・・・ワイヤー、５
・・・・・・リード、６・・・・・・ボンディングステ
ージ上のワイヤー支え、７・・・・・・ボンディングス
テージ、８・・・・・・接着剤、９・・・・・・絶縁体
枠、１０・・・・・・溝、１１・・・・・・アイランド
支持リードを横切るワイヤー。1, 2, and 3 are a cross-sectional view and a plan view of a semiconductor device according to a conventional method, FIG. 4 is a plan view of a semiconductor device according to an embodiment of the present invention, and FIG. 5 is a plan view of a semiconductor device according to an embodiment of the present invention. It is a sectional view taken along AA'. 1... Semiconductor device, 2... Island, 3... Brazing material, 4... Wire, 5
...Lead, 6...Wire support on bonding stage, 7...Bonding stage, 8...Adhesive, 9...Insulation Body frame, 10...Groove, 11...Wire crossing the island support lead.

Claims (2)

【特許請求の範囲】[Claims] （１）リードフレームの半導体素子搭載部に半導体素子
を固着する前または後に、絶縁体枠を半導体素子搭載部
上外周に位置するよなに接着し、。 その後ワイヤーボンディングすることを特徴とする半導
体装置のワイヤーボンディング方法。(1) Before or after fixing the semiconductor element to the semiconductor element mounting part of the lead frame, an insulator frame is glued so as to be located on the upper outer periphery of the semiconductor element mounting part. A wire bonding method for a semiconductor device, characterized in that wire bonding is then performed. （２）リードフレームの半導体素子搭載部上の絶縁体枠
と半導体素子との間に溝を設けたリードフレームを用い
てワイヤーポンティングすることを特徴とする特許請求
の範囲第（１）頓に記載の半導体装置のワイヤーポンデ
ィング方法。(2) Wire porting is performed using a lead frame in which a groove is provided between the semiconductor element and the insulator frame on the semiconductor element mounting portion of the lead frame. The wire bonding method for the semiconductor device described above.
JP57217965A 1982-12-13 1982-12-13 Wire bonding process of semiconductor device Pending JPS59107553A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57217965A JPS59107553A (en) 1982-12-13 1982-12-13 Wire bonding process of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57217965A JPS59107553A (en) 1982-12-13 1982-12-13 Wire bonding process of semiconductor device

Publications (1)

Publication Number Publication Date
JPS59107553A true JPS59107553A (en) 1984-06-21

Family

ID=16712500

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57217965A Pending JPS59107553A (en) 1982-12-13 1982-12-13 Wire bonding process of semiconductor device

Country Status (1)

Country Link
JP (1) JPS59107553A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5376756A (en) * 1991-12-20 1994-12-27 Vlsi Technology, Inc. Wire support and guide
JP6986796B1 (en) * 2021-06-04 2021-12-22 ハイソル株式会社 Coil structure

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5376756A (en) * 1991-12-20 1994-12-27 Vlsi Technology, Inc. Wire support and guide
US5430250A (en) * 1991-12-20 1995-07-04 Vlsi Technology, Inc. Wire support and guide
JP6986796B1 (en) * 2021-06-04 2021-12-22 ハイソル株式会社 Coil structure
JP2022186186A (en) * 2021-06-04 2022-12-15 ハイソル株式会社 Coil structure body

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