JPS59101850A - Semiconductor device having groove filled with insulation resin - Google Patents

Abstract

PURPOSE:To enable to fill a V-groove at a low temperature and facilitate the formation of a small chip and the high integration by a method wherein the groove reaching a substrate from an eqitaxial layer is provided at the part of insolation between semiconductor elements of a bipolar integrated circuit, an oxide film and a nitride film are formed over the surface including this groove, and only this groove is filled with insulation resin. CONSTITUTION:After removing the fixed oxide film 9 on the surface of a semiconductor by using a mask, the V-grooves 13 having apertures reaching the substrate 1 from the epitaxial layer 3 are formed by anisotropic etching with an alkaline solution. Next, the fixed oxide film 9 is removed by using a mask after forming the oxide film 9 over the entire surface, thereafter phosphorus is diffused to the collector 5 and boron to the base 6 and the graft base 7, which are then oxidized, and further phosphorus is diffused to the emitter 8. Then, after forming the oxide film 9 over the entire surface, the nitride film 10 is formed thereon. Afterwards, the coating to the V-grooves 13 and the part other than the V-grooves 13 is performed by coating the surface of the wafer with the insulation resin 14. The insulation resin 14 is plasma-etched, thus leaving the insulation resin 14 only in the V-grooves 13.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention aims to increase the degree of integration of bipolar integrated circuits by forming a V-groove in a separation area between semiconductor elements.
This invention relates to a semiconductor device in which only the groove is filled with an insulating resin.

Conventionally, the method for forming an element isolation region is to remove a sufficient amount of oxide film covering the semiconductor surface, and then selectively introduce boron into the epitaxial layer in order to convert a part of the n-type epitaxial layer into a p-type. It is formed by diffusion and oxidation.

However, in this method, boron is diffused in the thickness direction (hereinafter referred to as the vertical direction) of the epitaxial layer by diffusion and oxidation, and at the same time, it is also diffused in the horizontal direction up to 80% of the distance in the vertical direction. This has forced designs to take distance into account, and has become a factor in reducing the degree of integration of semiconductor devices.

- Another method for forming an element isolation region is to form a recess in the vertical direction of the epitaxial layer, fill the inside of the recess with polycrystalline silicon, apply a resist on the surface, and then plasma There are methods such as flattening the surface by etching, but these methods have drawbacks such as requiring heating at approximately 600 to 700° C. for a long time in order to fill with polycrystalline silicon.

An object of the present invention is to provide a semiconductor device that eliminates the above-mentioned drawbacks.

A feature of the present invention is that in a bipolar integrated circuit, V
The semiconductor device has a groove, an oxide film and a nitride film are formed on the surface of the semiconductor including the V-groove, and an insulating resin is filled only in the V-groove of the semiconductor device.

Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a sectional view of a conventional example. In FIG. 1, boron is diffused and then oxidized to form a device isolation region 4, which isolates the TR device including the base 6, graft base 7, collector 5, and emitter 8 from adjacent devices. On top of this is an oxide film 9. Nitride film 10. Contact part 15. Aluminum 11 and alumina 12 are formed. In such a conventional example, the element isolation region 4 causes a reduction in the degree of integration due to lateral diffusion.

FIG. 2 (N~(q) is a cross-sectional view of the process according to the embodiment of the present invention. In FIG. 2 (5), after removing a predetermined oxide film 9 on the surface of the C semiconductor using a mask, Directional etching is performed to form a V-groove 13 having an opening extending from the epitaxial layer 3 to the substrate 1.

Next, as shown in FIG. 2 (5), after forming an oxide film 9 on the entire surface, a mask is used to remove a predetermined portion of the oxide film 9, and then the collector 5 is covered with phosphorus, the base 6 and the graft base 7. Boron is diffused and oxidized into the emitter 8, and phosphorus is further diffused into the emitter 8. Next, after forming an oxide film 9 over the entire surface, a nitride film 10 is formed thereon. Thereafter, the insulating resin 14 is applied to the V-groove 13 and the portions other than the V-groove 13 by rotating the wafer in the same manner as applying resist to the wafer surface. Next, the insulating resin 14 is plasma-etched to leave the insulating resin 14 only in the V-groove 13 as shown in FIG. In addition, insulating resin 1 is added to groove 13.
The purpose of filling the layer 4 is to obtain insulation between elements and to flatten the wafer surface to prevent defective steps due to step differences during aluminum wiring.

In such an embodiment, the lateral diffusion of the element isolation region 4 as seen in the conventional structure of FIG. 1 can be ignored.

As is clear from the above description, the semiconductor device of the present invention can fill the V-groove 13 at a lower temperature than the conventional structure.
Furthermore, by diffusing boron into the element isolation region 4 and reducing the oxidized area, it has the effect of facilitating miniaturization and higher integration of semiconductor devices.

[Brief explanation of the drawing]

Figure 1 is a sectional view of a conventional semiconductor device, and Figure 2 (5
) to 0 are cross-sectional views in the order of steps of the embodiments of the present invention, and FIG. 2 (5) is a cross-sectional view in which the
Figure (B) shows that after forming the V-groove, an oxide film and a nitride film are formed, and then a graft base, emitter and collector are formed.
FIG. 2 is a cross-sectional view after the insulating resin is applied (q is the final cross-sectional view of the semiconductor device of the present invention. In the figure, 1...substrate (p or n type),
2°°°°°°embedding (sb or B or As), 3...
...Epitaxial layer (n-type or p-type), 4...
...Element isolation region, 5...Collector, 6...
...Base, 7...Graft base, 8.
...Emitter, 9...Oxide film, 10...
... Nitride film, 11 ... Aluminum, 12
...Alumina (AAzOs), x3...
・V groove, 14...Insulating resin, 15...
This is the contact part.

Claims (1)

[Claims] In a bipolar integrated circuit device, a separation part between semiconductor elements has a V-groove extending from an epitaxial layer to a substrate,
A semiconductor device characterized in that an oxide film and a nitride film are formed on a semiconductor surface including the V-groove, and only the V-groove is filled with an insulating resin.