JPS59100645A - 符号訂正方式 - Google Patents
符号訂正方式Info
- Publication number
- JPS59100645A JPS59100645A JP21040582A JP21040582A JPS59100645A JP S59100645 A JPS59100645 A JP S59100645A JP 21040582 A JP21040582 A JP 21040582A JP 21040582 A JP21040582 A JP 21040582A JP S59100645 A JPS59100645 A JP S59100645A
- Authority
- JP
- Japan
- Prior art keywords
- data
- code
- bit
- error
- bits
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0075—Transmission of coding parameters to receiver
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Error Detection And Correction (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21040582A JPS59100645A (ja) | 1982-11-30 | 1982-11-30 | 符号訂正方式 |
EP19830111843 EP0110352B1 (en) | 1982-11-30 | 1983-11-25 | Digital information transmitting system and digital information receiving apparatus |
DE8383111843T DE3381425D1 (de) | 1982-11-30 | 1983-11-25 | System zur uebertragung von digitalinformationen und empfangseinrichtung fuer digitalinformationen. |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21040582A JPS59100645A (ja) | 1982-11-30 | 1982-11-30 | 符号訂正方式 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59100645A true JPS59100645A (ja) | 1984-06-09 |
JPH0259661B2 JPH0259661B2 (enrdf_load_stackoverflow) | 1990-12-13 |
Family
ID=16588765
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP21040582A Granted JPS59100645A (ja) | 1982-11-30 | 1982-11-30 | 符号訂正方式 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59100645A (enrdf_load_stackoverflow) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59141845A (ja) * | 1983-02-03 | 1984-08-14 | Nippon Hoso Kyokai <Nhk> | デジタル信号伝送方式 |
JPS59176939A (ja) * | 1983-03-28 | 1984-10-06 | Hitachi Ltd | 符号誤り制御装置 |
-
1982
- 1982-11-30 JP JP21040582A patent/JPS59100645A/ja active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59141845A (ja) * | 1983-02-03 | 1984-08-14 | Nippon Hoso Kyokai <Nhk> | デジタル信号伝送方式 |
JPS59176939A (ja) * | 1983-03-28 | 1984-10-06 | Hitachi Ltd | 符号誤り制御装置 |
Also Published As
Publication number | Publication date |
---|---|
JPH0259661B2 (enrdf_load_stackoverflow) | 1990-12-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR910000349B1 (ko) | 인터리이브회로 | |
JPH0126209B2 (enrdf_load_stackoverflow) | ||
JPS61169940A (ja) | 多重エラ−訂正方法 | |
US4236247A (en) | Apparatus for correcting multiple errors in data words read from a memory | |
US3144635A (en) | Error correcting system for binary erasure channel transmission | |
US4573155A (en) | Maximum likelihood sequence decoder for linear cyclic codes | |
JPS59100645A (ja) | 符号訂正方式 | |
US3633162A (en) | Apparatus for correcting and indicating errors in redundantly recorded information | |
RU2450332C1 (ru) | Устройство хранения информации с обнаружением одиночных и двойных ошибок | |
JPS6029068A (ja) | 伝送誤り検出方式 | |
JPH0855066A (ja) | エラー訂正及び変換システム | |
JPH0462216B2 (enrdf_load_stackoverflow) | ||
Zulfira et al. | Modified Bit Parity Technique for Error Detection of 8 Bit Data | |
CA2021744C (en) | Fast maximum likelihood decoder | |
US4078225A (en) | Arrangement and a method for error detection in digital transmission systems | |
RU2297032C2 (ru) | Самокорректирующееся запоминающее устройство | |
US11496241B2 (en) | Method and apparatus for data transmission mitigating interwire crosstalk | |
JPS6386620A (ja) | デコ−ダの動作誤り検出装置 | |
RU44201U1 (ru) | Отказоустойчивое запоминающее устройство | |
RU2297030C2 (ru) | Самокорректирующееся устройство хранения информации | |
SU675613A1 (ru) | Устройство порогового декодировани двоичной информации | |
RU2297035C2 (ru) | Отказоустойчивое запоминающее устройство | |
US3611289A (en) | Error detection apparatus | |
JPS60246065A (ja) | 同期信号検出回路 | |
JPH0244921A (ja) | 誤り検出回路 |