JPS5899855U - enamel board - Google Patents

enamel board

Info

Publication number
JPS5899855U
JPS5899855U JP19356181U JP19356181U JPS5899855U JP S5899855 U JPS5899855 U JP S5899855U JP 19356181 U JP19356181 U JP 19356181U JP 19356181 U JP19356181 U JP 19356181U JP S5899855 U JPS5899855 U JP S5899855U
Authority
JP
Japan
Prior art keywords
enamel
enamel board
metal core
board
view
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19356181U
Other languages
Japanese (ja)
Inventor
直道 鈴木
亀岡 孝仁
Original Assignee
株式会社フジクラ
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社フジクラ filed Critical 株式会社フジクラ
Priority to JP19356181U priority Critical patent/JPS5899855U/en
Publication of JPS5899855U publication Critical patent/JPS5899855U/en
Pending legal-status Critical Current

Links

Landscapes

  • Parts Printed On Printed Circuit Boards (AREA)
  • Non-Adjustable Resistors (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のほうろう基板を示す断面図、第2図は従
来のほうろう基板上に電気回路網を瘤成した厚膜回路基
板の平面図、第3図はこの考案のほうろう基板上に電気
回路網を形成した厚膜回路基板の平面図、第4図は第3
図の厚膜回路基板の断面図、第5図はこの考案のほうろ
う基板に電気回路網を形成した厚膜回路基板の他の例を
示す平面図、第6図は第5図の厚膜回路基板を折り曲げ
た折り曲げ回路基板の断面図である。 11・・・・・・はうろう基板、12・・・・・・金属
コア、13・・・・・・部分はうろう層。
Figure 1 is a cross-sectional view of a conventional enamel substrate, Figure 2 is a plan view of a thick film circuit board with an electric circuit network formed on the conventional enamel substrate, and Figure 3 is a cross-sectional view of a conventional enamel substrate with electrical circuits formed on it. A plan view of the thick film circuit board on which the circuit network is formed, Figure 4 is the same as Figure 3.
5 is a plan view showing another example of the thick film circuit board in which an electric circuit network is formed on the enamel substrate of this invention, and FIG. 6 is the thick film circuit shown in FIG. 5. FIG. 3 is a cross-sectional view of a folded circuit board obtained by folding the board. 11... is a floating substrate, 12... is a metal core, and 13... is a floating layer.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 金属コアとこの金属コアを被覆するほうろう層とからな
るほうろう基板において、導体および抵抗体等の電気回
路網を設ける部分にのみほうろう層を設けたことを特徴
とするほうろう基板。
An enamel substrate comprising a metal core and an enamel layer covering the metal core, characterized in that the enamel layer is provided only in areas where electrical circuit networks such as conductors and resistors are to be provided.
JP19356181U 1981-12-26 1981-12-26 enamel board Pending JPS5899855U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19356181U JPS5899855U (en) 1981-12-26 1981-12-26 enamel board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19356181U JPS5899855U (en) 1981-12-26 1981-12-26 enamel board

Publications (1)

Publication Number Publication Date
JPS5899855U true JPS5899855U (en) 1983-07-07

Family

ID=30106912

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19356181U Pending JPS5899855U (en) 1981-12-26 1981-12-26 enamel board

Country Status (1)

Country Link
JP (1) JPS5899855U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH027596A (en) * 1988-06-27 1990-01-11 Fujitsu Ltd Wiring board with interlayered film element
WO2010064364A1 (en) * 2008-12-01 2010-06-10 日本発條株式会社 Printed wiring board, method for manufacturing same, and printed wiring board semi-finished-product-linked object

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5122472A (en) * 1974-08-17 1976-02-23 Ricoh Watch DENSHIUDEDOKEI
JPS536876A (en) * 1976-07-08 1978-01-21 Matsushita Electric Ind Co Ltd Hybrid integrated circuit and method of producing same

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5122472A (en) * 1974-08-17 1976-02-23 Ricoh Watch DENSHIUDEDOKEI
JPS536876A (en) * 1976-07-08 1978-01-21 Matsushita Electric Ind Co Ltd Hybrid integrated circuit and method of producing same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH027596A (en) * 1988-06-27 1990-01-11 Fujitsu Ltd Wiring board with interlayered film element
WO2010064364A1 (en) * 2008-12-01 2010-06-10 日本発條株式会社 Printed wiring board, method for manufacturing same, and printed wiring board semi-finished-product-linked object
JP2010129984A (en) * 2008-12-01 2010-06-10 Nhk Spring Co Ltd Printed circuit board and method of manufacturing the same, and printed circuit board semi-fabricated item chain

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