JPS5895836A - 半導体集積回路の製造方法 - Google Patents
半導体集積回路の製造方法Info
- Publication number
- JPS5895836A JPS5895836A JP19285781A JP19285781A JPS5895836A JP S5895836 A JPS5895836 A JP S5895836A JP 19285781 A JP19285781 A JP 19285781A JP 19285781 A JP19285781 A JP 19285781A JP S5895836 A JPS5895836 A JP S5895836A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- region
- supporting region
- single crystal
- polycrystalline
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76297—Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
- Recrystallisation Techniques (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19285781A JPS5895836A (ja) | 1981-12-02 | 1981-12-02 | 半導体集積回路の製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19285781A JPS5895836A (ja) | 1981-12-02 | 1981-12-02 | 半導体集積回路の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5895836A true JPS5895836A (ja) | 1983-06-07 |
| JPS6153857B2 JPS6153857B2 (enrdf_load_stackoverflow) | 1986-11-19 |
Family
ID=16298121
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19285781A Granted JPS5895836A (ja) | 1981-12-02 | 1981-12-02 | 半導体集積回路の製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5895836A (enrdf_load_stackoverflow) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5081061A (en) * | 1990-02-23 | 1992-01-14 | Harris Corporation | Manufacturing ultra-thin dielectrically isolated wafers |
-
1981
- 1981-12-02 JP JP19285781A patent/JPS5895836A/ja active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5081061A (en) * | 1990-02-23 | 1992-01-14 | Harris Corporation | Manufacturing ultra-thin dielectrically isolated wafers |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6153857B2 (enrdf_load_stackoverflow) | 1986-11-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3033412B2 (ja) | 半導体装置の製造方法 | |
| JPH01315159A (ja) | 誘電体分離半導体基板とその製造方法 | |
| JPH0636413B2 (ja) | 半導体素子形成用基板の製造方法 | |
| JPH0719839B2 (ja) | 半導体基板の製造方法 | |
| US3624467A (en) | Monolithic integrated-circuit structure and method of fabrication | |
| JPH0799239A (ja) | 半導体装置及び半導体装置の製造方法 | |
| JPS6351378B2 (enrdf_load_stackoverflow) | ||
| US3902936A (en) | Germanium bonded silicon substrate and method of manufacture | |
| JPH046875A (ja) | シリコンウェーハ | |
| JPS5895836A (ja) | 半導体集積回路の製造方法 | |
| JP2763107B2 (ja) | 誘電体分離半導体基板およびその製造方法 | |
| JPS6152572B2 (enrdf_load_stackoverflow) | ||
| JPH0687480B2 (ja) | 半導体装置の製造方法 | |
| JP2007095951A (ja) | 半導体基板およびその製造方法 | |
| JPH0758675B2 (ja) | 半導体装置における基板の製造方法 | |
| JP3465765B2 (ja) | Ｉｇｂｔ用半導体基板の作製方法 | |
| JPS59104139A (ja) | 半導体集積回路装置 | |
| JPS62124753A (ja) | 絶縁層分離基板の製法 | |
| JPS61144037A (ja) | 半導体装置およびその製造方法 | |
| JPS58155739A (ja) | 半導体装置 | |
| JPS6248040A (ja) | 絶縁分離基板及びその製造方法 | |
| JPH0430449A (ja) | 半導体集積装置の製造方法 | |
| JPS5840337B2 (ja) | 半導体集積回路の製造方法 | |
| JP2914130B2 (ja) | 半導体装置 | |
| JPS5951543A (ja) | 集積回路用基板の製造方法 |