JPS5894184A - Magnetic bubble memory board - Google Patents
Magnetic bubble memory boardInfo
- Publication number
- JPS5894184A JPS5894184A JP56190358A JP19035881A JPS5894184A JP S5894184 A JPS5894184 A JP S5894184A JP 56190358 A JP56190358 A JP 56190358A JP 19035881 A JP19035881 A JP 19035881A JP S5894184 A JPS5894184 A JP S5894184A
- Authority
- JP
- Japan
- Prior art keywords
- board
- bubble memory
- coil
- magnetic
- memory chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/02—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements
- G11C19/08—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements using thin films in plane structure
- G11C19/085—Generating magnetic fields therefor, e.g. uniform magnetic field for magnetic domain stabilisation
Abstract
Description
【発明の詳細な説明】
a) 発明の技術分野
本発明は基板内に駆動コイルを内蔵した磁気バブルメモ
リ基板に関す6゜
(2)従来技術と問題点
、従来の磁気バブル(以下バブル)メモリ基板はアルミ
ナ磁器のような無機絶縁材料或はガラスエポキシ、ポリ
イミドのような有機絶縁材料を用い、これに単層或は多
層配線を施したものが用いられている。[Detailed Description of the Invention] a) Technical Field of the Invention The present invention relates to a magnetic bubble memory board with a driving coil built into the board.(2) Prior art and problems, conventional magnetic bubble (hereinafter referred to as bubble) memory The substrate is made of an inorganic insulating material such as alumina porcelain or an organic insulating material such as glass epoxy or polyimide, and is provided with single-layer or multilayer wiring.
第1図は・従来基板の正面llIまた第2図は印刷配線
パメーンを省略した基板の斜視図である。FIG. 1 is a front view of a conventional board, and FIG. 2 is a perspective view of the board with printed wiring components omitted.
バブルメモリチップ1は深い切り込み部2をもつ基板3
の中央凹部1′に接着剤を用いて固着されており、バブ
ルメモリチップ1の配線端子と基板3上の印刷配線4と
は基板上のポンディングパッド器においてワイヤボンデ
ンダされている・こ−で印刷配線4は基板端間に設けら
れている熾子部6において図示してないパッケージのリ
ード端子と爆着される構造となっている。Bubble memory chip 1 has a substrate 3 with a deep notch 2
The wiring terminals of the bubble memory chip 1 and the printed wiring 4 on the board 3 are wire bonded using a bonding pad device on the board. The printed wiring 4 has a structure in which it is explosively bonded to a lead terminal of a package (not shown) at a gauze portion 6 provided between the ends of the substrate.
次に基板3に設けられている深い切り込み部2はバブル
メモリチップに駆動磁界を与えるためのX方向コイルを
挿着するために設けられているものである。Next, a deep notch 2 provided in the substrate 3 is provided for inserting an X-direction coil for applying a driving magnetic field to the bubble memory chip.
第3図(8)は基板3にバブルメモリチップ搭載後、Y
方向コイル7を挿着した状態和才た同図(ハ)はこれに
X方向コイル8を挿着した状mbであり、これにより駆
動コイルの装着が完了する。Figure 3 (8) shows Y after mounting the bubble memory chip on the board 3.
The state in which the direction coil 7 is inserted is shown in FIG.
さてこのようにして形成されている駆動コイルは基板3
の中央凹部に搭載されているバブルメモ讐テップ1に駆
動磁界を与えるためのものであり、そのため更にバブル
メモリチップlに接近して駆動コイルを壱回できれば駆
動磁界効率が改善されまた少い駆動電流で済む筈であり
、本発明はこのような発想に基づいてなされたものであ
る。゛(2)発明の目的
本発明は駆動磁界効率を従来より高めることを目的とし
てなされたもので進歩した多層配線磁器基板技術を用い
て基板内に駆動コイルを形成するものであり、これによ
りバブルメモリチップと駆動コイルとの間隔が細り、高
効率化を実現したものである。Now, the drive coil formed in this way is
This is to apply a driving magnetic field to the bubble memory chip 1 mounted in the central recess of the bubble memory chip 1. Therefore, if the driving coil can be rotated even closer to the bubble memory chip 1, the efficiency of the driving magnetic field will be improved and the driving current will be reduced. This should suffice, and the present invention was made based on this idea.゛(2) Purpose of the Invention The present invention was made with the aim of increasing the driving magnetic field efficiency compared to the past, and uses advanced multilayer wiring ceramic board technology to form a driving coil within the board. The space between the memory chip and the drive coil is narrower, achieving higher efficiency.
以下図面により本発明を説明する。The present invention will be explained below with reference to the drawings.
(4)発明の構成
本発明は進歩した多層配線技術を利用して基板内にX方
向コイルとY方向コイルからなる駆動lコイルを形成す
るもので、グリーンシート形成技斬、スクリーン印刷技
術、位置合はせ技術などが必簀となる。(4) Structure of the Invention The present invention utilizes advanced multilayer wiring technology to form a drive l coil consisting of an X-direction coil and a Y-direction coil within a board, and utilizes green sheet forming technology, screen printing technology, and positioning. Combining technology is essential.
第4図は本発明にか\る磁気バブル基板の断面図であっ
て、下部基板9と点線で示した上部基板lOとを比較す
ると、駆動コイルパターン部は上下対称であるが、下部
基板には第illに示すような磁気メモリチップの導体
パターンと駆動コイル用導体パターンが端子部11fi
で印刷配線されている・
なお端子部11にはリードフレームのリード端子が溶着
されて外部回路との接続がて赤るようになりている。FIG. 4 is a cross-sectional view of the magnetic bubble substrate according to the present invention. Comparing the lower substrate 9 and the upper substrate 10 indicated by dotted lines, the drive coil pattern portion is vertically symmetrical; The conductor pattern of the magnetic memory chip and the conductor pattern for the drive coil as shown in No. 11 are connected to the terminal portion 11fi.
The lead terminals of the lead frame are welded to the terminal portion 11 so that they are connected to the external circuit in red.
さて下部基板9は次のようkして形成される。Now, the lower substrate 9 is formed as follows.
白金(Pi)%パラジウム(Pd)のような卑属導体ペ
ーストを用い印刷配線法によりコイルの配線パターン1
2を作ると共にコイル用スルーホール13を形成し数百
度で仮焼きして落馬を作る◎このようにして各層剤の基
板が作られ、次に積層して下層基板9が作られるがスル
ーホール部の相互接続は不完全であるのでスルーホール
部にはこれより僅かに直径の大きな金(人u)、バッジ
ラム(Fd)或はこれらの合金よりなる導体ボール14
を充填して行うのがよく、加圧した状態で約10(30
t)C″1?1?鋳成とにより下部基板9ができ上る。Wiring pattern 1 of the coil was created using a printed wiring method using a base metal conductor paste such as platinum (Pi)% palladium (Pd).
2 is made, and a through-hole 13 for the coil is formed, and it is calcined at a temperature of several hundred degrees to make an ochima.◎In this way, the substrate for each layer is made, and then it is laminated to make the lower substrate 9, but the through-hole part Since the interconnection is incomplete, a conductor ball 14 made of gold (Fd), badge ram (Fd), or an alloy thereof with a slightly larger diameter is inserted into the through-hole portion.
It is best to fill it with about 10 (30
t) The lower substrate 9 is completed by C″1?1? casting.
次に下層基板9の中央凹部に共晶ボンディング11にヨ
)バブルメモリチップ1を搭載した後、下層基板上に印
刷配線された導体パターンとワイヤボンディングにより
回路接続し、次に上部基板10を位置合わせして接合さ
せるが、この場合もスルーホール部は導体ボール14を
介して数百直で熱圧着することにより相互の導通を行わ
しめる。このようにすることにより駆動コイルを基板内
に備えた磁気バブルメモリパッケージを形成することが
できる。Next, after mounting the bubble memory chip 1 on the eutectic bonding 11 in the central recess of the lower substrate 9, the circuit is connected to the conductor pattern printed on the lower substrate by wire bonding, and then the upper substrate 10 is placed. They are then joined together, and in this case as well, the through-hole portions are thermocompressed several hundred times through the conductor balls 14 to establish mutual conduction. By doing so, it is possible to form a magnetic bubble memory package in which the drive coil is provided within the substrate.
(5) その他の実施例
次に平面コイル(フラットフェイストコイル)を用いて
駆動コイルを形成した場合について説明する。(5) Other Embodiments Next, a case will be described in which a drive coil is formed using a flat-faced coil.
ル15とY方向フィル16とを直交させたもので、コイ
ルが平板状に作られているために本発明にか・−る多層
印刷配線基板により製作する場合に工数的に容易である
。The coil 15 and the Y-direction fill 16 are made perpendicular to each other, and since the coil is made in a flat plate shape, it is easy to manufacture the multilayer printed wiring board according to the present invention in terms of man-hours.
また平面コイルを用いる場合は交叉するコイルの中央部
だけでなくコイルの4隅17の位置にバブルメそりチッ
プを搭載することができるし、また基板に導体層を設け
れば、す7レクシ璽ン効来が得られる。In addition, when using planar coils, bubble mesh chips can be mounted not only at the center of the intersecting coils but also at the four corners 17 of the coils, and if a conductor layer is provided on the board, You can get the effect.
第6図はこの実施方法の説明図で下部基板18は中央に
導体層がありその上に印刷配線回路が形成された絶縁層
よりなり、この上にバブルメモリチップ1を搭載した後
この上に平面コイルからなる駆動コイル19を備えた上
部基板を接合すればよい。FIG. 6 is an explanatory diagram of this implementation method. The lower substrate 18 is made of an insulating layer with a conductor layer in the center and a printed wiring circuit formed thereon. After mounting the bubble memory chip 1 on this, An upper substrate provided with a drive coil 19 made of a planar coil may be bonded.
この場合は下部基板18の導体層を反射面として駆動;
イル19の鏡偉20枦できる。In this case, the conductor layer of the lower substrate 18 is used as a reflective surface for driving;
I can do 19 and 20 minutes of Kagami.
なおこのような平面フィルの使用は多層配線技術の製作
が容易なことから本発明の実施に適すると言える。Note that the use of such a planar fill is suitable for implementing the present invention because it facilitates the production of multilayer wiring technology.
(6)発明の効果
本穐明は磁界効率を高めることを目的としてなされたも
ので、ソレノイドコイルを形成する実施例の場合、バブ
ルメモリチップと駆動コイルとの距離が短縮できたため
駆動磁界を形成するに必要な電流値を従来の500mA
から220mAに下げることができ、これにより駆動コ
イルの消費電力を従来の20%である0、14Wにまで
減少させることができた。(6) Effects of the invention This invention was made with the aim of increasing magnetic field efficiency, and in the case of the embodiment in which a solenoid coil is formed, the distance between the bubble memory chip and the drive coil can be shortened, so the drive magnetic field is formed. The current value required to
This enabled the power consumption of the drive coil to be reduced to 0.14 W, which is 20% of the conventional power consumption.
更に本発明の利益は基板の材料としてアルミナを用いて
いるため熱伝導がよく、そのためコイル電流値の減少と
相まって高効率化を達成することができた。Furthermore, the advantage of the present invention is that alumina is used as the substrate material, so it has good heat conduction, and this combined with the reduction in coil current value makes it possible to achieve high efficiency.
また駆動コイルが基板内に形成されているためにパッケ
ージの小型化が達成された。Furthermore, since the drive coil is formed within the substrate, the package can be made smaller.
第11Wは従来のバブルメモリ基板の正面図、第2図は
斜視図、第31囚および(ハ)は基板にY方向およびX
方向コイルを挿着した状態を示す斜視図、第4図は本発
明にか\る磁気基板の断面図、第5図は平面コイルを用
いた駆動コイルの斜視図また第6図は平面コイルを用い
たバブルメモリの構成図である。
図において1はバブルメモリチップ、3は基板、7.1
6はY方向コイル、8.15はX方向コイル、9は下部
基板、10は上部基板、12はコイルlの配線パターン
、13はスルーホール、14は導体ボール、19は駆動
コイル、20はこの鏡像O
′!55図
第6121INo. 11W is a front view of a conventional bubble memory board, FIG. 2 is a perspective view, and No. 31 (C) is a front view of a conventional bubble memory board.
FIG. 4 is a sectional view of a magnetic board according to the present invention, FIG. 5 is a perspective view of a drive coil using a planar coil, and FIG. 6 is a perspective view showing a state in which a directional coil is inserted. It is a block diagram of the bubble memory used. In the figure, 1 is a bubble memory chip, 3 is a substrate, 7.1
6 is a Y-direction coil, 8.15 is an X-direction coil, 9 is a lower board, 10 is an upper board, 12 is a wiring pattern of coil l, 13 is a through hole, 14 is a conductor ball, 19 is a drive coil, 20 is this Mirror image O'! 55 Figure 6121I
Claims (1)
プが搭載され、これに駆動コイルが装置されてなる磁気
パブルメ篭りパッケージにおいて、誼鼻気バブルメモリ
チップを中心として駆動コイルが多層配線を施された基
板内に形成されていることを特徴とする磁気バブルメモ
リ基板。A magnetic bubble memory chip is mounted on a substrate made of heat-resistant insulating material, and a drive coil is attached to the magnetic bubble memory chip.In this magnetic bubble memory package, the drive coil is provided with multilayer wiring around the nose bubble memory chip. A magnetic bubble memory board characterized by being formed within a board.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56190358A JPS5894184A (en) | 1981-11-27 | 1981-11-27 | Magnetic bubble memory board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56190358A JPS5894184A (en) | 1981-11-27 | 1981-11-27 | Magnetic bubble memory board |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5894184A true JPS5894184A (en) | 1983-06-04 |
JPS6357879B2 JPS6357879B2 (en) | 1988-11-14 |
Family
ID=16256854
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56190358A Granted JPS5894184A (en) | 1981-11-27 | 1981-11-27 | Magnetic bubble memory board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5894184A (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0468269U (en) * | 1990-10-26 | 1992-06-17 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51140439A (en) * | 1975-05-29 | 1976-12-03 | Hitachi Ltd | Magnetic bubble device |
JPS5255334A (en) * | 1975-10-30 | 1977-05-06 | Nec Corp | Magnetic bubble memory brain |
JPS52122054A (en) * | 1976-04-06 | 1977-10-13 | Fujitsu Ltd | Magnetic babble driving coil |
-
1981
- 1981-11-27 JP JP56190358A patent/JPS5894184A/en active Granted
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51140439A (en) * | 1975-05-29 | 1976-12-03 | Hitachi Ltd | Magnetic bubble device |
JPS5255334A (en) * | 1975-10-30 | 1977-05-06 | Nec Corp | Magnetic bubble memory brain |
JPS52122054A (en) * | 1976-04-06 | 1977-10-13 | Fujitsu Ltd | Magnetic babble driving coil |
Also Published As
Publication number | Publication date |
---|---|
JPS6357879B2 (en) | 1988-11-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6600221B2 (en) | Semiconductor device with stacked semiconductor chips | |
JP3053585B2 (en) | Electronic package | |
JP2002514014A (en) | Chip laminate and manufacturing method thereof | |
JPH01251778A (en) | Ic card | |
JP2001196529A (en) | Semiconductor device and wiring method therefor | |
JPH11163207A (en) | Manufacture of semiconductor chip mounting substrate and semiconductor device | |
JP2606110B2 (en) | Multilayer substrate and method of manufacturing the same | |
JP2000299542A (en) | Laminated circuit substrate and its manufacture | |
JP3246010B2 (en) | Electrode structure of flip-chip mounting substrate | |
JPS5894184A (en) | Magnetic bubble memory board | |
JPH0258793B2 (en) | ||
JPH09162230A (en) | Electronic circuit device and its manufacturing method | |
JP2001177049A (en) | Semiconductor device and ic card | |
JP4614302B2 (en) | Hybrid IC card and method for manufacturing the same | |
JP3269506B2 (en) | Semiconductor device | |
JPS61259533A (en) | Semiconductor device | |
JPS5853854A (en) | High integration density lsi package | |
JPH01226192A (en) | Hybrid integrated circuit device | |
JPS6025910Y2 (en) | semiconductor equipment | |
JPH06350025A (en) | Semiconductor device | |
JPS6153854B2 (en) | ||
JPH06338539A (en) | Connection method of semiconductor element | |
JPH04267361A (en) | Leadless chip carrier | |
JPH0297042A (en) | Substrate for electronic component mounting use | |
JP3032124U (en) | High density bonding pad array integrated circuit package with middle layer |