JP3032124U - High density bonding pad array integrated circuit package with middle layer - Google Patents

Abstract

(57) An object of the present invention is to provide an integrated circuit package capable of achieving higher density without lowering mechanical strength and heat conduction characteristics. An integrated circuit package has a three-layer stack, and the integrated circuit is mounted on a first side of a first mounting layer. The first mounting layer includes a first-stage electrical conduction path from the first surface to the opposing second surface. The second surface of the first layer mounting layer overlaps the intermediate layer, and the intermediate layer includes a second-stage electrical conduction path passing through the intermediate layer. At least one second stage electrical conduction path is included therein. The second-stage electric conduction path only energizes in the direction perpendicular to the second surface of the first mounting layer. The middle layer overlies the first side of the second mounting layer and some solder balls are mounted on opposite second sides of the second mounting layer. The second mounting layer includes a third-stage electric conduction path. At least one third-stage electrical conduction path is included in this, and it is electrically connected to the solder ball and the corresponding second-stage electrical conduction path via the mounting layer of the second layer. Has reached.

Description

[Detailed description of the device]

[0001]

[Technical field to which the device belongs]

 The present invention relates to an integrated circuit package, and more particularly to a solder ball packaged package.

[0002]

[Prior art]

 As the complexity of integrated circuits increases, so does the number of electronic input and output contacts. Traditionally, most integrated circuits have been in the form of a package, forming the input and output lead terminals, but this integrated circuit either solders the package directly onto the printed wiring circuit, or Insert into the corresponding integrated circuit socket and solder. In order to improve the electrical and thermal conductivity characteristics, the number of lead terminals and density of the package are increased, the volume of the package itself is reduced, and the solder ball grid array package is developed. See US Pat. Nos. 5,045,921, 5,216,278 and 5,241,133 for related patents.

The example shown in FIG. 1 is a solder ball grid array package 10 disclosed in US Pat. No. 5,216,278. The integrated circuit 18 is fixed to the first layer 12 of the mounting substrate with an adhesive 20. Bonding wiring 22 is connected to the bonding pads of integrated circuit 18 and leads to a particular conductor 48 on first layer 12 of the mounting substrate. Conductors 48 provide a conductive path parallel to the upper surface of mounting substrate first layer 12. The first layer 12 of the mounting substrate has an electrical conduction hole 50 formed therein. The conduction hole 50 extends from the conductor 48 to the lower surface of the mounting substrate first layer 12 and provides a conduction path perpendicular to the upper surface of the mounting substrate first layer 12.

The lower surface of the mounting substrate first layer 12 overlies the upper surface of the mounting substrate second layer. The conductor 46 is connected to the through hole 50. Leads 46 extend from the through holes 50 to provide a conductive path parallel to the upper surface of the mounting substrate second layer 44. The second layer 44 of the mounting substrate has a conduction hole 52 formed therein. The conduction hole 52 extends from the conductive wire 46 to the lower surface of the second layer of the mounting substrate, and provides a conduction path perpendicular to the upper surface. There are many conductive bonding pads 33 on the bottom surface of the second mounting board layer 44 that provide a conductive path from the through holes 52 to the solder balls 47 parallel to the bottom surface of the second mounting board layer 44. are doing. Solder balls 47 are implanted on the bonding pads 33. At the time of use, the package 10 is installed at a specific position on the printed wiring circuit, and the solder balls 47 and the corresponding current-carrying contacts on the printed wiring circuit are made to correspond to each other and heated to make the package 10 the solder ball. Solder to the printed wiring circuit with 47 and connect electrically. Then, from the bonding pad of the integrated circuit 18, the wiring 22 for bonding, the conducting wire 48, the conducting hole 50, the conducting wire 46, the conducting hole 52, the conducting bonding pad 33 and the solder ball 47 (the solder ball 47 after soldering). Form a conductive path to the opposite conductive contact on the printed wiring circuit.

[0005]

[Problems to be solved by the device]

 In practice, the material forming the mounting substrates 12,44 has sufficient mechanical strength that the integrated circuit 18 and the entire substrate 10 must be soldered onto the printed wiring circuit with solder balls 47. In addition, the mounting boards 12 and 44 must have a mechanical and thermal expansion characteristic similar to that of the printed wiring circuit to prevent the occurrence of stress fracture. For the above reasons, conventionally, a material similar to a printed wiring circuit, for example, a glass fiber reinforced substrate "BT" or "FR-4" has been selected for the mounting substrates 12 and 44. Due to the manufacturing process limitation of the printed wiring circuit, when using the above materials for the mounting boards 12 and 44 when the width of the conductor wire is less than 0.004 inch and the diameter of the through hole is less than 0.010 inch, the bottle Faced the neck. Therefore, even if the number and density of the input / output lead terminals of the package are increased or the volume thereof is reduced, the layout density of the conductive wires and the conductive holes on the mounting substrates 12 and 44 cannot be further increased. The manufacture of small volume packages faced a bottleneck.

US Pat. No. 5,045,921 discloses a solder ball grid array package using a flexible mounting substrate having a thickness of less than 0.5 mm. With this structure, the integrated circuit must be mounted face down, the back must be reinforced by a support structure, and the solder balls must be surrounded outside the mounting area of the integrated circuit, thus reducing the package volume. It was larger than the circuit and there was no way to reduce it further.

The present invention solves the above drawbacks.

[0008]

[Means for Solving the Problems]

 One aspect of the present invention is that the integrated circuit package has a three-layer laminated structure. The integrated circuit is attached to the first surface of the first mounting layer, and the first-stage electrical conduction path extends from the first surface to the second surface. The second surface of the first mounting layer overlaps with the middle layer, and the second-stage electrical conduction path on the middle layer includes one opposing second-stage conduction path, which passes through the middle layer. Then, it is electrically connected to the first-stage electric conduction path of the first mounting layer. The electric conduction path on the intermediate layer extends only in the direction perpendicular to the second surface of the first mounting layer and conducts electricity. The middle layer overlies the first surface of the second mounting layer. Solder balls are attached to the second side of the second mounting layer. The third-stage electrical conduction path on the second mounting layer includes at least one third-stage electrical conduction path, which is connected to each electrically conducting solder ball to connect the second mounting layer. It leads to the corresponding second-stage electrical conduction path via.

The first mounting layer can be formed of a projection exposed dielectric material or a flexible printed wiring circuit. The diameter of the through hole and the width of the conducting wire are smaller than the numbers when using the conventional glass fiber reinforced substrate, for example, BT and FR-4. The diameter of the through holes can be 0.002 to 0.006 inches and the width of the conductors can be 0.002 inches. The mounting substrate of the second layer can be a reinforced organic substrate or a ceramic substrate.

At least the second mounting layer must support the package with sufficient mechanical strength and thermal conductivity and solder the package onto the printed wiring circuit. The intermediate layer can be formed of a projection exposure dielectric material or an anisotropic conductive material.

[0011]

[Embodiment of device]

 FIG. 2 is a sectional view of the integrated circuit package 100 in which the solder balls according to the first embodiment of the present invention are arranged in a grid pattern. As shown, the package includes a first layer mounting substrate 102, a middle layer 104 and a second layer mounting substrate 106, with one layer overlying another layer. The integrated circuit 120 is attached to the upper surface of the mounting substrate 102 of the first layer by, for example, die bonding 150. The upper surfaces of the integrated circuit 120 and the first-layer mounting board are sealed with a resin mold or capsule 140. There are many bonding pads on the integrated circuit. Gold or aluminum bonding wire 130 electrically connects to each bond pad on the integrated circuit and connects to a particular conductor 160. A conduction hole 170 penetrating the first mounting layer 102 is electrically connected to the conductive wire 160, and is also electrically connected to a conductive wire 165 on the lower surface of the first mounting layer 102.

The middle layer 104 includes one or more conductive contacts 180. Each conducting contact 180 is electrically conducting in the vertical direction. That is, it is perpendicular to the lower surface of the first mounting layer 102. Conductive contact 180 is in electrical contact with conductor 165 and at the same time provides a vertical electrical conduction path through intermediate layer 104. The conducting wire 195 on the upper surface of the mounting substrate 106 of the second layer is electrically connected to the conducting contact 180. Further, the one or more conducting wires 195 are electrically connected to the conducting holes 190 penetrating the second mounting layer 106. Each through hole 190 is electrically connected to the bonding pad 105 on the lower surface of the mounting substrate 106 of the second layer. Solder balls 110 are implanted on each bond pad 105.

Accordingly, an electrical conduction path is provided from the bonding pad of the integrated circuit to the printed wiring circuit, which includes the wiring 130 for bonding, the conductive wire 16 0, the conductive hole 170, the conductive wire 165, and the contact. 180, conducting wire 195, through hole 190, bonding pad 105 and solder ball 110 are included. The through holes 170 1, the through holes 190, the contacts 180 and the solder balls 110 provide a conductive path perpendicular to the upper and lower surfaces of the mounting substrates 102 and 106 and the intermediate layer 104. Conductors 160, 165, 195 and 105 provide a conductive path parallel to the upper and lower surfaces of mounting substrates 102, 106 and intermediate layer 104.

When selecting various materials for the package 100 of the integrated circuit, the reliability can be improved by selecting materials having similar mechanical properties and thermal expansion coefficients. The first layer mounting substrate 102 can be a projection exposed dielectric material or a flexible printed wiring circuit. The second-layer mounting substrate 106 can be a general reinforced organic substrate such as FR-4, BT or a ceramic substrate. The intermediate layer 104 can be formed of a projection exposure dielectric material or an anisotropic conductive material.

The leads 160, 165 and 195 can be formed on the first and second layer mounting substrates 102 and 106 by existing projection exposure techniques. The through holes 170 and 190 can be installed at arbitrary positions on the mounting substrates 102 and 106 of the first and second layers. Since the conductors 160 and 165 and the wiring can be appropriately arranged according to the application needs of the integrated circuit 120 and the package, the quality of electric characteristics can be improved. For example, reducing crosstalk and reflected noise can increase operating frequency and reliability.

The number and arrangement of bonding pads 105 and solder balls 110 can be arranged as a hollow arrangement, a solid square arrangement or any other form, depending on the actual needs and choice of application. . FIG. 3 is a cross-sectional view of the second embodiment 200 of the present invention. Of these, the first-layer mounting substrate 102 has a multilayer structure. When the number of input / output contacts of the integrated circuit 120 is increased, the wiring density of the mounting substrate is increased, or the noise problem is solved by the required power source and ground plane, a multilayer substrate can be used. The electric conduction path on the mounting board 102 of the first layer is the conductive wire 160 on the upper surface of the mounting board 102, the blind hole 270 partially penetrating the mounting board 102, the internal conductive wire 260, the blind hole 370, and the mounting board. It is formed by a conductor 165 on the lower surface of 102. Also, the first-layer mounting substrate 102 may include one or more internal conductors. The internal conductors can also be electrically connected by filling holes (not shown in the figure).

FIG. 4 is a cross-sectional view of the third mode 300 of the present invention. The package 300 includes heat conducting holes 370 and 390 and heat conducting solder balls 310. The amount of heat generated by the integrated circuit 120 is formed by the heat conduction hole 370 of the first layer mounting substrate 102, the heat conduction contact 380 of the intermediate layer 104, the heat conduction hole 390 of the second layer mounting substrate 106, and the heat conduction solder ball 310. It is dissipated to the user's printed wiring circuit (not shown) through the heat conduction path. The heat-conducting holes 370, 390 can be filled with a suitable heat-conducting material, for example, a metal powder or a dielectric material. Further, since the heat conduction solder ball 310 can be made larger than the solder ball 110 for electrical signal connection, the heat conduction effect can be enhanced. The thermal conductive contact 380 can be formed in a similar manner to the electrical conductive contact 180.

FIG. 5 is a cross-sectional view of the fourth embodiment 400 of the present invention. A thermal diffusion board 355 is mounted on the resin mold 140 and the integrated circuit 120. The heat conductive adhesive layer 375 and the heat spreading board 355 provide a heat transfer path from the integrated circuit 120 to the outside of the package 400. FIG. 6 is a sectional view of the fifth embodiment 500 of the present invention. The heat conduction hole 370 provides a heat conduction path from the integrated circuit 120 to the heat conduction surface 365 through the first layer mounting substrate 102. The heat diffusion board 455 adheres to the heat conducting surface 365 through the hollow openings of the intermediate layer 104 and the second layer mounting substrate 106, and transfers heat to the outside of the package 500 or the user's printed wiring circuit (not shown). Dissipate.

Above, typical embodiments of the present invention have been described in several different forms. However, the present invention is not restricted by the restrictions described above. Various alterations and modifications made based on the spirit of the present invention and the scope of the following patent application are still within the scope of the present invention. For example, in addition to the wiring 130 for bonding and the die bonding 150, the integrated circuit 120 can be mounted on the packages 100 to 500 by the existing tab method or direct die bonding method, for example, Flip-Chip technology. It is also possible to mount one or more integrated circuits 120 on the first-layer mounting board 102 to form a multi-chip module, and the various heat conduction structures shown in FIGS. It is also possible to use it in combination.

[0020]

[Effect of device]

 As the restrictions on the diameter of the through hole and the width of the conductive wire are relaxed, it is possible to achieve a higher density, a smaller volume or a package closer to the chip size with a larger number of input / output lead terminals. The mechanical strength and heat transfer properties of the package are not degraded.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a traditional solder ball grid array package according to the prior art.

FIG. 2 is a sectional view of the first embodiment of the present invention.

FIG. 3 is a sectional view of a second embodiment of the present invention.

FIG. 4 is a sectional view of a third embodiment of the present invention.

FIG. 5 is a sectional view of a fourth mode of the present invention.

FIG. 6 is a sectional view of a fifth mode of the present invention.

[Explanation of symbols]

 100 Integrated Circuit Package 102 First Layer Mounting Substrate 104 Middle Layer 105 Bonding Pad 106 Second Layer Mounting Substrate 110 Solder Ball 120 Integrated Circuit 130 Bonding Wiring 140 Capsule 150 Die Bonding 160, 165, 195 Conductor 170 , 190 Conductive hole 180 Conductive contact 200 Second form 260 Internal conducting wire 270, 370 Blind hole 300 Third form 310 Thermal conductive solder ball 355 Thermal diffusion board 370, 390 Thermal conductive hole 375 Thermal conductive adhesive layer 380 Thermal conductive contact 400th Four forms 365 Heat conduction surface 455 Heat diffusion board 500 Fifth form

Claims (6)

[Scope of utility model registration request] 1. A first mounting layer, the integrated circuit being mounted on a first side thereof, the first mounting layer having a first-stage electrical conduction path from the first side to an opposing second side. And the second side of the first mounting layer overlies the intermediate layer, which includes a second-stage electrical conduction path through the intermediate layer, of which at least one first A two-stage electric conduction path is included and electrically connected to each corresponding first-stage electric conduction path, and the second-stage electric conduction path is perpendicular to the second surface of the first mounting layer. Conducting electricity in the direction, the middle layer overlies the first side of the second mounting layer, and some solder balls are mounted on the opposite second side of the second mounting layer. The second mounting layer includes a third-stage electrical conduction path, and at least one third-stage electrical conduction path is included therein. Sunda ball electrically connected to the integrated circuit package comprising a structure that leads to electric conduction path of the second stage corresponding through the second mounting layer. 2. The package according to claim 1, wherein the second mounting layer has sufficient mechanical strength and heat conduction characteristics, and the package is soldered to a user's printed wiring circuit with solder balls. 3. A heat conduction hole is provided on the first and second mounting layers, and a heat conduction contact is provided on the intermediate layer. The heat conduction hole and the heat conduction contact are appropriately arranged, and The package of claim 1 providing a heat transfer path from the first surface to the heat transfer solder balls on the second surface of the second mounting layer. 4. The package of claim 1 including a heat spreader board to provide a heat transfer path from the integrated circuit to the outside of the package. 5. There is a heat diffusion board having at least one heat conduction hole on the first mounting layer for conducting the amount of heat generated by the integrated circuit, and at least one heat conduction hole for heat conduction. The package according to claim 1, wherein the heat generated by the integrated circuit is released to the outside of the package. 6. An integrated circuit is mounted on a first surface, the integrated circuit including a first mounting layer, the first mounting layer having a first-stage electrical conduction path from the first surface to an opposing second surface. The first mounting layer has a second surface overlying the intermediate layer, the intermediate layer including a second-stage electrical conduction path through the intermediate layer, at least one of which is comprised of The second-stage electric conduction path of the book is included and electrically connected to the corresponding first-stage electric conduction path, and the second-stage electric conduction path is the second surface of the first mounting layer. Conducting electricity in the vertical direction, the middle layer overlies the first surface of the second mounting layer, and some solder balls are mounted on the opposite second surface of the second mounting layer, The second mounting layer includes a third-stage electric conduction path, and at least one third-stage electric conduction path is included therein. Is and, connected to solder balls and electrical, integrated circuit package comprising a structure that leads to electric conduction path of the second stage corresponding through the second mounting layer.