JPS5894022U - Online high speed data editing control system - Google Patents
Online high speed data editing control systemInfo
- Publication number
- JPS5894022U JPS5894022U JP18793081U JP18793081U JPS5894022U JP S5894022 U JPS5894022 U JP S5894022U JP 18793081 U JP18793081 U JP 18793081U JP 18793081 U JP18793081 U JP 18793081U JP S5894022 U JPS5894022 U JP S5894022U
- Authority
- JP
- Japan
- Prior art keywords
- data editing
- transfer address
- control system
- high speed
- speed data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の制御ブロック図、第２図は本考案の制御
ブロック図である。
１Ｂ・・・・・・マイクロプロセッサ、ＩＡＬ・−−−
−ＤＭＡｉｌｌ、 御装置、１Ｇ、ＩＨ・・・・・・ア
ドレス切替用マルチプレクサ、１Ｎ・・・・・・データ
バッファメモリ、１０・・・・・・アドレスバッファメ
モリ、ＩＪ、 ＩＫ、 ＩＬ。
１Ｍ・・・・・・バス接続用パスバッファ。FIG. 1 is a conventional control block diagram, and FIG. 2 is a control block diagram of the present invention. 1B...Microprocessor, IAL---
-DMAill, control device, 1G, IH...address switching multiplexer, 1N...data buffer memory, 10...address buffer memory, IJ, IK, IL. 1M...Pass buffer for bus connection.
Claims (1)
用データバッファメモリと、転送アドレスバッファメモ
リと、ＤＭＡ転送アドレス切替器と、ＰＬＣに対するホ
ールド要求の優先度判定回路と゛より成るインターフェ
イス制御装置において、連続するメモリ及びＩＯ情報の
データ編集時におけるＤＭＡ転送アドレスと、不連続な
メモリ及びＩＯ情報のデータ編集時のランダムＤＭＡ転
送アドレスの切替手段を設けたことを特徴とするオンラ
イン高速データ編集側御システム。In an interface control device consisting of a microprocessor, a DMA control device, a data buffer memory for data storage, a transfer address buffer memory, a DMA transfer address switch, and a priority determination circuit for hold requests to the PLC, continuous memory and a switching means for switching between a DMA transfer address during data editing of IO information and a random DMA transfer address during data editing of discontinuous memory and IO information.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18793081U JPS5894022U (en) | 1981-12-18 | 1981-12-18 | Online high speed data editing control system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18793081U JPS5894022U (en) | 1981-12-18 | 1981-12-18 | Online high speed data editing control system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5894022U true JPS5894022U (en) | 1983-06-25 |
Family
ID=30102821
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18793081U Pending JPS5894022U (en) | 1981-12-18 | 1981-12-18 | Online high speed data editing control system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5894022U (en) |
-
1981
- 1981-12-18 JP JP18793081U patent/JPS5894022U/en active Pending
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