JPS5893047U

JPS5893047U - Semiconductor integrated logic circuit

Info

Publication number: JPS5893047U
Application number: JP16801682U
Authority: JP
Inventors: 向井　久和
Original assignee: 日本電信電話株式会社
Priority date: 1982-11-08
Filing date: 1982-11-08
Publication date: 1983-06-23

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図、第２図及び第３図は従来の論理回路を構成する
単位回路の回路図、第４図は第１図〜第３図に示した単
位回路の信号し゛ベルを示す図、第５図及び第６図はそ
れぞれ本考案による半導体集積論理回路の実施例を示す
接続図、第７図及び第８図は第５図の半導体論理回路に
代えたそれを基礎とする他の半導体論理回路を示す接続
図である。図中、Ｕｌ及びＵ２は半導体論理回路、Ｑ１〜Ｑ５．Ｑ
ｌ’及びＱ４’　、ＱＡ、ＱＣはそれぞれトランジスタ
、Ｒ１，Ｒ２，ＲＡ、ＲＣ１〜ＲＣ５は抵抗、Ｌｌ及び
Ｌ２は電源線、Ａは共通回路、Ｃは定電圧回路、ＤＣ，
Ｄｉ及びＤ２はダイオード、ＴＩ、ＴＩ’　、Ｔ２．Ｔ
４．Ｔ４’及びＴ５は入力端子、Ｔ３及びＴ３’は出力
端子をそれぞれ示す。ｎ占 ■とｇ　−７５，ＺＶオノ閃ＶＥＢ、−２〜−３％／ヤ２図　　　　“　　　　−1, 2, and 3 are circuit diagrams of unit circuits constituting a conventional logic circuit. FIG. 4 is a diagram showing signal levels of the unit circuits shown in FIGS. 1 to 3. 5 and 6 are connection diagrams showing embodiments of the semiconductor integrated logic circuit according to the present invention, respectively, and FIGS. 7 and 8 show other semiconductor logic based on the semiconductor logic circuit of FIG. 5 in place of the semiconductor logic circuit of FIG. It is a connection diagram showing a circuit. In the figure, Ul and U2 are semiconductor logic circuits, Q1 to Q5 . Q
l' and Q4', QA and QC are transistors respectively, R1, R2, RA and RC1 to RC5 are resistors, Ll and L2 are power lines, A is a common circuit, C is a constant voltage circuit, DC,
Di and D2 are diodes, TI, TI', T2 . T
4. T4' and T5 represent input terminals, and T3 and T3' represent output terminals, respectively. n Zhan ■ and g -75, ZV Ono flash VEB, -2 to -3% / Ya 2 figure " -

Claims

[Claims for Utility Model Registration] At least first, second and third transistors are provided, the emitters of the first and second transistors are connected to a first power supply through a common circuit common to them, and the collectors are connected to a first power supply through a common circuit. each connected to a second power source through the first and second loads, the collector of the third transistor being connected to the second power source, and the base being connected to the collector of either the first or second transistor. , an emitter is connected to the output terminal, an input terminal is connected to the base of the first transistor, a reference DC voltage input terminal is connected to the base of the second transistor, - an emitter of the third transistor Based on the logic input inputted to the input terminal, the semiconductor integrated logic includes a first unit circuit configured to obtain a logic output, and has an input stage, a logic operation section, and an output stage. In the circuit, a second unit circuit is configured such that a common voltage shift circuit is connected between the first unit circuit, the first and second loads of the first unit circuit, and a second power supply. The impedance of the voltage shift circuit of the second unit circuit and the impedance of the first and second loads are such that the two 'logic levels taken by the logic output of the second unit circuit are the above. The logic level is selected to be between the two logic levels taken by the logic output of the first unit circuit, and only the output stage is composed of the first unit circuit, and the input stage and the logic operation section are composed of the second unit circuit. A semiconductor integrated logic circuit characterized by being configured by combining unit circuits.