JPS6085615A - Buffer amplifier - Google Patents

Abstract

PURPOSE:To ensure a wide dynamic range by providing the 1st and 2nd transistors (TRs) between the 1st and 2nd power lines and output terminals respectively and controlling the TRs with an output current of the 1st and 2nd stage emitter follower circuits so as to compensate a dead band level. CONSTITUTION:NPN and PNP TRs Q1, Q3 constitute the 1st 2-stage emitter follower circuits formed between input/output terminals Ti and To, and Q2, Q4 constitute the 2nd 2-stage emitter follower circuit between the input and output similarly. Moreover, a TRQ13 constitutes a current source connected to the emitter of the Q1 and a TRQ10 forms a current source connected to the emitter of the Q2 and they insures an emitter current to the TRs Q1, Q2 at no signal. Moreover, TRs Q6, Q8 compensate respectively a load current, when the function of the TRs Q3, Q4 at the post-stage of the 1st and 2nd 2-stage emitter follower circuit is lost, for example, the TRs enter a dead band because a power supply voltage Vcc or an input signal close to a ground potential is fed to the input terminal Ti.

Description

[Detailed Description of the Invention] [Fields of Application] This invention relates to an emitter-follower type amplifier 7 that can provide a wide dynamic/fuji range.

[Background technology and its problems]

2. Description of the Related Art In recent years, as electronic devices have become smaller, amplification circuit elements have tended to be integrated into ICs and to be driven by low-voltage power supplies.

Low current L: In circuits that use a power supply, the dynamic range of the signal will inevitably be small, and especially with emitter follower type 7 knobs that have high impedance input and low impedance output characteristics, the forward voltage between the base connector and the connector BE
is about 0.7 V, so when driving with a voltage source of about 1.2 V, for example, the reduction in dynamic/fuji caused by the shift of the DC novel becomes a value that cannot be ignored.

Therefore, it is possible to consider using an amplification type other than an emitter follower, but in order to achieve high impedance input and low impedance output, it is necessary to add a feedback circuit, and it is not always a good idea to consider the input method as well. I can't say that.

[Purpose of the invention]

This invention was made in view of the actual situation.
Provides a buffer amplifier that uses an emitter-follower type amplifier to ensure high-impedance input and -1-impedance output characteristics, and also provides a dynamic V range comparable to that of the power circuit even when driven by a low voltage source. [Summary of the Invention] In order to achieve the above object, the present invention forms a push-pull a/b using an emitter follower circuit in which complementary type transistors are connected in two stages, and the push-pull a/b is partially driven. A first . The second transistor is configured to be controlled by the respective output currents of the two-stage emitter-hower circuit in which the second transistor is push-pull connected. and when the two-stage emitter follower circuit becomes a dead area due to an input signal near the power supply line, the beakn bell is prevented from being clipped by the current flowing through either of the first and second transistors;
It is a larger version of the Guinamitsukunji of Dekafubell.

〔Example〕

FIG. 1 shows a buffer amplifier circuit showing an embodiment of the present invention, where TI is an input terminal, To is an output terminal, and Q1 to Q
Cs is a transistor composed of PNP and NPN, respectively, which is usually formed by an integrated circuit, but may also be a discrete transistor. Among the plurality of transistors Q1 to Q+s, NPN type and PNP type transistors Q.

Q3 constitutes a first two-stage emitter follower circuit ycat formed between the input terminal T, and the output terminal To;
PNP type and NPN type transistor Q2. Similarly, Q constitutes a second two-stage emitter follower circuit between input and output.

Further, the transistor Q1g is a current source connected to the emitter of the transistor Q+.

form a current source connected to the emitter of transistor Q2, and these are connected to the emitter of transistor Q1,
Ensure emitter current of Q2. Furthermore, the transistors Qa and Qa are connected to the rear-stage transistor/transistor Q3. When the Q40 function is lost and 2R occurs, for example, the input terminal TI K power supply voltage V. This is to compensate for the load current when an input signal close to C or ground potential is applied and a dead region state occurs.

Note that the transistors Q1s+Q+o are current mirror-connected transistors Q111QI2・Q,
A constant current is supplied by the resistor r1
Transistors Qs, Q flowing into +l'2.

The structure is such that it is also controlled by the current of the current.

Next, let us explain the operation of this XA light buffer 7/pu in the second section.
This will be explained with reference to the waveform diagram in the figure.

Input terminal T+K/Bell signal e shown in FIG.
Q3. and Q2. Almost equal signals are output to Q4.

When the potential of this signal eH rises, the emitter current of transistor Q1 increases, and the transistor Q1 increases. The emitter current of S decreases. Also, the emitter current of transistor Q2 decreases and the emitter current of transistor Q4 increases. Therefore, the potential of the output terminal To also rises together with the signal e1.

However, the signal e10 level rose further and 7.■. .

When near -VBE, transistor Q2 turns off,
The current increase in transistor Q stops. At the same time, the transistor Q3 side is turned off, and the signal at the output terminal To becomes a signal whose peak value is reduced as shown by the dotted line in FIG.

However, in the buffer circuit of this invention, the transistor Q3 is close to off (in the original novel, the current flowing into the resistor "1" decreases, so the transistor Q3 turns off).
Due to the drop in emitter potential of transistors Q, ,Q
, , the current flowing through Q increases. Therefore, since a current is supplied from the transistor Q6 which is connected to the transistor Q5 in an output mirror, the potential of the output terminal To further increases as shown by the dashed line, and Vco -
It can rise to the point where it becomes ca (Qa).

Similarly, when the novel level of the signal el is close to the level of GNDTlI, the transistor Q1. Q4 is turned off and the emitter follower function is lost, but in this case as well, transistor Q
4 emitter current drop by °C transistor Q Io
The emitter potential of transistor Q +01 Q increases.
2*Q7'lThe flowing current increases.

Therefore, the output terminal T is supplied with current by the transistor Q8 which is connected to the transistor Q7 in a power/total mirror connection. /Bell” & GND+■ex (Qg).

Since the vcg (converter-to-emitter voltage) of the transistors Qe and Qs can be easily set to about several tens of mV, the buffer amplifier of the present invention can obtain a novel dynamic/fuji level of almost the power supply voltage.

Further, since the current supplied by the transistors Q= and Qa corresponds to the load connected to the output terminal ToK, power efficiency can be improved.

It goes without saying that this circuit may be used with two power supplies (10V, -2, etc.).

〔Effect of the invention〕

As explained above, the buffer amplifier of this invention has two
The output current of the emitter follower connected in stages is detected, and the first one is connected between the power supply line and the output terminal. Since the second transistor (Qo, Q8) covers the dead area of the two-stage emitter follower circuit, there are advantages in that a wide dynamic range is ensured and there is little direct current/bell shift. Therefore, it is particularly useful as a buffer 7 amplifier driven by a low voltage power supply.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a buffer 7 showing an embodiment of the present invention, and FIG. 2 is a circuit diagram of a signal Vbell'? : It is a waveform diagram for explanation. In the figure, Q+, Qs, and Q2 and Q4 are transistors that constitute the first and second two-stage emitter follower circuits, Qo.
・Q to・Qo・Q +2・Qtx is a transistor connected to a voltage mirror, and Qo and Q8 are the first transistors that are controlled to operate according to the load. and a second transistor.

Claims (1)

[Claims] The first one is connected complementary. In the push-pull circuit implemented in the second two-stage Emintahow circuit, the first. The first line has a converter and an emitter connected between the second power supply line and the output terminal. a second transistor; The second transistor is controlled by the output current of the second two-stage emitter follower circuit. The buffer circuit is designed to compensate for the dead region/percussion of the second two-stage emitter circuit.