JPS589301A - Chip resistance element - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] The present invention relates to improvements in chip resistance elements.

As shown in FIG. 1, a conventional chip resistance element has a coating layer made of a resistor such as ruthenium oxide (RwOffi) on the entire surface of a substrate 1 made of an insulator such as ceramic, and a coating layer made of a resistive material such as ruthenium oxide (RwOffi), and two ends *C of the resistive coating layer. *continued and the full width of the baseill (from the main cause through the sides to the back 1iil: the length of the silver (
It has a structure in which a pair of electrodes 1a and 1b made of a metal such as Mug) or silver-palladium (Mug-Pi) are each formed by printing.

This chip resistance element is literally a very small lid, so
The insulating substrate is devised so that many devices can be manufactured all at once on a single large insulating substrate. That is, as shown in Figure 2, C1
Prepare an insulating base [1 m long] consisting of a ceramic board or the like of a predetermined size, and apply wrinkles to both ends of the entire surface of the insulating base, both sides and both ends of the back surface of the board. A metal film is printed and then a number of resistive coatings 3 are printed in such a way that they are connected at both ends to the electrodes 31.3b. Thereafter, a method is adopted in which a plurality of chip resistance elements are obtained from the substrate 1ahb by cutting and dividing the substrate 1aK using a snap line CfEt consisting of pre-formed dividing grooves and the like.

However, this conventional chip resistance element has C
When adjusting the formed resistor to a desired resistance value, if the large substrate 1a on which multiple steel chip resistance elements are formed remains, all the electrodes of each chip resistance element are connected, and the resistor 8 of each chip resistance element is Since both electrodes am and 8b are connected in a differential connection lIc, even if the wrinkled substrate 1a is inserted into a trimming device and the resistance value is adjusted, the resistance value of each chip resistor element cannot be measured individually, and each chip resistor It is not possible to adjust each element to a desired resistance value.

Therefore, 1m of the substrate is divided into individual chip resistance elements, each element is further aligned, and one trimming device C is inserted, and the desired resistance is measured while measuring the resistance value of each chip resistance element with the trimming device. The resistor must be adjusted to match the value. However, due to the ultra-small size of the device, this process is extremely troublesome, has poor workability, and has the disadvantage of increasing the cost of the product.

Invention 1 was devised in view of the above-mentioned drawbacks of ICs, and its purpose is to adjust each chip resistance element to a desired resistance value using a trimming device while forming a plurality of chip resistance elements on one large insulating substrate. It is an object of the present invention to provide a chip resistance element that can be easily manufactured, has extremely good workability, can be mass-produced, and can achieve low cost.

The present invention provides a chip resistance element having a pair of magnetic poles extending from the entire surface of an insulating substrate to the side surfaces, in which one of the electrodes is arranged along the entire surface of the insulating substrate [excluding both ends of the side surfaces, a central portion Cl is formed. It is characterized by:

Hereinafter, the present invention will be explained in detail based on the embodiments shown in FIGS. 3 and 4.

In the figure, the same parts as in the conventional product are given the same reference numerals.

FIG. 3 shows an embodiment of the chip resistance element of the present invention, in which 1 is an insulating substrate made of ceramic or the like, on the main surface of which a resistance coating 2 made of ruthenium oxide (RmOz) or the like is formed; Silver (Ag) silver-palladium (Ag
A pair of electrodes 3m and 8b made of metal such as -Pd) are formed.

Note that the electrodes 1m and lb are not necessarily on the back side of the substrate 111Ic.
There is no required IP to extend.

The resistive film 2 and the electrodes 3a and 3b are formed by a conventionally known thick film method, thin film method, or the like.

In the chip resistance element of the present invention, the electrodes 3m, 3
It is important that one side of b is formed only in the center of the substrate 1, excluding the entire life lIi and both ends of the side surfaces. should be excluded.

As described above, the chip resistance element of the present invention has electrodes of 3m and 3m.
B is formed only in the center of the insulating substrate l, excluding both ends of the whole surface and side surfaces, so that manufacturing of the chip resistor element (all the necessary steps L1) is easy and relatively large. The insulating substrate can be processed in one piece, and the resistance of each chip resistance element can be adjusted extremely easily.

That is, as shown in FIG. 4, when a large number of resistive films 2 and electrodes 3b are formed on a large insulating substrate 1a, one of the pair of electrodes of each chip resistor element is connected to each other by C. It is formed independently without being

Therefore, it is not necessary to divide the large group [111] into each chip resistance element,
The chip resistor can be inserted into a trimming device as is, and the resistance value of each chip resistance element can be determined individually and adjusted in sequence.

Note that the trimming device irradiates the resistive film 2 with a laser beam or the like while measuring the resistance value of each chip resistive element,
So that the resistance product IIN becomes the desired resistance value.
This is a well-known device for adjusting resistance values.

In the present invention, only after the resistance value of each chip resistance element is adjusted by a trimming device, the substrate 1m is cut and divided along the snap line AC to obtain chip resistance elements as final products.

As described above, according to the present invention, one of the pair of electrodes extending from the entire surface of the insulating substrate to the side surface C is formed in the central portion of the insulating substrate, excluding the 1 m lifetime and both ends of the side surface. Even if multiple chip resistance elements are formed on a large insulating substrate, adjacent electrodes can be formed independently without being connected to each other. It is possible to adjust the resistance value of each chip resistance element by inserting it into the chip resistance element.

Therefore, its workability is extremely good, it can be mass-produced, and the cost of the product can be reduced.

Note that the present invention is not limited to the embodiments described above, and various changes can be made without departing from the gist of the present invention.

[Brief explanation of the drawing]

Figure 1 is a perspective view showing a conventional chip resistance element, Figure 2 (
m) and (b) are diagrams for explaining the manufacturing method of the chip resistor element shown in Figure 111, Figure 3 is a perspective view showing the chip resistor element of the present invention, and Figures 4 (1) and (b) are H3 FIG. 3 is a diagram for explaining a method of manufacturing the chip resistance element shown in the figure. l: Insulating substrate 2: Resistive coating 3m, 1b: Electrode A Nissunapline patent applicant Kyoto Cera Z Tsuku Co., Ltd. Figure 1 Figure 2

Claims (1)

[Claims] In a chip resistance element having a pair of electrodes extending from the entire surface of the insulating substrate to the side surface C, one of the electrodes is formed in the center of the insulating substrate, excluding both ends of the entire surface and the side surface. A chip resistance element characterized by: