JPS5889935U - semiconductor equipment - Google Patents

semiconductor equipment

Info

Publication number
JPS5889935U
JPS5889935U JP1982140485U JP14048582U JPS5889935U JP S5889935 U JPS5889935 U JP S5889935U JP 1982140485 U JP1982140485 U JP 1982140485U JP 14048582 U JP14048582 U JP 14048582U JP S5889935 U JPS5889935 U JP S5889935U
Authority
JP
Japan
Prior art keywords
integrated circuit
semiconductor integrated
hole
chromium coating
semiconductor equipment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1982140485U
Other languages
Japanese (ja)
Other versions
JPS5838610Y2 (en
Inventor
小口幸一
Original Assignee
セイコーエプソン株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by セイコーエプソン株式会社 filed Critical セイコーエプソン株式会社
Priority to JP1982140485U priority Critical patent/JPS5838610Y2/en
Publication of JPS5889935U publication Critical patent/JPS5889935U/en
Application granted granted Critical
Publication of JPS5838610Y2 publication Critical patent/JPS5838610Y2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto

Landscapes

  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、従来のテープキャ1プアボンデイング法を説
明する図。第2図は、従来の半導体回路の実装方法の他
の実施例を示す図である。第3図は、本考案のリード先
端構造を示す図である。第4図は、本考案のボンディン
グ構造を示す図である。 1・・・・・・リード線、2・・・・・・フレキシブル
な電気絶縁テープ、3・・・・・・接着剤、4・・・・
・・半導体集積回路の突起電極、5・・・・・・半導体
集積回路、q・・・・・・リード線、7・・・・・・リ
ード線先端部、8・・・・・・半導体集積回路の電極、
9・・・・・・半導体集積回路、10・・・・・・レジ
スト、11・・・・・・部分メッキに形成したボール、
12・・・・・・アルミニウム被膜、13・・・・・・
パッシベーション被膜、14・・・・・・フィールド酸
化膜、15・・・・・・シリコン基板、16・・・・・
・クローム被膜、17・・・・・・金被膜。
FIG. 1 is a diagram illustrating a conventional tape cap bonding method. FIG. 2 is a diagram showing another embodiment of the conventional semiconductor circuit mounting method. FIG. 3 is a diagram showing the lead tip structure of the present invention. FIG. 4 is a diagram showing the bonding structure of the present invention. 1... Lead wire, 2... Flexible electrical insulation tape, 3... Adhesive, 4...
... Protruding electrode of semiconductor integrated circuit, 5 ... Semiconductor integrated circuit, q ... Lead wire, 7 ... Lead wire tip, 8 ... Semiconductor integrated circuit electrodes,
9...Semiconductor integrated circuit, 10...Resist, 11...Ball formed on partial plating,
12... Aluminum coating, 13...
Passivation film, 14...Field oxide film, 15...Silicon substrate, 16...
-Chrome coating, 17...gold coating.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 長尺の電気絶縁テープの一部分に明けられた孔の周辺部
から該孔の中央部に向って突き出た複数本のリード線の
先端部分に、ハンダ又はスズのメッキにて直径30〜1
00μの球に近いボールを形成した半導体集積回路支持
体の該ボール部は、半導体集積回路のアルミニウムパッ
ド上に100〜500Aのクロム被膜及び500〜50
00“人の金被膜を形成したポンディングパッドに圧着
されてなる半導体装置。
The tips of multiple lead wires protruding from the periphery of a hole in a portion of a long electrical insulating tape toward the center of the hole are plated with solder or tin to form wires with a diameter of 30 mm to 1 mm.
The ball portion of the semiconductor integrated circuit support body, which is formed into a ball close to a 00μ sphere, has a chromium coating of 100 to 500A and a chromium coating of 500 to 50A on the aluminum pad of the semiconductor integrated circuit.
00 "A semiconductor device that is pressure-bonded to a bonding pad formed with a gold film.
JP1982140485U 1982-09-16 1982-09-16 semiconductor equipment Expired JPS5838610Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1982140485U JPS5838610Y2 (en) 1982-09-16 1982-09-16 semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1982140485U JPS5838610Y2 (en) 1982-09-16 1982-09-16 semiconductor equipment

Publications (2)

Publication Number Publication Date
JPS5889935U true JPS5889935U (en) 1983-06-17
JPS5838610Y2 JPS5838610Y2 (en) 1983-09-01

Family

ID=29933645

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1982140485U Expired JPS5838610Y2 (en) 1982-09-16 1982-09-16 semiconductor equipment

Country Status (1)

Country Link
JP (1) JPS5838610Y2 (en)

Also Published As

Publication number Publication date
JPS5838610Y2 (en) 1983-09-01

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