JPS60151132U - semiconductor equipment - Google Patents

semiconductor equipment

Info

Publication number
JPS60151132U
JPS60151132U JP1984039292U JP3929284U JPS60151132U JP S60151132 U JPS60151132 U JP S60151132U JP 1984039292 U JP1984039292 U JP 1984039292U JP 3929284 U JP3929284 U JP 3929284U JP S60151132 U JPS60151132 U JP S60151132U
Authority
JP
Japan
Prior art keywords
lead
resin
back surface
electrode lead
exposed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1984039292U
Other languages
Japanese (ja)
Inventor
安藤 重雄
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP1984039292U priority Critical patent/JPS60151132U/en
Publication of JPS60151132U publication Critical patent/JPS60151132U/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の半導体装置の裏面図、第2図はその側面
図である。第3図は本考案の一実施例による半導体装置
の裏面図、第4図はその側面図である。 1.1′・・・半導体素子搭載用リード、1,2′・・
・金属細線連結用リード、3,3′・・・封止樹脂部。
FIG. 1 is a back view of a conventional semiconductor device, and FIG. 2 is a side view thereof. FIG. 3 is a back view of a semiconductor device according to an embodiment of the present invention, and FIG. 4 is a side view thereof. 1.1'...Lead for mounting semiconductor element, 1,2'...
・Lead for connecting thin metal wires, 3, 3'...Sealing resin part.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体素子を搭載する素子搭載用リードと前記半導体素
子の電極に金属細線で連結された複数の電極導出リード
とを有する樹脂により封止された半導体装置において、
該素子搭載用リードの裏面全体が前記樹脂より露出しか
つ前記金属細線により連結された複数の電極導出リード
の前記樹脂から露出した部分のリード裏面は前記樹脂の
裏面と同一平面上に配置され、かつ前記電極導出用リー
ドの前記樹脂から露出した部分の幅が該電極導出用リー
ドの先端から0.3〜0.4順以内の部分で他の部分の
リード幅の2〜3倍広く加工されていることを特徴とす
る半導体装置。
A semiconductor device sealed with a resin having an element mounting lead for mounting a semiconductor element and a plurality of electrode lead-out leads connected to electrodes of the semiconductor element with thin metal wires,
The entire back surface of the element mounting lead is exposed from the resin, and the back surface of the lead of the portion exposed from the resin of the plurality of electrode lead-out leads connected by the thin metal wire is arranged on the same plane as the back surface of the resin, and the width of the part of the electrode lead-out lead exposed from the resin is processed to be 2 to 3 times wider than the lead width of other parts within 0.3 to 0.4 order from the tip of the electrode lead-out lead. A semiconductor device characterized by:
JP1984039292U 1984-03-19 1984-03-19 semiconductor equipment Pending JPS60151132U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984039292U JPS60151132U (en) 1984-03-19 1984-03-19 semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984039292U JPS60151132U (en) 1984-03-19 1984-03-19 semiconductor equipment

Publications (1)

Publication Number Publication Date
JPS60151132U true JPS60151132U (en) 1985-10-07

Family

ID=30547113

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984039292U Pending JPS60151132U (en) 1984-03-19 1984-03-19 semiconductor equipment

Country Status (1)

Country Link
JP (1) JPS60151132U (en)

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