JPS5877259A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the separation of a wiring of semiconductor device by a method wherein a binder of thin film of Ti, Cr, etc., having favorable adhesion is provided between a barrier metal of Mo, etc., and the metal wiring. CONSTITUTION:An N type GaAlAs clad layer 6, an N type GaAlAs active layer 7, a P type GaAlAs clad layer 8, and an N type GaAs layers 9 are formed on an N<+> type GaAs substrate 1 according to the liquid phase growth method, a mask 10 having a slender opening of 2mum width is provided on the layer 9, and Zn is diffused to form a P<+> type layer 11. Then an ohmically connecting layer 12 of Ti or Cr, an Mo barrier metal layer 4, and a binder layer 13 of Ti or Cr are evaporated in order, and an electrode wiring layer 4 of Au or Ag is adhered. After thickness of the substrate 1 is regulated to about 100mum, an AuGe layer 14, an Ni layer 15 are evaporated, a binder layer 13 of Ti or Cr is accumulated, and an electrode 5 of Au or Ag is adhered to complete. By this constitution, the separation of the electrode wiring can be prevented.

Description

[Detailed description of the invention] The present invention relates to &GaAtA3/GaAS system, InGaA
The present invention relates to an electrode structure of a III-V compound semiconductor device such as an SP/InP system.

Conventionally, m-v group compound semiconductor 1, for example, Ga AA
In the ha/G a A S type semiconductor laser.

In order to prevent mutual diffusion between the substrate constituent elements and the wiring electrode metal, a barrier metal layer made of a high melting point metal such as MO, W, or Hf has been provided. Namely.

As shown in FIG. 1, when forming an electrode for p+-GaAj +d 2 on x14''-〇aA 8 substrate 1, first.

In order to obtain an ohmic contact, an ohmic electrode layer 3 was formed by depositing T:t or Cr to a thickness of 200 to 700 layers. Next, a high melting point metal such as MO, W, Hf, etc. is heated to about 2000. Barrier metal j-4 was formed by Hf deposition.

Furthermore, the wiring electrode layer 5 was formed by depositing sAu or Ag in an amount of approximately I Am4.

By adopting the electrode structure in which the above-mentioned barrier metal layer is introduced, it is possible that the constituent elements of the conductor (for example, Qa) diffuse outward to the wiring electrode layer and damage the electrode 1-, or that the wiring electrode metal It is possible to prevent Au and Ag from diffusing into the semiconductor and deteriorating device characteristics. As a result, the reliability of the device during high-temperature/leakage operation has been significantly improved.

However, when attempting to manufacture a device having the above-mentioned electrode structure with a high yield, there was a problem in terms of reproducibility as described below.

MO and W serve as barrier metals.

) (F) It is difficult to form a high-quality thin film of high-melting point metals, such as f, compared to ordinary metals.In other words, since a large amount of power is required for evaporation, a large amount of adsorbed gas is released in the evaporation equipment, so This is because a high vacuum cannot be maintained and it is somewhat difficult to obtain a deposition source with a small amount of occluded gas.

Therefore, the barrier metal 1- thus formed tends to be of low quality, with significant oxygen and nitrogen occlusion. Therefore, the barrier metal 1- of the wiring electrode layer (Au, Ag, etc.)
The adhesion to the wiring electrode layer was poor, and accidents such as peeling of the wiring electrode layer were likely to occur.

The present invention has been made to eliminate the above-mentioned drawbacks, and uses a metal (for example, Ti) with excellent adhesive properties between the barrier metal layer and the wiring electrode l-.

It is characterized by providing a thin film 1- (single layer of binder) of Cr, etc.).

The present invention will be explained in detail below using examples.

Embodiment 1 FIG. 2 shows a cross-sectional structural diagram of a GaAtAS/GaAS semi-integrated laser according to the present invention. First t1+-〇aA8
GaAtA3 cladding layer 6.n-GaA on substrate l
tA3 activity + m7. p-GaAtAs cladding layer 8゜n
- GaAs surface layer 9 is formed by liquid phase growth.

Next, a diffusion mask 10 having an elongated opening with a width of approximately 2 μm is provided on the surface 1149 to allow a limited current to flow through a portion of the active layer 7, and then selective diffusion of Zn is performed to form a po-diffusion node. 11 is formed.

Next, Ti (
or Cr) to a thickness of 200 to 700, and
I used MO as the barrier metal 44 to a thickness of about 2,000 mermaids. Furthermore, in order to improve the dense layering of the wiring electrodes,
The binder layer 13 is made of Ti (or Cr) with a thickness of 10
0 to 500A is deposited, and finally, Au is deposited to form the wiring electrode layer 5.
(or Ag) to a thickness of about 1 μm to form a p-side electrode.

Next, after adjusting the thickness of the b n”-aaha substrate to approximately 100 μm, the n-side ohmic contact 1-14.1
Approximately 2,000 people, each with h A"GJ N' as 5,
100mm thick was deposited, and then MO, which would become barrier metal 114, was deposited to a thickness of about 2000mm. Furthermore, as binder l-13, a thickness of 100 to 500 Ti (or C) is added.
Finally, Au (or Ag), which will become the wiring electrode layer 5, is deposited to a thickness of about 1 gn to form an n-side electrode.

Embodiment 2 FIG. 3 is a cross-sectional structural diagram of an InGaASP/IflP-based long wavelength light emitting diode according to the present invention. first.

pn-In is deposited on the n''-tnp substrate 21 by a liquid phase growth method.
P cladding layer 22, 1l-111GaASP active layer 2
3.1) -InP cladding/m24 & n-I
An nGaAsP surface layer 25 is formed. Next, about 20 μm
A diffusion mask 26 having an elongated opening is formed on the surface layer 25. Next, selective diffusion of Zn is performed to obtain p′″-
A diffusion layer 27 is formed.

Next, the p-side ohmic contact, i! Au becomes 28
Apply Zn to a thickness of about 2000mm, then apply barrier metal.
I wore a mermaid with a W size of 114 and a thickness of about 2000. moreover,
In order to improve the adhesion of the wiring electrode layer 5, a binder layer 1 is added.
3, deposit Ti (or cr) to a thickness of 100 to 500, and then deposit Au (or Ag) with a maximum distribution w*pole of 1-5.
A p-side electrode was formed by depositing about 1 μm of the p-side electrode.

Next, the thickness of the n'''-1l1P board 21 is approximately 20074 mm.
After adjusting to m, Au8nt- was used as the n-side O,=mic contact layer 29, and W was used as the barrier metal layer 4.

Ti (or cr> as binder 1-5, wiring'
Au (or Ag) was deposited at a polarization rate of 5 to form an n1ll electrode.

As explained above, the adhesion of the L wiring electrode layer was significantly improved by providing a binder layer with excellent adhesion using Ti, Cr, etc. between the barrier metal layer and the wiring electrode layer. the result.

The problem of film peeling was resolved, and the reproducibility of the electrode formation process was greatly improved. In addition, as the rear metal 1-, suitably oxidized MO, W, Hf, etc. can be used, an excellent rear effect is obtained, and the reliability of the device is further improved.

In the example, wiring electrode +4 (Au, Ag, etc.)
Although the case has been described in which the electrode is deposited by vapor deposition, it is also possible to form a thick film electrode (so-called PH8' quadrupole) by using a plating method. Additionally, an ohmic electrode layer.

Ballame Ile #, Painter 1. The wiring is the precept layer.

It can be formed not only by a vapor deposition method but also by a sputtering method, an ion blating method, etc.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing a conventional electrode structure, and FIG. 2 is a sectional view showing a conventional electrode structure. FIG. 3 is a sectional view showing an electrode structure according to an embodiment of the present invention. 1...n''-QAAs substrate, 4...Barrier metal 1
-15... Wiring electrode layer, 11... p''-zn diffusion layer, 12... p side--25 ohmic wL pole layer, 13...
...Binder layer. Agent Toshiyuki Usuda, Patent Attorney JZ Diagram No. 3 Diagram ζ Continuation of Page 1 0 Author: Kobayashi Masagi 1-280 Higashi Koigakubo, Kokubunji City Hitachi, Ltd. Central Research Laboratory 0 Author: Chiba Katsuaki 1-chome, Higashi Koigakubo, Kokubunji City Address: 280, Hitachi, Ltd., Central Research Laboratory. Author: Hirokato Kato, Hitachi, Ltd., Takasaki Factory, 111 Nishiyokote-cho, Takasaki City. Author: Masamichi Kobayashi, Hitachi, Ltd., Takasaki Factory, 111 Nishiyokote-cho, Takasaki City.

Claims (1)

[Claims] In a semiconductor device using a compound semiconductor as a base material, a metal layer for preventing interdiffusion between the electrode metal and the semiconductor material, an adhesive metal layer on the metal layer, and 'It4. A semiconductor device having a single pole portion formed by forming a metal layer for wiring.