JPS59165418A - Manufacture of semiconductor light emitting element - Google Patents

Manufacture of semiconductor light emitting element

Info

Publication number
JPS59165418A
JPS59165418A JP58039873A JP3987383A JPS59165418A JP S59165418 A JPS59165418 A JP S59165418A JP 58039873 A JP58039873 A JP 58039873A JP 3987383 A JP3987383 A JP 3987383A JP S59165418 A JPS59165418 A JP S59165418A
Authority
JP
Japan
Prior art keywords
metal film
light emitting
semiconductor light
current
insulating film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58039873A
Other languages
Japanese (ja)
Inventor
Hidenori Nomura
野村 秀徳
Yoichi Isoda
磯田 陽一
Yuzo Morihisa
守久 友三
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP58039873A priority Critical patent/JPS59165418A/en
Publication of JPS59165418A publication Critical patent/JPS59165418A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation

Abstract

PURPOSE:To obtain a highly reliability semiconductor light emitting element which does not result in discontinuity of metal film for rejecting electrode reaction by vacuum depositing metal film while a wafer is rotated around the inclined axis. CONSTITUTION:In a vacuum depositing process of metal film 7 for ohmic contact made of Ti and metal film 8 for rejecting electrode reaction made of Pt, vacuum deposition is carried out while a semiconductor wafer 21 is placed on a rotating plate 22 having the rotating axis inclined for the direction of vacuum deposition source 20 and then it is rotated. Thereby, a thick metal film is also deposited on the side wall of boundary 6b of a current supply aperture 6a and discontinuity of metal film and resultant deterioration of reliability can be prevented.

Description

【発明の詳細な説明】 本発明は半導体発光ダイオード及び半導体レーザダイオ
ード等の半導体発光素子の製造方法の改良に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improvements in methods for manufacturing semiconductor light emitting devices such as semiconductor light emitting diodes and semiconductor laser diodes.

半導体発光素子は電気・光変換効率(発光効率)が高く
、また注入電流の変調によって発光強度の変調が極めて
容易に行えるところから、近年光フアイバ通信用の光源
として実用化が進められている。GaAs/GaAノA
8あるいはInP/InGaAsP等の化合物半導体を
組成とする光フアイバ通信用の半導体発光素子は発光効
率を高めるための二重へテロ接合構造と、光ファイバと
の結合に一際して重要な高輝度を得るための電流狭窄構
造を備えている。SIへ等の絶縁膜を利用した絶縁膜狭
窄は半導体発光ダイオードをはじめとする半導体発光素
子の電流狭窄構造としてよく用いられている。一方、電
流狭窄構造によって極めて高密度の電流(通常5〜40
W−を通じて動作する光フアイバ通信用の半導体発光素
子では高電流密度動作に起因する特性の経時劣化を防止
することが大きな課題となっている。高電流密度動作が
引起す劣化要因の極めて大きなものとして電極材料と半
導体結晶との反応ないし、電極材料の半導体結晶中への
侵入によるものが従来から良く知られている。従来の半
導体発光素子では、このような電極起因の劣化を防止す
るため、例えばオーム接触を得るためのAu−Zn合金
の薄膜上に電極反応阻止用の金属であるT i/Ptの
2層膜あるいはCrの単層膜を介してヒートシンクへの
接着に必要な厚いんメッキ層を設けていた。
Semiconductor light emitting devices have high electricity-to-light conversion efficiency (luminous efficiency), and the light emission intensity can be extremely easily modulated by modulating the injected current, so in recent years they have been put into practical use as light sources for optical fiber communications. GaAs/GaA
Semiconductor light-emitting devices for optical fiber communication, which are composed of compound semiconductors such as 8 or InP/InGaAsP, have a double heterojunction structure to increase luminous efficiency and high brightness, which is extremely important for coupling with optical fibers. Equipped with a current confinement structure to obtain Insulating film confinement using an insulating film such as SI is often used as a current confinement structure for semiconductor light emitting devices such as semiconductor light emitting diodes. On the other hand, due to the current confinement structure, extremely high density current (usually 5 to 40
In semiconductor light emitting devices for optical fiber communication that operate through W-, it is a major issue to prevent the characteristics from deteriorating over time due to high current density operation. It has been well known that the reaction between the electrode material and the semiconductor crystal, or the penetration of the electrode material into the semiconductor crystal, is an extremely important cause of deterioration caused by high current density operation. In conventional semiconductor light emitting devices, in order to prevent such electrode-induced deterioration, for example, a two-layer film of Ti/Pt, which is a metal for preventing electrode reactions, is placed on a thin film of Au-Zn alloy to obtain ohmic contact. Alternatively, a thick plating layer necessary for adhesion to a heat sink was provided via a single layer of Cr.

んメッキ層から半導体結晶中へんが侵入し、素子特性が
劣化する現象をこのT i/P tあるいは0を直接に
オーム接触用金属として利用する場合でも電極反応阻止
用金属としての機能を果すことが素子の高信頼化のため
には不可欠となっている。
Even when this T i/P t or 0 is used directly as an ohmic contact metal, it still functions as an electrode reaction blocking metal, to prevent the phenomenon that the element characteristics deteriorate due to penetration of the metal from the plating layer into the semiconductor crystal. is essential for making devices highly reliable.

しかしながら、従来の絶縁膜狭窄形の半導体発光素子で
は単に絶縁膜を表面へ堆積した後、電流性入部開口をエ
ツチングによって形成し、その上に多層膜構造の電流注
入電極を上方から一様に蒸着して設けていたため、絶縁
膜の電流性入部開口境界部に段差が形成され、境界部側
壁では蒸着金属の膜厚が薄くなシ、この部分で金属膜が
途切れやすくなるという欠点が見られた。特に電極反応
阻止用金属膜に生じた途切れは、素子の高温動作や高電
流密度動作時において、上部金属層組成の半導体層への
侵入を招き信頼性の低下原因となっていた。
However, in conventional insulating film constriction type semiconductor light emitting devices, an insulating film is simply deposited on the surface, a current injection opening is formed by etching, and a current injection electrode with a multilayer film structure is uniformly deposited from above. As a result, a step was formed at the border of the current-conducting inlet opening of the insulating film, and the thickness of the vapor-deposited metal was thinner on the side walls of the border, resulting in the disadvantage that the metal film was more likely to break off in this area. . In particular, discontinuities that occur in the electrode reaction blocking metal film cause the composition of the upper metal layer to invade the semiconductor layer during high-temperature operation or high-current density operation of the device, resulting in a decrease in reliability.

本発明の目的は上述の欠点を除去する高信頼の半導体発
光素子を製造する方法を提供することにある。
An object of the present invention is to provide a method for manufacturing a highly reliable semiconductor light emitting device that eliminates the above-mentioned drawbacks.

すなわち本発明は、二重へテロ接合構造を有する半導体
ウエノ・−表面に電流狭窄のための絶縁膜を設ける工程
、該絶縁膜をエツチング加工して電流性入部開口を設け
る工程、該絶縁膜上に電流注入電極を設ける工程を行う
半導体発光素子の製造方法において、前記電流注入電極
を構成する金属膜のうち少なくとも電極反応阻止金属膜
の形成に際し、金属の堆積方向に対して傾斜した軸の回
シに前記半導体ウェハーを回転させながら前記金属膜を
蒸着することを特徴とする半導体発光素子の製造方法で
ある−5.・−・ 次に図面を参照して本発明の実施例を詳細に説明する。
That is, the present invention includes a step of providing an insulating film for current confinement on the surface of a semiconductor substrate having a double heterojunction structure, a step of etching the insulating film to form a current-conducting opening, and a step of forming an insulating film on the insulating film. In a method for manufacturing a semiconductor light emitting device, which includes a step of providing a current injection electrode in a metal film forming the current injection electrode, in forming at least an electrode reaction blocking metal film among the metal films constituting the current injection electrode, rotation of an axis inclined with respect to the metal deposition direction is performed. 5. A method for manufacturing a semiconductor light emitting device, characterized in that the metal film is deposited while rotating the semiconductor wafer. ... Next, embodiments of the present invention will be described in detail with reference to the drawings.

第1図は本発明の一実施例から得られる半導体発光素子
の断面図、第2図はその実施例の主要工程である金属膜
の蒸着工程を表わす図である。製造される半導体発光素
子は、 n−InPからなる半導体基板1上にエピタキ
シャル成長されたn−InPからなるバッファ層2、I
no、y4Gao、zsAgo、5gPo+44からな
る活性層3、p−InPからなる閉じ込め層4、p−I
no、54Gao、l@Aso、3aPo、snから成
る電極形成層5をもつ1なる通常良く知られた二重ヘテ
p接合構造と電流性入部開口6aによって電流狭窄を哲
うSio2から成る絶縁膜6、Tiからなるオーム接触
用金R膜7、ptからなる電極反応阻止用金属膜8、ん
メッキ層9、及び光域υ出し窓11をもちAn −Ge
−Ni合金からなるn側電極10から構成されている。
FIG. 1 is a cross-sectional view of a semiconductor light emitting device obtained according to an embodiment of the present invention, and FIG. 2 is a diagram showing a metal film vapor deposition step, which is the main process of the embodiment. The semiconductor light emitting device to be manufactured includes a buffer layer 2 made of n-InP epitaxially grown on a semiconductor substrate 1 made of n-InP, and a buffer layer 2 made of n-InP, I
Active layer 3 made of no, y4Gao, zsAgo, 5gPo+44, confinement layer 4 made of p-InP, p-I
An insulating film 6 made of Sio2 which achieves current confinement by the well-known double heterop junction structure 1 having an electrode forming layer 5 made of no, 54 Gao, l@Aso, 3aPo, and sn , an ohmic contact gold R film 7 made of Ti, an electrode reaction blocking metal film 8 made of PT, a plating layer 9, and a light area υ window 11.
The n-side electrode 10 is made of a -Ni alloy.

本素子は発光ダイオードとして周知の通り、勤メッキ層
9、電極反応阻止用金属膜8及びオーム接触用金属膜7
から成る電流注入電極に正、n側電極10に負の電圧を
印加すると発光領域3aに注入された電流によって1.
3μm波長の発光が得られ、光取シ出し窓11から外部
へ取り出される。
As is well known as a light emitting diode, this device includes a plating layer 9, a metal film 8 for blocking an electrode reaction, and a metal film 7 for ohmic contact.
When a positive voltage is applied to the current injection electrode and a negative voltage is applied to the n-side electrode 10, the current injected into the light emitting region 3a causes 1.
Light emission with a wavelength of 3 μm is obtained and is extracted to the outside through the light extraction window 11.

本実施例の製造工程は、絶縁膜6とそれに続く電流性入
部開口6IILのエツチング加工までは通常良く知られ
た半導体発光素子の製造方法にもとづいている。即ち、
半導体基板1上へのエピタキシャル成長工程後、Qの法
により厚さ約0.3μmの絶縁膜6をエピタキシャル成
長された半導体ウエノ)−表面へ堆積する工程、フォト
リングラフィによル直径30μmの電流注入部間ロ6a
部分の絶縁膜6を除床する工程を懸て、真空蒸着法によ
シ厚さ0.1丸のオーム接触用金属膜7及び厚さ0.2
μmの電極反応阻止用金属膜8を電流性入部開口6a及
び絶縁膜6上に蒸着する工程、次いで、真空蒸着法と7
オトリソグラフイによってn側電極10を形成する工程
とメッキ法によりiメッキ層9を形成する工程とから構
成されている0本発明では、オーム接触用金属膜7と電
極反応阻止用金属膜8の蒸着工程において、第2図に示
すように、半導体ウェハー21が蒸着源20の方向に対
して傾斜した回転軸を有する回転台22の上に設置され
回転されながら蒸着を行うものである。このため、本実
施例から得られる半導体発光素子は電流性入部開口6a
の境界部らの側壁にも厚い膜厚で金属膜の堆積が得られ
、従来例の欠点であった、金属膜の途切れとこれが引き
起こす信頼性低下を防止することができる1゜なお上述
の実施例では、半導体発光素子が発光ダイオードである
としたが、もちろんこれに限らず、電極反応阻止用金属
膜の途切れが大きな信頼性低下要因となっている半導体
レーザダイ−オードに対しても同様な効果が期待できる
。tた、上述の実施例では、絶縁膜に接する部分の電極
構造をT i/P t/Au  の多層構成としたが、
必ずしもこれに限定せず、良く知られたAu−Zn/T
 i汐t/Au 構成、あるいはAu−Zn、’Cr/
Au構成等であっても良い。
The manufacturing process of this embodiment, up to the etching process of the insulating film 6 and the subsequent current-conducting inlet opening 6IIL, is based on a well-known manufacturing method for semiconductor light emitting devices. That is,
After the epitaxial growth step on the semiconductor substrate 1, a step of depositing an insulating film 6 with a thickness of about 0.3 μm on the surface of the epitaxially grown semiconductor substrate 1 by the Q method, and forming a current injection portion with a diameter of 30 μm using photolithography. Between 6a
After the step of removing the insulating film 6 in a portion, a metal film 7 for ohmic contact with a thickness of 0.1 circle and a thickness of 0.2
A process of vapor depositing a metal film 8 for blocking electrode reaction of μm on the current inlet opening 6a and the insulating film 6, and then a vacuum evaporation method and step 7.
In the present invention, which consists of a step of forming the n-side electrode 10 by otolithography and a step of forming the i-plated layer 9 by plating, the metal film 7 for ohmic contact and the metal film 8 for blocking electrode reaction are formed. In the vapor deposition process, as shown in FIG. 2, the semiconductor wafer 21 is placed on a rotating table 22 having a rotation axis inclined with respect to the direction of the vapor deposition source 20, and vapor deposition is performed while being rotated. Therefore, the semiconductor light emitting device obtained from this example has the current-generating entrance opening 6a.
A thick metal film can be deposited on the side walls of the boundary areas, and the discontinuity of the metal film and the resulting decrease in reliability, which were the drawbacks of the conventional example, can be prevented. In the example, we assumed that the semiconductor light-emitting element is a light-emitting diode, but of course the same effect is not limited to this, and the same effect can be applied to semiconductor laser diodes, where discontinuities in the metal film for preventing electrode reactions are a major factor in reducing reliability. can be expected. In addition, in the above-mentioned embodiment, the electrode structure of the part in contact with the insulating film was made into a multilayer structure of Ti/Pt/Au.
Not limited to this, the well-known Au-Zn/T
i t/Au configuration, or Au-Zn, 'Cr/
It may be made of Au or the like.

以上のように本発明によれば、電極反応阻止用金属膜の
途切れを生じないため信頼性の高い半導体発光素子を得
ることができる効果を有するものである。
As described above, according to the present invention, there is no discontinuity in the metal film for inhibiting electrode reactions, so that a highly reliable semiconductor light emitting device can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す半導体発光素子の断面
図、第2図は不発明における蒸着工程を示す図である。 図中1は半導体基板、2はバッファ層、3は活性層、3
aは発光領域、4L閉じ込め層、5は電極形成層、6は
絶縁膜、6aは電流性入部開口、凸は境界部、7はオー
ム接触用金属膜、8は電極反応阻止用金属膜、9は勤メ
ッキ層、10はn側電極、11は光取シ出し窓、加は蒸
着源、21は半導体ウェハー、22は回転台である。
FIG. 1 is a sectional view of a semiconductor light emitting device showing an embodiment of the present invention, and FIG. 2 is a diagram showing a vapor deposition process in the invention. In the figure, 1 is a semiconductor substrate, 2 is a buffer layer, 3 is an active layer, 3
a is a light emitting region, 4L confinement layer, 5 is an electrode forming layer, 6 is an insulating film, 6a is a current-conducting opening, a convex is a boundary part, 7 is a metal film for ohmic contact, 8 is a metal film for blocking electrode reaction, 9 10 is a plating layer, 10 is an n-side electrode, 11 is a light extraction window, 1 is an evaporation source, 21 is a semiconductor wafer, and 22 is a rotating table.

Claims (1)

【特許請求の範囲】[Claims] (1)二重へテロ接合構造を有する半導体ウェハー表面
に電流狭窄のための絶縁膜を設ける工程、該絶縁膜をエ
ツチング加工して電流性入部開口を設ける工程、該絶縁
膜上に電流注入電極を設ける工程を行う半導体発光素子
の製造方法において、前記電流注入電極を構成する金属
膜のうち、少なくとも電極反応阻止金属膜の形成に際し
、金属の堆積方向に対して傾斜した軸の回りに前記半導
体ウェハーを回転させながら前記金属膜を蒸着すること
を特徴とする半導体発光素子の製造方法。
(1) A step of providing an insulating film for current confinement on the surface of a semiconductor wafer having a double heterojunction structure, a step of etching the insulating film to form a current-conducting opening, and a current injection electrode on the insulating film. In the method for manufacturing a semiconductor light emitting device, the semiconductor light emitting device is formed around an axis that is inclined with respect to the metal deposition direction when forming at least an electrode reaction blocking metal film among the metal films constituting the current injection electrode. A method for manufacturing a semiconductor light emitting device, characterized in that the metal film is deposited while rotating a wafer.
JP58039873A 1983-03-10 1983-03-10 Manufacture of semiconductor light emitting element Pending JPS59165418A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58039873A JPS59165418A (en) 1983-03-10 1983-03-10 Manufacture of semiconductor light emitting element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58039873A JPS59165418A (en) 1983-03-10 1983-03-10 Manufacture of semiconductor light emitting element

Publications (1)

Publication Number Publication Date
JPS59165418A true JPS59165418A (en) 1984-09-18

Family

ID=12565095

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58039873A Pending JPS59165418A (en) 1983-03-10 1983-03-10 Manufacture of semiconductor light emitting element

Country Status (1)

Country Link
JP (1) JPS59165418A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0262830A2 (en) * 1986-10-03 1988-04-06 THORN EMI plc Method of ensuring contact in a deposited layer
JPS63122292A (en) * 1986-11-12 1988-05-26 Nec Corp Semiconductor light-emitting element

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0262830A2 (en) * 1986-10-03 1988-04-06 THORN EMI plc Method of ensuring contact in a deposited layer
JPS63122292A (en) * 1986-11-12 1988-05-26 Nec Corp Semiconductor light-emitting element

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