JPS5872480A - Semiconductor device for heat-sensitive recording - Google Patents

Abstract

PURPOSE:To effectively compensate for the heat hysteresis of the heating element of a printer by using a simplified constitution in which a speicific gate circuit is provided and a latch circuit is used repeatedly two times or more. CONSTITUTION:A semiconductor device 15 for heat-sensitive recording is made up of a shift register circuit 3, a latch circuit 16 and gate circuits 17 and 18, where the marks O1-On are connecting terminals to heating element. At the end of recording for Nth line, image signal for the Nth line is held in the latch circuit 16 and image signal for the (N+1)th line is held in the shift register circuit 3. Then, suing the outputs of the circuits 16 and 3, a judgement is made on whether or not the compensation for the heat hysteresis of the time t1 for the signal of the (M+1)th line in the gate circuit 18 is needed, and the result is latched in the circuit 16. Then, by the information, the heating element is heated for a period of the time 0 or t1, the signal of the (N+1)th line in the circuit 3 is moved to the circuit 16, and the heating element is heated for a period of time t2. Thus, it follows that the heating element is heated for a period of time (t1+t2) when no compensation is needed or for a period of time t2 when compensation is needed.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a thermal recording semiconductor device for driving a heating element.

As is well known, the thermal recording method is applied in various fields as a method for obtaining maintenance-free hard copies.

In order to further expand these uses, there is a strong desire for faster thermal recording. In order to perform high-speed recording with a thermal head consisting of a large number of heating elements, it is necessary to improve the heat pulse resistance of the heating element so that the heating time of the heating element can be shortened.
It is necessary to increase the number of heating elements that are heated simultaneously.

For the latter purpose, in addition to the conventional (1) diode matrix type thermal heads, (2) thyristor type and (3) shift register type thermal heads are being developed.

The methods (2) and (3) above are suitable for high-speed thermal recording because the number of heating elements that can be heated simultaneously can be increased compared to the method (1).

The main object of the present invention is to provide a novel method of the above-mentioned method (3), in which a semiconductor device is integrated with a heating element and mounted on a head.

FIG. 1 shows the basic circuit of a shift register type thermal head.

FIG. 1 is an overall circuit diagram of a shift register type thermal hector in which 16 heating elements are driven by four ICs.

In FIG. 1, 1-1 to 1-16 are 16 heating elements, 2 is 4 ICs, and each IC is a shift register circuit 3. Latch circuit 4. The dirt circuit 52 is made by integrating the heating element driving transistor 6.

IC2 actually requires a buffer circuit between the dart circuit and the output transistor, or a power supply terminal, but these are omitted for convenience.

The 16 heating elements 1-1 to 1-16 are heated by the power source 7 by turning the transistor 6 on and off. -IN, PIX-OUT: Image signal input terminal, 1-image signal output terminal, cK: Image signal transfer clock terminal, LATCH: Latch terminal, ENB 1, ENB 2: Signal terminal that determines the heating period.

In Figure 1, an image signal is input from the PIX-IN terminal, transferred to the shift register 3 by the CK terminal, and then transferred to the LA
The image signal is latched into the latch circuit 4 by the TCH terminal,
Next, connect dirt circuit 5 to terminal ENB-1 or EN.
When a dart signal is applied to B-2, the heating element 1-1 or 1
During each heating period during which 8 -8.1=9 to 1-16 cells can be heated alternately, the next picture signal is transferred. In this case, if the latch circuit 4 in FIG. Image signal transfer cannot be performed in between.

As mentioned above (when heating ENB-1 and ENB-2 alternately, the latch circuit is not necessary. - However, in this case, it is necessary to divide the image signal input terminal PIX-IN and transfer the image signal. There is.

As can be seen from the above explanation, a shift register type thermal head in which an IC with a built-in shift register circuit number is integrated with a heating element is suitable for high-speed recording. In other words, the maximum number of heating elements that can be heated simultaneously is is the product of the number of heating elements that can be driven by one IC and the number of ENB terminals that are commonly connected and supplied with signal voltage. Therefore, as shown in Figure 1, if the ENB terminals are shared during head configuration, or if all ENBs are commonly connected in the external circuit for driving the head, it is possible to heat all the heating elements at once. be. The ability to drive such a heating element is extremely useful for high-speed recording in a head consisting of a large number of heating elements, such as a thermal head for facsimile.

However, in reality, if we consider that if all the heating elements are driven at once, there will be no time for transferring the next image signal, the shift register type thermal head will require twice the heating time of the heating elements (two-part recording). It can be said that the entire heating element can be heated in an hour.

In addition, in the terminal configuration as a head in Fig. 1, ENB
Although the terminal is divided into two, if a circuit as shown in FIG. 2 is added, it is not necessary to divide the ENB terminal.

Figure 2 shows only the ENB terminal part of the IC.
is a 1-bit shift register, and 9 is a dart circuit.

Connect each IC as shown in the diagram, and connect the terminal S EN as a head.
The signal for driving the heating element of each IC (output of the dart circuit 9) is sent from B to the clock terminal ENB-C of the shift register 8.
If the information is transferred by K, the heating period of the heating element can be determined for each IC using the commonly connected terminal ENB as a head. According to this method, one ENB connected in common is used as a head for the number of heating elements heated simultaneously.
Depending on the terminal 1. You can choose at will.

This method is basically the same as the block switching method using the external circuit of a diode matrix type head, but when incorporating it into a shift register type IC, sufficient attention must be paid to noise countermeasures. It is also well known that there is a risk of destroying the heating element.

As explained above, an IC with a built-in shift register
The thermal head for heat-sensitive recording equipped with a circuit function is suitable for high-speed recording, but in order to take full advantage of this function, the heat resistance of the heating element must be checked. It is necessary to consider the looseness. That is, when high-speed recording is performed using a head having a large number of heating elements, it is necessary to consider the effects on the life of the heating elements due to an increase in the temperature of the head and a shortening of the heating cycle of the heating elements.

The former problem of head temperature rise can be solved by measuring the temperature at a point that represents the head temperature and using this value to adjust the pulse width of the heating element 14 - head temperature compensation method - to make the recording density uniform. What is done is done.

However, this method has a long time constant for detecting the head temperature, and there is a possibility that only a specific heating element heats up continuously. A method for adjusting the body pulse width - a thermal shock compensation method - is also required.

In order to compensate for this thermal shock, it is necessary to adjust the pulse width of each heating element according to the history of heating or not heating of each heating element.

In the thermal shock compensation method, it is better to examine the heating history for as long as possible and adjust the heating i4' pulse width.

However, by examining the heating history of each heating element N times,
Adjusting the pulse width generally requires N times as many latch circuits as the total number of heating elements. Moreover, it is problematic in terms of cost to configure a thermal head by integrating an IC having such a function with a heating element.

That is, as a thermal leakage compensation method, only one line's heating history is required, there are no problems with print quality or heating element life, and for this purpose, a simple circuit is added to the circuit shown in FIG. If an IC capable of performing such functions could be designed, it would be advantageous in terms of cost.

It will also be understood that this kind of thinking is useful even when thermal shock compensation for about 2 to 3 lines of N is required.

That is, an object of the present invention is to provide a simplified circuit system of a shift register type IC that has both the circuit function shown in FIG. shall be.

In order to make the gist of the present invention easier to understand, the concept for performing one-line thermal leakage compensation will first be explained.

Now, if tl l''2>0, taking into account the heating history of the Nth line, Table 1 To heat the (N+l) line, three pulse widths t t '' OOr tl or as shown in Table 1 are required. A state of tl + t2 is required.

Since the N line is black, tl is a pulse width that can be shortened to obtain the same color density, which has a desirable result in terms of heating element life.

FIG. 3 shows a configuration of an IC that is commonly considered for realizing the thermal shock compensation shown in Table 1.

In FIG. 3, there are two latch circuits 1 in the IC 10.
1,121, two dirt circuits 13 and 14 are constructed.

The terminal symbols of the IC are the same as in FIG. 1, and 01 to On are connection terminals to the heating element (collector terminal of the transistor).

In FIG. 3, assuming that the latch 11 latches the (N+1) line image signal and the latch 12 latches the N line image signal, the first
A heating element corresponding to the table can be heated.

Table 2 In this way, if you use an IC configured as shown in Figure 3,
The function of the head configured as shown in FIG. 1 and the thermal leakage compensation shown in Table 1 can be performed. However, as can be seen from the comparison between FIG. 1 and FIG. 3, the IC in FIG. The addition of the dirt circuit 14 complicates the IC circuit.

An object of the present invention is to provide an IC in which the IC having the configuration shown in FIG. 3 and the tl have equivalent functions, and the circuit configuration is comparable to that in FIG. 1.

FIG. 4 shows the configuration of a shift register type IC according to the present invention, and FIG. 5 shows the timing of pulse width adjustment by this IC.

Ic15 in FIG. 4 is a shift register circuit 3° latch circuit 16. It is composed of dart circuits 17 and 18, and only an r-) circuit 18 is added compared to the IC shown in FIG.

In the present invention, the dart circuit 18 performs thermal shock compensation in the following manner.

In FIG. 5, at the end of recording on the Nth line,
The latch circuit 16 has the Nth line image signal launched, and the shift register 3 has (N+1)
Assuming that the transfer of the line image signal is completed, (N+
1) Determine whether or not thermal shock compensation is necessary during the t1 period of the line by using the output of the latch circuit 16 and the output of the shift register 3 through the dart circuit 18, and latch this result in the launch circuit 16 via the LATCH-2 terminal. . After heating for a period t1 using the launched information, the shift register circuit of the (N+1)th line is transferred to the latch circuit 16 by the LATCH-1 terminal, and heating for a period t2 is performed.

That is, if thermal relief compensation is necessary, the heating element is operated only for the period t2, and if it is not necessary, the heating element is operated for the period (t1+t2).

It is also clear from the above description that normal recording that does not require thermal relief compensation for all heating elements is also possible.

As described above, the present invention uses the image signal of the shift register and the output of the latch circuit 92 times per line (one dot) to compensate for thermal fluctuations, thereby reducing the IC latch circuit (for the entire head). In this case, the configuration of the IC is provided by omitting one line.

In designing a shift register type IC, this omission allows the chip size of the IC to be almost the same as the IC having the configuration shown in FIG. 1, making it possible to reduce the IC cost.

When configuring a line type head in which heating elements are arranged in a row, several tens of ICs are required, so this effect greatly helps in reducing the head cost.

On the other hand, from a comparison between FIG. 4 and FIG. 3, it can be said that the fact that only one ENB signal line is required is an advantage in terms of mounting an IC on the head.

Furthermore, the concept shown in FIG. 4 can be utilized even when configuring a thermal leakage compensation circuit with N=2 to 3 lines in an IC.

As is clear from the above, according to the present invention, it is possible to realize the functions required of a thermal head equipped with a shift register type IC, and further to reduce the cost of the head.

[Brief explanation of the drawing]

1 to 3 are diagrams showing the circuit system of a conventional IC for a shift register type thermal recording head, and FIG. 4 is a diagram showing the circuit configuration of an IC according to the present invention. 0PIX-IN, PIX- is a timing chart of output terminals to explain the function of the circuit in Figure 4.
OUT-... Image signal input terminal 2 excitation signal output terminal, CK...
...Clock terminal for image signal transfer, LATCH...Latch terminal, ENB...Signal terminal that determines the heating period, 3.
・・Shift register circuit, 15-IC, 16-・・・
Latch circuit, 17.18... Dirt circuit, 01 or On... terminal. Patent applicant Matsushita Electric Industrial Co., Ltd. Agent Kouji Hoshino 1”;
Figure 2 2 Figure 3 371- Figure 4 Figure 5

Claims (1)

[Claims] One shift register to drive multiple heating elements for thermal recording. has multiple latch circuits and dart circuits
A semiconductor device comprising an output circuit, including a dart circuit configured so that a specific latch circuit can be used at least twice for one heating of a heating element (or one dot coloring). A semiconductor device for thermal recording characterized by: