JP3229256B2 - Thermal head - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thermal head capable of outputting different heating temperatures during the same scanning, which is suitable for, for example, a heat-sensitive element that develops different colors depending on the heating temperature.

[0002]

When printing with respect to the thermal paper by the Related Art Thermal head, conventionally, as shown in FIG. 4 (A), printing energy (temperature) and T ₀ higher than the print temperature constant, such as for example, black color When the energy is lower than that, the print density becomes lighter, so that the portion not desired to be printed does not heat the thermal head. That is, only the operation control of printing or not printing is performed based on the presence or absence of data on one line.

In order to perform this control, there is a type in which a hysteresis control circuit is added to limit a rise in temperature due to heat storage of the thermal head substrate. However, when printing, the thermal head is set to a single temperature, that is, a single energy. Control was the goal.

In recent years, a multi-color thermal paper has been manufactured in which, for example, printing is performed in black when printing with a high-temperature thermal head, and printed in red, for example, when printing with a low-temperature thermal head. For example, it is provided as product name MB-23 of Oji Paper Co., Ltd.

Namely, the heat-sensitive paper of this kind, as shown in FIG. 4 (B), when the thermal head of the printing energy (temperature) is T _2, and color, for example red, printing energy is T ₁
When (T ₂ <T ₁ ), the color develops black. Note whitening phenomenon appears when still higher than T _1. In addition to this type of heat-sensitive paper, not only a combination of red and black, but also a combination of other colors based on low / high printing energy exists.

[0006]

[SUMMARY OF THE INVENTION Incidentally Using such multi-color thermal paper, when performing multi-color printing, for example, as shown in FIG. 5 (A), performs red and black print on the scanning line L ₀ when the thermal head in the conventional, for example, a first print data portion of the red data is transferred by a current amount corresponding to a low temperature, then the data transfer by a current amount corresponding to the high temperature on the same scanning line L ₀ again It was necessary to do.

Further, as shown in FIG. 5B, even in the case of performing red-black two-color printing, the print data of the red portion is also changed by the current amount corresponding to the low temperature in the scanning lines L ₁ , L _2. Data transfer is performed, and then the same scan lines L ₁ , L
₂ ... Data transfer was performed by the amount of current corresponding to the high temperature above.

In order to cope with two types of energy, data transfer is performed twice in one line, and each energy is set. Therefore, there is a problem that the printing speed is slow because two data transfers are required for one line.

Accordingly, an object of the present invention is to provide a thermal head which can perform this in one scan even when different energy settings are made in one line.

[0010]

In order to achieve the above-mentioned object, in the present invention, a control circuit for a thermal head is constructed as shown in FIG. And the print control range is
In the high energy part, selection is made as shown in FIG. 1B, and in the low energy part, selection is made as shown in FIG.

In FIG. 1A, reference numeral 1 denotes an FET;
A one-dot heater of the thermal head (not shown) is connected to the terminal DOn, and controls on / off of the terminal DOn. 2 is an OR circuit, 3 to 5 are multi-input AND circuits, 6
Is an AND circuit, 7 to 10 are NAND circuits, 11 and 12 are E
An OR (exclusive or) circuit, 13 is an output protection circuit, 14 to 18 are inverters, 19 and 20 are NAND circuits, 21 is an EOR circuit, and 22 to 24 are inverters.

When the IC constituting the thermal head is operating normally, the output protection circuit 13 is provided with the multi-input AND circuits 3 and 4.
Is output as "1". Also, the print dots Q1, Q2, Q3, L in the high energy portion shown in FIG.
Signals indicating the presence / absence of Q2 and RQ2 are input as signals Q1, Q2, Q3, LQ2 and RQ2 shown in FIG.
As shown in FIG. 1C, the print dot q1 in the low energy portion,
Signals indicating the presence / absence of q2 and q3 are input as signals q1, q2 and q3 shown in FIG.

As will be described later, the strobe signal S
TROBE1 is for heating the thermal head as a high-energy part for a long time to print black on paper, and strobe signal STROBE2 is heating the thermal head for a short time as a low-energy part to print red, for example, on paper. STROBE1> STR
OBE2.

When the corresponding print Q1 shown in FIG. 1B is printed, if there is no print data in Q2, Q3, LQ2, and RQ2, these are "0" and the NAND circuits 7-1
Since 0 outputs “1”, both the multi-input AND circuit 5 and the multi-input AND circuit 3 output “1”,
The OR circuit 2 thereby receives the strobe signal STROBE1.
FET1 is turned on for a time T1 determined by the formula ( ₁₎ , and the heater of the thermal head is heated.

However, if there is print data in at least one of Q2, Q3, LQ2, and RQ2, the gate signals A1,
B1, A2, only being controlled time based on B2 output time of multi-input AND "1" of the the circuit 5 is output is "0" strobe signal STROBE1 by multi-input AND circuit 3 is shorter than the T ₁ And the energy of the heater of the thermal head in the strobe signal STROBE1 is controlled to be equal.

The corresponding print q1 shown in FIG. 1C is printed.
When there is no print data in q2 and q3,
Is “0”, and both of the NAND circuits 19 and 20 are
Since "1" is output, the AND circuit 6 and the multi-input AND circuit
The path 4 outputs “1”, and the OR circuit 2 outputs “1”.
Time determined by the strobe signal STROBE2
T _Two(T₁> T_Two) Only FET1 is turned on and thermal
Heat the heater of the head.

However, if there is print data in at least one of q2 and q3, the AND circuit 6 is controlled for a time controlled based on the gate signals C1 and C2 corresponding to the print data in consideration of the heat storage effect, as described later. controlled to be shorter than the T ₂ output time of "1" of the multi-input aND circuit 4 according to the strobe signal STROBE2 "0" is outputted from the equal heater energy of the thermal head in the strobe signal STROBE2 Control so that

In this manner, the print head can be energized by a plurality of types of long and short strobe signals in one scanning line. On the other hand, the print head can be controlled by a plurality of thermal energies by one print scan, and a plurality of colors can be printed by one print scan.

Accordingly, it is not necessary to scan the same scanning line a plurality of times in accordance with the number of colors as in the conventional case, and printing of a plurality of colors can be performed at high speed.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described with reference to FIGS. FIG. 1 shows a control circuit for one dot of a thermal head in the present invention, FIG. 2 is an explanatory diagram of control signals applied to the control circuit, and FIG. 3 is an embodiment of the present invention.

The various control signals shown in FIG. 2 are output from a control signal output circuit (not shown), and are all output at the same period S. FIG. 2 (A)
Are the various control signals for controlling the thermal head in the high energy state, and the control signals shown in (B) are the various control signals for controlling the thermal head in the low energy state.

[0022] STROBE1 signal, the printing control range shown in FIG. 1 (B), when printing only the appropriate print dot Q1 dot is present, a thermal head connected thereto to turn on period T ₁ only FET1 is intended to heating control only for the period T _1, as shown in FIG. 2 (a), only for the period T ₁ is at a low level.

[0023] GATE A1 signal, falls at the same time as the STROBE1 signal, in which rises after a period t _1. The GATE A2 signal falls at the same time as the STROBE1 signal, and rises after a period (t ₁ + t ₂ ).

The GATE B1 signal is a STROBE1 signal.
Period (t₁+ T _Two+ T_Three+ T_Four)rear
And then the period t_FiveLater, STROBE1
It rises simultaneously with the issue.

The GATE B2 signal is a STROBE1 signal.
Period (t₁+ T _Two+ T_Three) Fall after
And then the period (t_Four+ T_Five) Later, STROBE
It rises at the same time as one signal.

Further STROBE2 signal, the printing control range shown in FIG. 1 (C), if there is a printed dot only the appropriate print dot q1, thermal head connected thereto turns on the period T ₂ by FET1 For period T ₂
(T ₂ <T ₁ ) is controlled by heating.
As (B), the falls simultaneously with STROBE1 signal only during the period T ₂ is at a low level.

[0027] GATE C1 signal, falls at the same time as the STROBE2 signal, in which rises after a period t _6. The GATE C2 signal falls at the same time as the STROBE2 signal, and rises after a period (t ₆ + t ₇ ).

These T ₁ , T ₂ , t _{1 to} t ₈ are:
It can be set appropriately according to the characteristics of the paper. First, the thermal history control in the present invention based on FIGS.
In the print control range shown in FIGS. 1B and 1C, that is, in the high energy portion, the print dots Q1 to Q3, L
Print data exists for Q2 and RQ2 as described below, and print dots q1 to q3
The case where print data exists as described below will be described.

Here, when Q1 is the corresponding print dot,
Q2 indicates a print dot immediately before the one line, and Q3 indicates a print dot immediately before the two lines. LQ2 indicates the left print dot one line before, and RQ2 indicates the right print dot one line before.

When q1 is the corresponding print dot,
q2 indicates a print dot immediately before the one line, and q3 indicates 2
Indicates the print dot immediately before the line. (1) When print data exists only in the print dot Q1, in the print control range shown in FIG. 1B, print data exists only in the corresponding print dot Q1, and Q2, Q3, LQ2,
When print data does not exist in RQ2, in FIG. 1A, Q1 = “1”, Q2 = “0”, Q3 = “0”, and LQ2 =
"0", RQ2 = "0".

Since each of the NAND circuits 7 to 10 outputs "1" according to each "0", the multi-input AND circuit 5 outputs "1". At this time, if the thermal head is normal, "1" is output from the output protection circuit 13, and Q1 = "1".
Since the STROBE1 signal as shown in FIG.
“1” is output from the multi-input AND circuit 3 only during a period T ₁ shown in FIG. At this time, since q1 = “0”, the multi-input AND circuit 4 outputs “0”.

As described above, since "1" output from the multi-input AND circuit 3 is input to the FET 1 via the OR circuit 2, the OR circuit 2 eventually has print data in Q1, Q2, Q3, LQ2, if there is no print data to RQ2, which was turned on by applying only the period T ₁ to "1" to the FET1, to heating control of the heater of the thermal head connected to FET1 only for the period T _1.

(2) When print data exists in the print dots Q1 and Q2, the corresponding print dot Q1 and the print dot Q2 one line before the print dot Q1
When print data exists in FIG. 1A, Q1 and Q in FIG.
2 is applied with “1”, Q3 = “0”, LQ2
= “0”, RQ2 = “0” is applied. Thus, each of the NAND circuits 8 to 10 outputs “1”.

At this time, the NAND circuit 7 includes the inverter 1
5 inverts the GATE A1 signal shown in FIG.
Since the signal and Q2 = "1" are applied, the period in FIG.
Interval t ₁The NAND circuit 7 outputs "0" only during
"1" is output. Therefore, the multi-input AND circuit 5 is configured as shown in FIG.
Period T shown in₁To period t₁After subtracting (t_Two
+ T_Three+ T_Four+ T_Five) Outputs “1” and FET1
Is turned on only during the period of
Set the heater of the head to (T₁-T₁) Heat control only for a period
You.

(3) When print data exists in the print dots Q1 and LQ2, the corresponding print dot Q1 and the adjacent left front print dot LQ2
When print data exists in Q1, L1 and LQ in FIG.
2 are respectively applied with “1”, Q2 = “0”, Q3 =
“0” and RQ2 = “0” are applied. As a result, the NAND circuit 7 and the NAND circuits 9 and 10 each output "1".

At this time, LQ2 =
“1” and the output of the EOR circuit 11 are input. EO
The R circuit 11 outputs an inverted signal of the GATE A1 signal shown in FIG.
At night, since the inverted signal of GATE A2 signal shown in FIG. 2 (A) is applied only during the period t ₂ shown in FIG. 2 EOR
The circuit 11 outputs “1”, and outputs “0” in other periods. Therefore the NAND circuit 8 outputs only period t ₂ "0", other periods outputs "1".

Accordingly, the multi-input AND circuit 3 operates by subtracting the period t ₂ from the period T ₁ shown in FIG. 2 (t ₁ + t _3).
+ T ₄ + t ₅ ) outputs “1”, the FET 1 is also turned on only during this period, and controls the heating of the heater of the thermal head connected to the FET _{1 for the} period (T ₁ −t ₂ ).

(4) When print data exists in the print dots Q1 and RQ2, the corresponding print dot Q1 and the adjacent right front print dot RQ2
When print data exists in Q1, RQ and RQ in FIG.
2 are respectively applied with “1”, Q2 = “0”, Q3 =
“0” and LQ2 = “0” are applied. Thereby, the NAND circuits 7 to 9 each output "1".

At this time, the RQ2 =
“1” and the output of the EOR circuit 12 are input. EO
The R circuit 12 outputs an inverted signal of the GATE B1 signal shown in FIG.
2 is applied, the EOR circuit 12 outputs “1” for the period t ₄ shown in FIG. 2 and outputs “0” for the other periods. .
Therefore the NAND circuit 10 outputs only the period t ₄ "0", other periods outputs "1".

Therefore, the multi-input AND circuit 3 operates by subtracting the period t ₄ from the period T ₁ shown in FIG. 2 (t ₁ + t _2).
+ T ₃ + t ₅ ) outputs “1”, the FET 1 is also turned on only during this period, and controls the heating of the heater of the thermal head connected to the FET _{1 for the} period (T ₁ −t ₄ ).

(5) When print data exists in the print dots Q1 and Q3, the corresponding print dot Q1 and the print dot Q3 two dots before the print dot Q1
When print data exists in Q1, Q3 and Q3 in FIG.
Are respectively applied, Q2 = “0”, LQ2 =
“0” and RQ2 = “0” are applied. Thus, the NAND circuits 7, 8 and 10 each output "1".

At this time, Q3 = "1" is applied to the NAND circuit 9.
And GATE shown in FIG.
 Since the inverted signal of the B1 signal is applied, it is shown in FIG.
Period t _FiveOnly the NAND circuit 9 outputs "0" and the other period
Outputs “1”.

Accordingly, the multi-input AND circuit 3 operates in the remaining period (t ₁ + t _{2) obtained} by subtracting the period t ₅ from the period T ₁ shown in FIG.
+ T ₃ + t ₄ ) outputs “1”, the FET 1 is also turned on only during this period, and controls the heating of the heater of the thermal head connected to the FET _{1 for the} period (T ₁ −t ₅ ).

(6) When print data exists in the print dots Q1, Q2, and Q3, the print dot Q1 and the print dot Q2 immediately before the print dot Q1
When print data exists in the print dot Q3 two dots before that, "1" is applied to each of Q1, Q2, and Q3 in FIG. 1A, and LQ2 = "0" and RQ2 = "0" are applied. Is done. Thereby, the NAND circuit 8 and the NAND circuit 1
0 outputs "1".

At this time, Q2 = “1” is applied to the NAND circuit 7.
And GATE shown in FIG.
Since A1 signal inversion signal and is applied, the NAND circuit 7 only during the period t ₁ in Figure 2 outputs "0", other periods outputs "1". The NAND circuit 9 has Q3
= "1", according to the inverter 17, since the inverted signal of GATE B1 signals shown in FIG. 2 (A) is applied, the NAND circuit 9 only for the period t ₅ shown in FIG. 2 outputs "0",
In other periods, “1” is output.

Therefore, the multi-input AND circuit 3 performs the remaining period (t) by subtracting the periods t ₁ and t ₅ from the period T ₁ shown in FIG.
₂ + t ₃ + t ₄ ) outputs “1”, and the FET 1 is also turned on only during this period, and controls the heating of the heater of the thermal head connected to the FET _{1 for the} period (T ₁ −t ₁ −t ₅ ).

(7) Print dots Q1, Q2, Q3, L
When print data exists in a plurality of print dots of Q2 and RQ3, the corresponding print dot Q1 and print dots Q2, Q3, LQ
2, a plurality of print dots of RQ2, for example, Q2 and L
When print data exists in Q2, Q3 = "0", R
Since Q2 = “0”, the NAND circuits 9 and 10 each output “1”.

At this time, as shown in the above (2), the NAND circuit 7 uses the inverter 15 to generate the G signal shown in FIG.
Since ATE A1 signal and Q2 = "1" is applied, the NAND circuit only during the period t ₁ in FIG. 2 7 outputs "0".

As shown in the above (3), LQ2 = "1" and the output of the EOR circuit 11 are input to the NAND circuit 8. Since the inverted signal of the GATE A1 signal shown in FIG. 2A by the inverter 15 and the inverted signal of the GATE A2 signal shown in FIG. 2A by the inverter 16 are applied to the EOR circuit 11, FIG. The EOR circuit 11 outputs “1” only for the period t ₂ shown in FIG.
Is output. For this reason, the NAND circuit 8 outputs only the period t ₂ "0".

Accordingly, when print data exists in Q2 and LQ2, when data exists in the corresponding print dot Q1 and print dot Q2, the period t ₁ during which the multi-input AND circuit 5 outputs “0”, and the corresponding print dot Q1 outputs (t ₁ + t ₂₎ only multi-input aND circuit 5 is "0" in the sum of the time period t ₂ to the multi-input aND circuit 5 outputs "0" when the data in the print dots LQ2 is present and, FET1 Is controlled by (T ₁ −t ₁ −t ₂ ).

That is, when print data exists in the corresponding print dot Q1 and a plurality of print dots among the print dots Q2, Q3, LQ2, and RQ2, the relevant print dot Q1 and other print dots Q2, Q3, LQ2, RQ2 When there is data in the print dot of the multi-input AND circuit 5, the multi-input AND circuit 5 is operated by the sum of the periods of “0” described in the above (2) to (5) according to the other print dots. outputs "0", the period F which is obtained by subtracting from only T ₁ period of the sum of these
The heater of the thermal head connected to ET1 is heated.

For example, Q1, Q2, Q3, LQ2, RQ
When all of the 2 printing data is present, T ₁ - (t <sub>1
+ T 2 + t 4 + t</sub> 5) = period only multi-input AND circuit 5 of t ₃ outputs "1" to heat the heater of the connected thermal head only FET1 this period t _3.

(8) When print data exists only in the print dot q1, in the print control range shown in FIG. 1C, print data exists only in the corresponding print dot q1, and print data does not exist in q2 and q3. In this case, in FIG. 1A, q1 = “1”, q
2 = “0” and q3 = “0”.

Accordingly, since "1" is output to the NAND circuits 19 and 20 by q2 = "0" and q3 = "0", the multi-input NAND circuit 6 outputs "1". At this time, if the thermal head is normal, "1" is output from the output protection circuit 13. At this time q1 = a "1", since STROBE2 signal such shown in FIG. 2 (B) to the inverter 22 is transferred, "1" from the period T ₂ by multi-input AND circuit 4 shown in FIG. 2 (B) Is output. Then Q
Since 1 = “0”, the multi-input AND circuit 3 outputs “0”.

As described above, since "1" output from the multi-input AND circuit 4 is input to the FET 1 via the OR circuit 2, the OR circuit 2 eventually has print data in q1, q2, If there is no print data in q3, the period T
₂ (T ₂ <T ₁ ), “1” is applied to the FET 1 to turn it on, and the heater of the thermal head connected to the FET 1 is heated and controlled for the period T ₂ .

(9) When print data exists in the print dots q1 and q2, the corresponding print dot q1 and the print dot q2 one line before the print dot q1
In FIG. 1A, when print data exists, q1 and q
"1" is applied to each of 2 and q3 = "0" is applied. Thereby, the NAND circuit 20 outputs “1”.

[0057] The NAND circuit 19 at this time, the inverter 23, since 2 inverted signal and q2 = "1" of the GATE C1 signal shown in (B) is applied, only during the period t ₆ in FIG. 2 NAND The circuit 19 outputs "0", and the other outputs "1". Thus the AND circuit 6, the remaining time obtained by subtracting the time t ₆ from the period T ₂ shown in FIG. 2 (t ₇ + t
₈₎ outputs "1", since the multi-input AND circuit 4 and an OR circuit 2 outputs only "1" during this period (t ₇ + t _8), FET1 becomes ON only during this period, connected to the FET1 The heating of the heater of the thermal head is controlled for a period of (T ₂ −t ₆ ).

(10) When print data exists at the print dots q1 and q3, the print dot q1 and the print dot q3 two dots before the print dot q1
In FIG. 1A, when print data exists, q1 and q
3 is applied with “1” and q2 = “0” is applied. Thus, the NAND circuit 19 outputs “1”.

At this time, in the NAND circuit 20, q3 =
“1” and the output of the EOR circuit 21 are input. EO
The inverted signal of the GATE C1 signal shown in FIG.
According to, since the inverted signal of GATE C2 signal shown in FIG. 2 (B) is applied, "1" of the two signals, the period t ₇ only EOR circuit 21 shown in FIG. 2 does not match the "0""1"
And outputs “0” in other periods. Therefore the NAND circuit 20 outputs "0" only for the period t _7, other periods outputs "1".

Therefore, the AND circuit 6 operates in the period T shown in FIG.
_The remaining period (t ₆ + t ₈ ) obtained by subtracting the period t ₇ from ₂ outputs “1”, and the multi-input AND circuit 4 and the OR circuit 2 output “1” only during this period (t ₆ + t ₈ ). So F
ET1 becomes ON only this period, the heating control of the heater of the thermal head connected to FET1 by (T ₂ -t ₇₎ period.

(11) When there is a print in the print dots q1, q2, q3, the corresponding print dot q1 and the print dot q immediately before the print dot q1
When print data exists in both the print dot q3 and the print dot q3 two dots before the print data, q1, q2, q3 in FIG.
Is applied to each of them.

At this time, as shown in the above (9), the inverted signal of the GATE C1 signal shown in FIG. 2B and q2 = “1” are applied to the AND circuit 19 by the inverter 23. The NAND circuit 19 outputs “0” only during the period t ₆ in FIG.

As shown in the above (10), q3 = “1” and the output of the EOR circuit 21 are input to the NAND circuit 20. At this time, the inverted signal of the GATE C1 signal shown in FIG. 2B by the inverter 23 and the inverted signal of the GATE C2 signal shown in FIG. 2B by the inverter 24 are applied to the EOR circuit 21. The EOR circuit 21 outputs "1" only during the period shown in FIG. 2 where "1" and "0" of both signals do not match, and outputs "0" during the other periods. Therefore the NAND circuit 20 outputs "0" only for the period t _7, other periods outputs "1".

Therefore, the AND circuit 6 operates in the period T shown in FIG.
_TwoTo period t₆And t₇Remaining time t minus₈Is "1"
And the multi-input AND circuit 4 and the OR circuit 2 are also in this period.
Interval t ₈Only "1" is output, so FET1
t₈= T_Two− (T₆+ T₇) Only turns on and FET1
The heater of the thermal head connected to_Two−
(T₆+ T₇) Only heating control.

As described above, according to the present invention, the heater of the thermal head can arbitrarily output data of a high energy portion or data of a low energy portion. For example, it is possible to control the printing of black on the multi-color thermal paper by the data of the high energy part, and to control the red printing by the data of the low energy part.

An embodiment of the thermal head of the present invention having such a control circuit will be described with reference to FIG. 3 and other drawings. FIG. 3 shows an example in which a 64-bit print head is controlled, and the same parts as those in the other figures are denoted by the same reference numerals. In FIG. 3, FET1 controls the printing of the corresponding print dot Q1 described in FIG. 1A, L1 indicates the FET for controlling the printing of the print dot on the left side of the relevant print dot Q1, and R1 indicates the corresponding print dot. An FET for controlling printing of a print dot on the right side of the dot Q1 is shown, VSS indicates a ground signal, and VDD indicates a power supply voltage of a control system.

Reference numeral 30 denotes a shift register, which is a 64-bit first register to which print data for the high energy portion Q is input.
(Not shown) and a 64-bit second shift register (not shown) to which print data for the low energy portion q is input. In this example, CL
According to the OCK signal, 64-bit input data of the high energy part Q is serially input to the first shift register from DATAin1 (Q), and 64-bit input data of the low energy part q is input to the second shift register from DATAin2 (q). Serial input, DATAout
1 (Q), DATAout than 2 (q), for example, the next stage in the Ru is serially output. Reference numerals 31, 32, 33,... Denote data holding registers for holding print data of 3 bits for the high energy portion Q and 3 bits for the low energy portion q.

The data holding register 31 sequentially holds three lines of 1-bit print data transmitted to the input terminal D ₁ by the LOAD signal, and also stores the 1-bit print data transmitted to the input terminal d _1. The data is sequentially held for only three lines. Data holding register 32,
33 are the same.

For example, the first print data line for the high energy part is set in the first shift register of the shift register 30, and the first print data line for the low energy part is set in the second shift register of the shift register 30. after, entering the LOAD signal to the LATCH terminal of the data holding register 31, 32 ..., the data 1 bit of data in the first shift register is transmitted to the input terminal D ₁ transmitted data retention is output from the terminal Q1 is held in the use register 31, the held by the second 1 bit input terminal d data which also data holding register 31, which is transmitted to the ₁ data is transmitted in the shift register Output from terminal q1.

Similarly, the second bit data of the first shift register and the second shift register are output from the output terminals Q1 and q1 of the data holding register 32, and the third bit of the first shift register and the second bit of the second shift register. Are output from the output terminals Q1 and q1 of the data holding register 33.

Next, the second print data line for the high energy portion is set in the first shift register of the shift register 30, and the second print data line for the low energy portion is set in the second shift register of the shift register 30. and then, if you enter a LOAD signal to the LATCH terminal of the data holding register 31, 32 ..., which are transmitted one new bit of data in the first shift register to the input terminal D ₁ registers for data retention The data held at 31 and output from the output terminal Q1 and the data previously output from the output terminal Q1 are shifted to the next stage and output from the output terminal Q2. Similar control is performed for the second shift register, which new first bit of data of the second shift register is transmitted to the input terminal d ₁ is output from the terminal q1 is held in the data holding register 31, The data previously output from the output terminal q1 is shifted to the next stage and output data is output to the output terminal q2.
Output.

Similarly, the second bit data of the first shift register and the second shift register are output from the output terminals Q1 and q1 of the data holding register 32, and the data output from the output terminals Q1 and q1 until then. Is shifted to the next stage and output from the output terminals Q2 and q2.

The same control is performed in the data holding register 33, and the third bit data of the first shift register and the second shift register are output from the output terminals Q1 and q1 of the data holding register 33, respectively. The data that has been output from the output terminals Q1 and q1 is shifted to the next stage and output from the output terminals Q2 and q2.

Then, the third print data line for the high energy part is set in the first shift register of the shift register 30, and the third print data line for the low energy part is set in the second shift register of the shift register 30. After that, when the LOAD signal is input to the LATCH terminals of the data holding registers 31, 32, 33,..., The same control as described above is performed.
The data of the bit is output from the output terminal Q1, and the data output from the output terminals Q1 and Q2 is shifted to the next stage and output from the output terminals Q2 and Q3, respectively. Also, new first bit data of the second shift register is output from the output terminal q1, and the output terminal q
The data output from 1, q2 is shifted to the next stage and output from output terminals q2, q3, respectively.

Similarly, in the data holding register 32, new second bit data of the first shift register is output from the output terminal Q1, and the output terminal Q
The data output from Q1 and Q2 is shifted to the next stage and output from output terminals Q2 and Q3, respectively. Further, new second bit data of the second shift register is output from the output terminal q1, and the data output from the output terminals q1 and q2 is shifted to the next stage and output from the output terminals q2 and q3, respectively. .

Similarly, in the data holding register 33, the new third bit data of the first shift register is output from the output terminal Q1, and the data previously output from the output terminals Q1 and Q2. Are shifted to the next stage and output from the output terminals Q2 and Q3, respectively. Also, new third-bit data of the second shift register is output from the output terminal q1, and the data that has been output from the output terminals q1 and q2 is shifted to the next stage and output from the output terminals q2 and q3, respectively. .

Here, the first print data line corresponds to the previous two print lines shown in FIGS.
The third print data line corresponds to the preceding print line, and the third print data line corresponds to the corresponding print line.

The output of the output terminal Q2 of the register 31 is input to the NAND circuit 8 (corresponding to LQ2 in FIG. 1A), and the output of the output terminal Q2 of the register 33 is input to the NAND circuit 10 (FIG. A) RQ2). Thus, a control circuit similar to that described with reference to FIG. 1A is configured based on the outputs of the data holding registers 31, 32, and 33.

Therefore, for the FET 1,
(B) A print control range shown in (C) which includes thermal history control according to the state of each print dot.
Control is performed based on the E1 signal and the STROBE2 signal. This control is similarly performed for the FETs L1, R1.

Therefore, the print data of the high energy portion is input to the first shift register of the shift register 30,
The print data of the low energy portion is input to the shift register, and the STROB1 signal, the STROB2 signal, the GAT
E A1 signal, GATE A2 signal, GATE B1 signal, GATE B2 signal, GATE C1 signal, GAT
When a control signal such as an EC2 signal is input, as described above,
The control including the print control range is simultaneously performed based on the print data of the high-energy portion and the print data of the low-energy portion. For example, as shown in FIG. 5, multi-color printing is performed by one scan.

In the above description, the embodiment for two energies, high and low, has been described. However, the present invention is of course not limited to this.
Print control for two energies.
In this case, the OR circuit 2 in FIG. 1 is of a three-input type, and a third input portion thereof has a strobe signal for medium energy and a print control signal (a print control (Including a thermal history control circuit based on the above).

The colors are not limited to red and black, but may be green and black, another combination, or a combination of three or more colors. Another embodiment of the present invention will be described.

Some print media can be printed when high energy is applied by a thermal head, such as Aladdin Card (registered trademark) manufactured by Tokyo Magnetic Printing Co., Ltd., but changes to another color when low energy is applied. There are rewritable media that can erase characters and the like printed with high energy and write character figures and the like again with high energy printing.

The circuit shown in FIGS. 1 to 3 can be used for such a medium. In this case, STR
The OBE1 signal is set so as to add high energy for printing, and the STROBE2 signal is set so as to give low energy for erasing printed characters and the like. In this case, q1, q2, and q3 are print erasure data for performing print erasure control. In this medium, since the range of the low energy for erasing is very severe, not only the magnitude of the STROBE2 signal but also the thermal history control based on the presence or absence of the q2 and q3, that is, the heating control based on the print erasure data q2 and q3. In addition, it is preferable to perform energy adjustment.

Thus, a thermal head for a rewritable medium can be provided.

[0086]

According to the present invention, the following effects can be obtained. (1) According to the present invention, data of the same scan line can be simultaneously printed with a plurality of types of energy, so that it is not necessary to scan in different color units as in the related art, and a thermal head of a plurality of colors is used. Printing can be performed at high speed.

(2) According to the present invention, the data holding means for holding the print data of a plurality of print lines is provided.
In addition to printing the same scan line data simultaneously with multiple types of energy, thermal history control based on the previous print data can be performed, so the energy applied to the thermal head can be fine-tuned by this thermal history control. Can be fast and beautifully colored,
Printing with a thermal head of a plurality of colors becomes possible.

(3) According to the present invention, erasing and writing can be performed on a rewritable medium at high speed and accurately.

[Brief description of the drawings]

FIG. 1 is a principle configuration diagram of the present invention.

FIG. 2 is an explanatory diagram of a control signal in FIG.

FIG. 3 is an embodiment of the present invention.

FIG. 4 is an explanatory diagram of printing energy for thermal paper.

FIG. 5 is an explanatory diagram of multicolor printing.

[Explanation of symbols]

 1 FET 2 OR circuit 3, 4, 5 Multi-input AND circuit 6 AND circuit 7, 8, 9, 10 NAND circuit 11, 12 EOR circuit 13 Output protection circuit 14, 15, 16, 17, 18 Inverter 19, 20 NAND circuit 21 EOR circuit 22, 23, 24 Inverter 30 Shift register 31, 32, 33 Data holding register

Claims (2)

(57) [Claims] 1. A heating means for heating a plurality of different energies, a print body to be heated by the heating means, and heating corresponding to a first energy to the heating means.
First strobe signal input means for inputting a first strobe signal for performing time control, and heating corresponding to a second energy to the heating means
Second strobe signal input means for inputting a second strobe signal shorter than the first strobe signal for performing time control; the first strobe signal; and the first strobe signal.
Data to be printed based on the number and the first heating time
A first heating signal output circuit to which a control signal is applied; print data one line before the print data;
Character data and the print data two lines before the print data
Length according to the existence of data in the print control range
When a gate control signal is input and a mark
Outputting the first heating time control signal according to the character data.
A first heating time control circuit, the second strobe signal, and the second strobe signal.
Print data to be printed based on the number and the second heating time
A second heating signal output circuit to which a control signal is applied; and a print data one line before and two lines before the print data.
Length according to the existence of data in the print control range
Gate control signal is input and is within the print control range.
Outputs the second heating time control signal according to print data
A thermal head comprising a second heating time control circuit . 2. A heating means for heating a plurality of different energies, a print body to be heated by the heating means, and a heating corresponding to a first energy to the heating means.
First strobe signal input means for inputting a first strobe signal for performing time control, and heating corresponding to a second energy to the heating means
A second strobe signal input <br/> force means for inputting the short second strobe signal than the first strobe signal for time control, and the first strobe signal, the first strobe signal
Data to be printed based on the number and the first heating time
A first heating signal output circuit to which a control signal is applied; print data one line before the print data;
Character data and the print data two lines before the print data
Length according to the existence of data in the print control range
When a gate control signal is input and a mark
Outputting the first heating time control signal according to the character data.
A first heating time control circuit, the second strobe signal, and the second strobe signal.
Print data to be printed based on the number and the second heating time
A second heating signal output circuit to which a control signal is applied; and a print data one line before and two lines before the print data.
Length according to the existence of data in the print control range
Gate control signal is input and is within the print control range
Outputs the second heating time control signal according to print data
And a data holding means for holding print data of a plurality of print lines.