JPS587192A - Electronic musical instrument - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] The present invention relates to an electronic musical instrument equipped with an automatic performance device,
This is intended to improve practice efficiency by preventing automatic performance from proceeding too far when no key is pressed for a certain period of time on the keyboard.

2. Description of the Related Art Hitherto, electronic musical instruments have been known that automatically generate musical tones or display keys pressed to assist manual performance using a keyboard.

However, with such electronic musical instruments, even if the practitioner becomes confused and stops pressing the keys, the automatic performance will continue automatically, and the practitioner will have to wait until the automatic performance ends and start again. It was difficult to achieve sufficient results in a short period of time because the students had to practice from scratch.

Therefore, an object of the present invention is to provide an electronic musical instrument with high practice efficiency.

The electronic musical instrument according to the present invention is characterized in that it detects if no keys are pressed for a certain period of time to prevent the automatic performance from proceeding any further. Explain in detail.

FIG. 1 shows an automatic performance device according to an embodiment of the present invention.
f: Nae fc indicates an electronic musical instrument.

A recording medium 1.0a such as a magnetic tape is attached to the lower margin of the musical score 1.0 I'i, and musical score data corresponding to the content of the musical score is recorded on the recording medium 10a.

Chestnut data reading flilJ control circuit 12 is a recording medium] Oa
The melody data is transferred to the melody data memory 14 and the accompaniment data is transferred to the accompaniment data reader 16 for storage. A continuous address signal WA, DX biting command signals WTl and WT2, and address selection signals Asl and As2 are sent out. Memories 14 and 16 are both RAM (random access memories), and are supplied with address signals from corresponding selector circuits 8 and 8.

The selector circuits 18 and 18 are respectively address selection signals M.
The selector circuit 18 selects the input A at tt 1 tt and outputs the selection signal A.
If Sl is 0, the control human power SB selects the input B at w 1 tt by the inverter 18a. 1 to 1 selector circuit, if selection signal AB2 is ゝゝ1　, control input S
Input A is selected when A is 11〃, and selection signal As2 is 1\0.
〃Then, the reverse control input SB is included in the inverter 2C1a.
Select input J3 with .

Musical score data reading control 1! When the Raku1.0 is inserted into the receiving port of the data reader included in the F1 path J2 and the data reading operation is started, the memory 14 enters the MJ write mode in response to the write command signal WT. , and the memory 14 is supplied with the continuous address signal WAD (44) from the selector circuit 18 which is in a state of selecting the manual A in response to the selection signal AIE. The corresponding melody data is written in the format i as shown in Fig. 2.In other words, the melody data that is written at this time is written using the 8-bit key code KO and the 8-bit key code KO to generate the melody sound. It is expressed in combination with the length code LNG, and the key code corresponding to several pre-selected melody sounds is rl 1 just before O.
It includes a key tone code KT consisting of 00OOOOJ. The upper 2 bits are the identification code, the lower 2 bits are the octave code, and the remaining 4 bits are the note code, as illustrated for each key code KO4j and pitch name C3, and each length code LNG is illustrated for an 8th note. The upper 2 bits are the identification code, and the remaining 6 bits are
The bit is a note length (note length) code. A rest is expressed by turning all 6 bits except the identification code pit of key code No. ON. And the last melody data 1. An end code FNB of 8 bits in total is written in the serial memory 14. Note that the key tone code KT is asked in order to specify the return position of the automatic performance υ, and from this point of view, for example, the note at the beginning of each bar or plural bars is selected as the key tone.

When the writing of the end code FN8 is completed, the memory 16 enters the write mode in response to the write command signal WT2, and the memory 16
A continuous address signal WAD is supplied from the selector circuit 9 which is in a state of selecting the input A in response to the selection signal As2. Therefore, accompaniment data corresponding to the progression of accompaniment (chords or bass notes) of the musical score 10 is written in the memory (5) 16 in a format as shown in FIG. Wow, the accompaniment data that is written at this time is a chord that is to be generated expressed by a combination of an 8-bit key code KO and an 8-bit length code LNG.
As in the case of melody data, it includes a key tone code KT. Each key code KO is C major (
As shown in the example for Ow), the upper 72 bits are the identification code, the lower 2 bits are the chord genbetsu code, and the remaining 4 bits are the root note code. Here, the chord type code is "00" for major, "01" for minor, and "]0" for seventh.

In addition, each length code LNG in the accompaniment data has the upper 2 bits as an identification code, as shown in the example for a half note.
The remaining 6 bits are the note length code.

After a series of data collection and writing operations as described above, the start switch SWo of the start and stop control circuit
The on-relay data readout circuit 24 and the accompaniment data output circuit 26 are operated. That is, when the start switch SWo is turned on, the on signal is differentiated by the differentiating circuit 28 in synchronization with the system clock φ.
It is converted into a start signal Δ5TRT. Since the start signal Δ5TRT sets the R-S flip-flop 30, the output Q-
A performance mode signal PLAY consisting of sr 1tt is sent. At this time, the input signal of the inverter 32 is 'h□a
/ζ, the output signal of the inverter 32 -61 is O
It is supplied to the AND gate 36 via the R gate 3-1. Therefore, the AND gate 36 outputs the performance mode signal P.
When LAY-*l# is generated, it becomes conductive and the clock signal φ
will be supplied to the address counter A.

When the address counter starts (@ No. ΔS) and is reset by TRT, the read address signal RAD corresponding to the first read address is supplied to the i7 selector circuit 18 as input B. At this time, the selector circuit 18 outputs a selection signal As, = 0, it is in the state of manually selecting all B, and the read address signal RA corresponding to the first read address
D, is supplied to the memory 14. For this reason, the memory 14
The first keytone code data is output from the button c1,
The identification code detection circuit type → detects the first keytone code.
-1・-N code detection number KTM latch circuit 41
Since the latch time is l''141+J, one address corresponding to the first read address from the counter 38 +8RA)1 is supplied to 5 to latch, then the clock from the counter (A N i) gate 36 (F"i No. φ
When 1 count is performed, the memory 14 accesses the first key corresponding to 1 key = 1-dotator, and the dedication code for the 2 hits is detected by the identification code detection circuit 4 ( l p (- and the remaining 6 bits of mer1 key code-1 (octave code and no=) code)
The signal is clocked - latch circuit 4Z timed by kjφ
1. Ru.

Identification code detection +1+ 1j no 1111M40 is memory 1
In response to the first key code data from 4, a key code +/Tomode Iro 1z MK is generated in the construction section, and the latch circuit 42 latches the first melody key code signal in response to this key code detection signal MK. . The melody key code signal MKO from the latch circuit 42 is then supplied to the display section 44.

In the display section 44, the melody key code signal MK
, 0 is provided, and this display control circuit 46 receives the performance mode signal PL.
When the enable signal KN is supplied from the AND gate 48, which is conductive at AY, in response to turning on the display select switch SW1, a light emitting element in the light emitting element group 52 provided along the key arrangement between the keys is selected. The key to be pressed is visually displayed by controlling the lighting. For this reason,
If the first melody key code signal MKO indicates the note name C3' as in the example shown in FIG. 2, the light emitting element corresponding to the C3 key lights up to instruct the key to be pressed.

After the key press display corresponding to the first melody sound starts as described above, when the counter counts the next clock signal φ, the length corresponding to the first melody sound is stored from the memory 14 in the same way as before. Code data is read. Of the read data at this time, the upper 2 bits of the identification code signal are not supplied to the identification code detection circuit 40, and the remaining 6 bits of melody note length code data are sent to i? with the clock Shingetsu φ. IA
The latch I1 path 54, which is turned on at I, is completely supplied. and,
Since the identification code detection circuit 40 generates the length code detection number 1 ML in accordance with the first length code data from the memory 14, the latch circuit 54 generates the first length code "J'-".
8-Latch the load signal in response to the Nagaba code detection signal M TJ. At this time, the length code test 1 old ti number MT is supplied to the inverter 32, so the output signal of the inverter 32 becomes 90, and the counting operation of the counter is temporarily stopped. .

Thereafter, at a time delayed by approximately 3 bit times of the clock signal φ from the time when the start signal ΔS T it T is generated, the start signal 48 ΔS TR from the OR gate 55 is delayed.
A three-stage D-flip-flop 56, which is manually adjusted and timed by the clock φ, generates a slow sail signal ΔDPLS.

This slow sail signal ΔDPLS is passed through the OR gate 34 to the AN
Since the D gate 36 is made conductive, the counter 38 becomes A again.
The clock signal φ from the ND gate 36 is divided. Therefore, the key code data and length code data corresponding to the second melody sound are sequentially read out from the memory 14, and in response to this, the identification code detection circuit 40 outputs the key code detection signal MK and the length code detection signal MK. ML is generated sequentially. The key code detection signal MK at this time causes the latch circuit 42 to transfer the first melody key code signal between similar latch circuits, and causes the latch circuit 42 to latch the second melody key code signal. Further, the length code detection signal ML at this time causes the latch circuit 54 to transfer the first melody note length code signal between similar latch circuits, and causes the latch circuit 54 to latch the second melody note length code signal. Furthermore, as in the previous case, the IT number operation of the counter 38 is temporarily stopped via the inverter 32.

Since the melody key code signal MKO corresponding to the second melody tone from the latch circuit 42 is supplied to the display section 44, the key press corresponding to the second melody tone is displayed on the display section 44 as before. Also, at this time, the melody key code signal MKC! corresponding to the first melody sound from the latch circuit 58! / is supplied to the automatic melody sound signal forming circuit 62, so this circuit 62 is supplied with the enable signal KN from the AND gate 64 which is conductive with the performance mode signals PLA and Y in response to the turning on of the sound generation select switch SW2. , electronically synthesizes a melody sound signal compared to the melody key code signal MKO',
It is supplied to a speaker 68 via an output amplifier 66. Therefore, the first automatic melody sound is output from the speaker 68 with a delay of one tone in line with the key depression display.

On the other hand, the melody note length code I corresponding to the first melody note from the launch circuit 60 has the number M L G in the comparison circuit 72 .
One comparison input is supplied to the comparison circuit 72, and 1 is supplied to the count output from the tempo counter 74 as the other comparison input of the comparison circuit 72. Here, the tempo counter 74117
A, N from the tempo oscillation circuit 78 after being reset in response to the start signal ΔS TRT from the 1OR gate 76
Since the tempo clock signal TCL supplied via the D gate 79 is counted, the comparator circuit 72
generates a match signal EQ when the count value of the counter 74 reaches a value corresponding to the note length indicated by the first melody note length code signal MLG.

At this time, the coincidence signal EQ causes the entire counter 74 to be reset via the OR gate 76, so that the counter 74 receives the tempo clock signal T again after being reset.

Count L. Also, the coincidence signal KQ is the length code detection 4.
AND game conductive by m number ML) OR from 80
The counter 38 resumes counting the clock signal φ from the AND gate 36. Therefore, the key code data and length code data corresponding to the third melody tone are sequentially read out from the memory 14, and the latch circuits 58 and 42
A second melody key code signal and a third melody key code signal are latched, respectively, and the second melody note length code signal and the third melody note length code signal are respectively latched in the latch circuit (a) and 54. is latched (13). Therefore, the automatic melody sound signal forming circuit 62 forms a melody sound signal corresponding to the second melody sound,
The display section 44 displays a key press corresponding to the third melody tone, and the comparison circuit 72 measures the note length of the second melody tone.

Then, the operations described in section 2 are repeated in the same manner, thereby performing an automatic key press display based on the data stored in the memory 14 and an automatic performance of a melody note delayed by one note with respect to this display. be done.

It should be noted that the final code data is finally read out from the memory 14, and in response to this, the job code detection circuit 40 generates the final code detection signal FN. This end code detection signal F
Since N resets the flip-flop, the performance mode -q P L A Y becomes 10, and memory 1
A series of data reads from 4 are completed.

The key switch circuit 82 includes a large number of key switches respectively linked to a large number of keys on the keyboard (N), and the manual performance sound signal forming circuit 82 outputs the pressed key No. 48 indicating the pressed key.
It has been around for a long time to supply. Mania/+, 4
) The performance sound signal forming circuit 84 electronically synthesizes a melody sound signal corresponding to the pressed key in response to the key press signal from the key switch circuit 82 and supplies it to the speaker 68 via the output amplifier 66. . For this reason, a manually played melody sound is also required from the speaker name.

In this case, if the player learns to play manually on the keyboard 50, he or she can effectively practice playing while listening to the above-mentioned automatic performance sound and/or watching the automatic key press display by the light emitting element group 52.

In such performance practice, automatic accompaniment of chords or bass notes and/or automatic rhythm accompaniment as described below can be used as appropriate.

In the accompaniment data reading circuit, the input signal of the inverter 86 is 10 when the start switch SWo is turned on.
Therefore, the output signal of the inverter 86 = '1' is O
It is supplied to the AND gate (A) via the R gate 88. Therefore, when the start switch SWo is turned on and the performance mode signal PLAY-Y'1 is generated, A
A clock signal φ is supplied from ND gate 90 to address counter 92 .

When the address counter 92 is reset by the start signal ΔEITRT, it supplies the read address signal RAD corresponding to the first read address as the input B at the selector's turn. At this time, the selector circuit adds the selection signal As
2-ゝゝ0〃 is in the state of selecting input B, and the It output address signal RAD corresponding to the first read address, -
i is supplied to the accompaniment data memory 16. Therefore, the first key tone code data is read out from the memory 16,
The signal is supplied to an identification code detection circuit 94. The identification code detection circuit 94 detects the first key tone code and supplies the key tone code detection signal KTM'f to the latch circuit 95 as a load signal. Abiref No. 14 RADz corresponding to the first read address from is latched.

1. Since the key tone code detection signal KTM' at this time is also supplied to the latch circuit 97 as a load signal, the latch circuit 97 adjusts the count output of the autorhythm counter 99 according to the load signal at this time. Latch. Here, since the counter 99 is configured to count the tempo clock signal TCL after being reset in response to the start signal Δ5TRT, the latch circuit 97 starts counting the tempo clock signal TCL when the first key tone code detection signal KTM' is generated.
The count output corresponding to count value 0 from 9 is latched.

Next, when the counter 92 counts the clock signal φ from the AND gate (a) by 1, the key code data corresponding to the first accompaniment tone is read out from the memory 16, and the identification load signal of the upper 2 bits of the key code data is read out from the memory 16. The remaining 6-bit accompaniment key code (chord type code and root note code) signals are supplied to the chord detection circuit 94 and to a latch circuit 96' which is timed by the clock signal φ.

The identification code detection circuit 94 generates a key code detection signal AKi in response to the first key code data from the memory 16, and the latch circuit % generates the first accompaniment key code signal in response to this key code detection signal AK (17). Tsuchi.

Thereafter, when the counter 92 counts the next clock signal φ, the length code data corresponding to the first accompaniment tone is read out from the memory 16 in the same manner as the 611th time. Of the data output at this time, the upper 2 bits of the identification code signal are supplied to the identification code detection N path 94, and the remaining 6 bits of the moxibustion code length code signal are fed to the latch circuit 98 which is timed by the clock signal φ. Supplied. Then, the identification code detection circuit 9
4 generates length code detection No. 11 AL in response to the first length code data from the memory 16, so the latch circuit 98 generates the first accompaniment note length code Y'' in response to the length code detection signal AL. Latch. The length code detection signal AL at this time is supplied to the inverter 86.

Therefore, the ltl force signal of inverter 86 is k(Q I
becomes AND gate 90 through ○R game 1-88 f
becomes non-conductive. Therefore, the HV number operation of the counter 92 is temporarily stopped.

After this, the aforementioned delayed signal ΔDPLIS is applied to the OR gate 88.
(18) The counter 92 counts the clock signal φ from the AND gate 90 again. Therefore, the key code data and length code data corresponding to the second accompaniment tone are sequentially read out from the memory 16, and in response to this, the identification code detection circuit 94 outputs the key code detection signal AK and the length code detection signal AK. A and L are generated sequentially.

The key code detection signal AK at this time causes the latch circuit 96 to transfer the first accompaniment key code signal to a similar latch circuit 100, and also causes the latch circuit 96 to latch the second accompaniment key code signal.

At this time, the length detection signal AL causes the latch circuit 98 to transfer the first accompaniment note length code signal to a similar latch circuit 102, and causes the latch circuit 98 to latch the second accompaniment note length code signal. Further, as in the previous case, the counting operation of the counter 92 is temporarily stopped via the inverter 86.

As a result of the second operation, the latch circuit 100 starts to send out the first accompaniment key code signal AKO, and the latch circuit 102 starts to send out the first accompaniment note length code signal ALU). Then, this first accompaniment note length code signal ALG is supplied to the comparison circuit 104, and is compared with the count output of the tempo counter 106 with 2. here,
After the tempo counter 106 is reset by the start signal Δ5TRT from the OR game 108, the tempo clock signal TC'' k tl is generated. When the value corresponding to the note length indicated by the note length code signal ATJG is reached, -crest +3EQ is generated.

The coincidence ih'i E Q at this time is the OF gate 108
Since the counter 106'<reset is reset via the counter 106', the counter 106 counts the 71 seconds of the reset and the tempo clock signal TOTJ. - Since the crest code EQ is supplied to the AND gate (A) via the OR gate 88 from the AND gate 110 which is connected to the length code detection A by the number AL, the counter 92 is connected to the AND gate (A). Resume the division of the clock signal φ from the gate (a). Therefore, the key code data and length code data corresponding to memo IJ 1G to U, the third accompaniment note are read out in sequence, and the latch circuits 100 and 96 receive the second accompaniment key code signal and the third accompaniment note, respectively. The accompaniment key code signal is latched, and the latch circuits 102 and 98 receive 2 C each.
The number II accompaniment note length code signal and the third accompaniment note length code signal are latched. As a result, the latch circuit 100 sends out the 1.2nd accompaniment key code Shingetsu AKC (Z), and the latch circuit 102 sends out the second accompaniment note length code signal ALG. , the comparison circuit 104 measures the note length of the second accompaniment tone. Then, as the above M[2 operation is repeated in the same manner, accompaniment data is successively outputted from the memory 16, so that the accompaniment key code signal ANC is sent out one after another from the wrap circuit 100. . Note that the data readout 2 from the memory 16 ends before the end data is read out from the memory 14, and the counter 92 reads out the end data from the memo January 4 and outputs the performance mode signal PLA.
When Y returns to the controller, the counter 38 stops advancing at the same time.

The accompaniment key code signal +3AKC sent from the accompaniment data successive output circuit A as described above is supplied to the automatic accompaniment tone signal forming circuit 112. The automatic accompaniment sound signal forming circuit 112 has an AND gate 1 which is conductive in the performance mode Shingetsu PLAY.
When the enable signal EN is supplied from 14 in response to the activation of the sound generation select switch SW3, an accompaniment tracking signal is electronically synthesized based on the accompaniment key code signal AKO and rhythm selection data (not shown). As accompaniment tone signals, a chord signal corresponding to a plurality of chord constituent tones and a bass tone signal suitable for the chord and rhythm to be generated are generated. Then, the transmission timing of each accompaniment sound signal from the automatic accompaniment sound signal forming circuit 112 is controlled in conjunction with the rhythm according to the accompaniment timing signal AT from the rhythm pattern generation circuit 116 which receives the count output of the counter 99 as input. [il
Accompaniment sound signal C2 output amplifier 66 f from circuit 12
... is supplied to the speaker. Therefore, the first automatic accompaniment tone is also emitted from the speaker 68.

The rhythm pattern generation circuit 1 is arranged to generate a rhythm pattern signal RPi in addition to the accompaniment timing signal AT described above according to the count output of the counter 99, and this rhythm pattern signal RP is sent to the rhythm sound source circuit 118. Supplied. Rhythm sound source circuit 1.18 is rhythm pattern signal RP
The rhythm sound signal is generated by driving an appropriate rhythm sound source according to the timing, and this rhythm sound signal is also supplied to the speaker 68 via the output amplifier 66. Therefore, the speaker 68
An automatic list of sounds will also be provided.

Despite the above, 1, each melody key press on the keyboard 50 is 46 notes.
This operation is performed smoothly in synchronization with automatic melody playback, but for example, if the practitioner becomes confused and does not press a key within a certain period of time, the melody and accompaniment (chords, bass, and rhythm) will change automatically. Automatic performance and automatic key press display are temporarily stopped, and the file I/O to which the key was pressed is displayed.
The automatic performance and automatic key press display are resumed by returning to the first note (key tone) of -. Here, a phrase refers to an automatic performance section from a certain key tone to the note immediately before the next key tone.

Next, the first phrase will be explained as a representative example of the operation in such a case. When the keytone code data corresponding to the first key (-) is read from the memory 14 and ]6, the latch circuit 41 transfers the address signal RAD corresponding to the first read address to the latch circuit as described above. 95 are address signals RA and I corresponding to the first read address.
)2, latch I! -IJ path 97 latches the count output corresponding to the count value O from the counter 99, and thereafter automatic performance and automatic key press display proceed. Here, No. 1
51. It is assumed that the first phrase corresponds to the first and second measures, and that the practitioner was unable to press the key corresponding to the first note of the second measure.

The counter 120 increments the tempo clock signal TOIJ by nl after being counted by the start day number Δ5TRT from the OR gate 122.
- generates the key-on signal +, AKO in response to the key press signal from the key switch circuit 82, this signal AKO
It is set to be reset by . For this reason,
Counter 120? J: Tempo clock signal T after being reset by the key press corresponding to the last note of the first measure
When counting the CL and the key corresponding to the first note of the second measure is not pressed for a certain period of time even if the key is pressed when it should be pressed, an AN that takes the count output of the counter 120 as input.
D gate 126 generates an output signal -1. This output signal =N1 sets the R-S flip 70 knob 130, which had been reset by the start signal ΔSTRT, via the OR gate 128, so the output Q of the flip-flop 130 becomes Q1. This output Q=
ts 1 tt makes AND gate 79 non-conductive via inverter 132 . Therefore, transmission of the tempo clock signal TOL from the AND gate 79 is prohibited.

Further, the output Q=vll// of the flip-flop 130 is supplied to a differentiating circuit 134, and is differentiated at the rising edge in synchronization with the clock signal φ, thereby converting it into a stop signal ΔPAUS. This stop signal ΔPAUS sends an address signal RAD corresponding to the first read address from the latch circuit 41 to the counter A, an address signal RAD2 corresponding to the first read address from the latch circuit 95 to the counter 92, and an address signal RAD2 corresponding to the first read address from the latch circuit 95 to the counter 09. The count data corresponding to the count value O from the latch circuit 97 is preset, and the OR
The tempo counter 74 is reset through the gate 76 and the tempo counter 10 is reset through the OR game 1-108.
6 is reset. Then, the counters 38 and 92 are set to the start signal Δ5TRT occurrence 11. Similarly to lJ, the first keytone code data is output from the memories 14 and 16 in response to the tree reset, and in response, the latch circuits 41 and 95 output the address signal RAD corresponding to the address of the first M''. , and RA, J)2 are respectively latched.Furthermore, the latch circuit 97 includes a counter 9.
In accordance with the preset of 9, the count output corresponding to the d1 numerical value OK is latched.

Next, counters: 38 and 92 or No. 1. When the clock signal φ is counted by 2, data corresponding to the first melody is latched in the latch circuits 42 and 54, and data corresponding to the first accompaniment tone is latched in the latch circuits 5)0 and -)8. Latched. Then, the three-stage D-flip-flop 56 receives the stop signal ΔP from the OR gate 55.
When a delay signal 1DPLS is generated by delaying AUS by 3 bit times of the clock signal φ, data corresponding to the first melody sound is stored in the latch circuit 58 and the mark, and data corresponding to the first melody sound is stored in the latch circuits 42 and 54 in the same way as described above. The data corresponding to the second melody sound is sent to the latch circuits 100 and 1.
Data corresponding to the first accompaniment tone is latched in 02, and data corresponding to the second accompaniment tone is latched in the latch circuits 96 and 98, respectively.

In such a state, after automatic performance and automatic key press display are temporarily stopped, if you press any key between the keys, the OR gate 12
4 generates any key-on signal AKO, and this signal AK
O causes counter 120 to be reset via OR gate 122. At this time, D-
Since the flip-flop 136 supplies the output Q;ul# of the flip-flop 130 to the AND gate 138 and makes it conductive, the any-key-on signal AKO from the OR gate 124 is passed through the AND gate 138i, and further to the OR gate). 128 to cause flip-flop 130 to be reset. Therefore, the output Q of the flip-flop 130 becomes %QN, and the output signal of the inverter 132 becomes 111,/L. Therefore, the tempo clock signal TCT is sent from the AND gate 79, and automatic performance and automatic key press display are restarted.

The practitioner can practice key presses for the first phrase for one month by referring to the automatic performance resumed in this way and/or the automatic key press display. When the key press practice for the first phrase is completed, the latched contents of the latch circuits 41.95 and 97 are updated to correspond to the second key tone code at the beginning of the second phrase. Here, if the key corresponding to a certain note belonging to the second phrase is not pressed for a certain period of time, the automatic performance and automatic pressing will return to the first note (key tone) of the second phrase in the same way as described above. The key display is restarted, and the same operation is performed for the third and subsequent phrases.

In the above embodiment, a key tone code is included in a series of performance data in order to make it possible to memorize the return address. The storage of the return address may be commanded in response to a pulse corresponding to. In this case, one phrase always corresponds to one bar.

Even better, when the automatic performance is stopped, the next phrase may be automatically played as a model performance before returning and restarting the automatic performance. In this way, the performance assistance effect is further improved.

As described above, according to the present invention, even if the practitioner becomes confused and stops pressing the keys, the automatic performance will not advance automatically, so the practitioner can practice without waiting for the automatic performance to finish. You can resume practice and practice efficiently. Also, if you set the automatic performance to go back a few notes before restarting, you will be able to understand the flow of the song, making it possible to practice more efficiently.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an electronic musical instrument (29) according to an embodiment of the present invention, and FIGS. 2 and 3 are diagrams showing the formats of melody data and accompaniment data, respectively. DESCRIPTION OF SYMBOLS 10... Musical score, 10a... Recording medium, 12... Score data reading control circuit, 14... Melody data memory, n... Start/stop control circuit, Sae... Melody data reading circuit, 44... Display unit, Seki... Keyboard, 62... Automatic melody sound signal forming circuit, 84...
-Manual performance sound signal formation circuit. Applicant Nippon Gakki Mfg. Co., Ltd. Agent Patent Attorney Toshiaki Izawa/Q^) Figure 2 Figure 3 f. Written amendment to procedure (formality) December 5, 1939 Commissioner of the Patent Office Shima 1) Spring Itsuki Tono-, 1, 41 items displayed Patent FIF Application No. 105272 of 1982 2 Name of invention Electronic musical instrument 3 Relationship with the supplementary ministry case No. (407) Nippon Gakki Mfg. Co., Ltd. Representative Yojo Gen - 4, Agent 302 Room 5, Motobashi Building, 1-21-1 Tabata Shinmachi, Kita-ku, Tokyo 114, Japan Date of amendment order November 5, 1982 day (shipment date)
(November 1981) 6. In column 7 of the detailed description of the invention in the specification to be amended, on page 2, line 1 of the detailed description of the amendment, there is a ``false description of the invention.'' , "Details of the invention tf5i', amended to EIJ-IJ."

Claims (1)

[Scope of Claims] 1. A keyboard, first musical tone generation means for generating musical tones corresponding to key presses on the keyboard, a storage device for storing performance data, and sequentially storing the performance takes from the storage device. a readout circuit that reads the performance data, a second musical tone generation means that generates a musical tone corresponding to the performance data read out by the readout circuit; An electronic musical instrument characterized by comprising a control circuit that controls take reading by the circuit. 2. In the electronic musical instrument according to claim 1,
The electronic musical instrument is characterized in that the control circuit is configured to control the readout circuit so that when it is detected that no key is pressed on the keyboard for a certain period of time, the readout circuit returns the data readout address and resumes data readout. .