JPS587191A - Electronic musical instrument - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] The present invention relates to an electronic musical instrument equipped with an automatic performance device,
By variably controlling the degree of follow-up of the tempo of automatic performance with respect to the tempo of manual performance, tempo follow-up i4t control is implemented in accordance with the skill level of the performer and the content of the music.

Currently, there is no known electronic musical instrument that is equipped with an 11-key 111-cut instrument that automatically generates a syllable or indicates a key press based on recorded data. Size/ζ, for electronic musical instruments like this ↓・
There have already been several proposals to set the tempo of automatic performance to follow the tempo of manual performance on the keyboard.

However, according to the tempo follow-up control force formula of ShiT,
The tempo of automatic performance follows the tempo of manual performance with a certain degree of follow-up, so you can adjust the degree of follow-up as appropriate depending on the skill level of the performer and the content of the song. I was not able to do the 9 things I enjoyed.

Therefore, the purpose of this invention is to provide a novel musical instrument that can perform tempo tracking control by changing the tempo tracking depending on the proficiency level of the musical instrument and the content of the music. .

The electronic musical instrument according to the present invention is provided with a means for generating tempo follow-up degree designation data, and is configured to cause the tempo of automatic performance to follow the tempo of manual performance at the degree of follow-up specified by the tempo follow-up degree finger/foot data. This invention will now be described in detail with reference to the accompanying drawings.

FIG. 1 shows an electronic musical instrument equipped with an automatic performance device 6 according to an embodiment of the present invention.

The musical score 10 has a recording medium 1 such as a magnetic tape in its lower margin.
0a is pasted, and musical score data corresponding to the musical score content and tempo data indicating a standard tempo are recorded on the recording medium 10a.

The score data reading control circuit 12 reads the score data and tempo data from the recording medium 10a, and reads the tempo data TED.
is supplied to the tempo control circuit 13, while the melody data of the musical score data is transferred to the melody data memory 14 and the accompaniment data to the accompaniment data memo IJ 16 for storage. To control the write address signal WAD11, the command number W
Tl and wT2, address selection signals As and As2 are sent out. The memories 14 and 16 are both HAM (synonym access memories), and are supplied with a corresponding selector circuit 18 and an address I1. The selector circuits 18 and 20 are respectively 71. Address selection signal As
1 and As2, the selector [01IN, 1.8 is selected (*JrjA S 1 is Irj-Mill II, human-powered SA is VX
]// selects input A, and if the selected member Asl is ゝゝ1'', then the open side 1 input SB is set to 61 by the inverter 18a.
input B can be selected. If the selection signal AS2 or ゝも1 is selected, the selector circuit side selects the input when the control human power SA is 11", and if the selection signal AS2 is ^o, it selects the input to the inverter 2.
0a, the one-man SB on the flilJ side selects input B with it l //.

When the music score 10'cc is inserted and set in the reception port of the data extractor included in the music score data reading control side j circuit 12 and the data viewing operation is started, the memory 14 outputs the 1 loading command signal WT.
The memory 14 is supplied with a write address signal +3'wAD from the selector circuit 18 which is in the state of selecting the input A in response to (5) selection AS. Therefore, melody data corresponding to the melody progression of musical score 1.0 is stored in the memory 14 in the format shown in Figure 8F!2.In other words, the melody data written at this time corresponds to the melody tones to be generated. is expressed by a combination of an 8-bit key code KO and an 8-bit length code LNG, and each hemorrhoid-code KO has the pitch name c
As shown in the example for 3, the upper 2 bits are the identification code,
The lower 2 bits are the octave code, the remaining 94 bits are the note code, and the upper 2 bits of each length code LNG are the identification code, as shown in the example for a half note.
The remaining 96 bits are a note length code. Rests are 6 bits I other than the key code KO identification code pit.
After the last melody data is written as 1, all 8 bits are stored in the memory 14 as the end code FMS of gl.The upper two bits of this end code FNS are also identified. It is a code.

r Pa) When the writing of the final code II'N S is completed, the memory J
6 becomes the 1 write mode in response to the write command No. 1 WT,
A store address signal WAD is supplied to the memory 16 from a selector circuit chain which selects the input A in response to the selection signal As2. Therefore, accompaniment data corresponding to the progression of the accompaniment of the music filQ (lily chopsticks or bass tones) is written in the memory 16 in a format as shown in FIG. 3. That is, the accompaniment data written at this time expresses the chord to be generated by the combination of the 8-bit key code K (j and 8 pitches) and the pressed code LNG, and each key code KO is a C major (CM ), the upper 2 bits are the identification code, the last 2 bits are the chord code, and the remaining 94 bits are the root note code. Here, the chords for chords are ``00'' for mejia, ``01'' for minor, and ``10'' for sevenths.

- Each length code LNG in the ma/ko and accompaniment data is 2
As shown in the example of the diacritic dial, the upper two bits are the identification code, and the remaining six bits are the note length code.

(7) After a series of data read/write operations like above n[;
Star) switch S similar to start/stop control circuit
Turn on Wo to turn off the melody data reading circuit and operate all the accompaniment data reading and output circuits. That is, when the start switcher SWo is turned on, the month when it is turned on is determined by the differentiating circuit 28.
The rising edge of the system clock signal φ is differentiated at the same time as the system clock signal φ, and converted into the start signal ΔST RT (/imi).

Then, since the start signal Δ5TRT4j: R-S flip-flop 7'30-i is set, the flip-flop 30 sends out the play mode signal PLAY consisting of its output Q-\\1. At this time, the inverter 32
The input signal of is %Q//, inverter 3
The output signal of 2 = A1 is ANDed through the OR gate 34.
It is supplied to the gate 36. Therefore, when the performance mode signal P TJAY-\1 is generated, the AND gate 36 becomes conductive and supplies the clock signal φ to the address counter 38.

The address counter 38 is the start signal ΔS T RT
When reset by (8), the read address signal RA Dl corresponding to the first read address is supplied to the selector circuit 18 as input B. At this time, the selector circuit 18 is in a state of selecting the ρλ input by the selection signal A S,=LLOI, and supplies the read address signal RAD corresponding to the first read address to the memory 14 . Therefore, one piece of key code data corresponding to the first melody sound is output from the memory 14, and the upper two bits of the identification code signal are sent to the identification code detection circuit 40 as the melody key of the remaining six bits. The code (octave code and note code) signals are respectively supplied to latch circuits 42 which are clocked at 17 and 1 o'clock by the clock signal φ. Generates the detection signal MK and detects the key code of the latch circuit 42 Signal MK
Latch the first melody key code signal accordingly.

Then, the melody key code from the latch [+-1 path 42 (No. i MKCiJ, 9 to section 44) is supplied.

The display section 44 displays the melody key code signal MKC.
A display control circuit 46 is provided, which receives an enable signal from an AND gate 48 which is in the two-way i- state in response to the performance mode signal P LAY in response to input of the display select switch SW1. 1iiN is ■
(If supplied, the light-emitting elements in the light-emitting element group 52 provided along the key arrangement of the keyboard 50 are selectively lit.
The keys to be pressed are clearly displayed. For this reason, when the first key [J key code inertia-', 3MKO indicates the note name C3 as in the example shown in FIG.

Corresponding to the first melody sound as shown in F, after the key press sequence is started, the counter 38 inputs the clock signal φ to i￥1.
- Then, the length code data corresponding to the first melody tone is read out from the memory 14 in the same way as the previous time.

Among the read data at this time, the 2-bit identification code Tsukudatsuki is supplied to the identification code detection circuit 40, and the remaining 6 bits are supplied to the identification code detection circuit 40.
Pitt's melody note length code number is supplied to a latch circuit 54 which is timed by a clock φ. Then, the identification code detection circuit 40 generates the length code detection signal ML according to the first length code data from the memory 14, so the latch circuit diagram generates the length code detection signal ML according to the first melody ladle length code signal. Latch accordingly. Further, since the length code detection number 4F4 ML at this time is supplied to the inverter 32, the output signal of the inverter 32 becomes 1\O, and the counting operation of the counter 38 is thereby temporarily stopped.

Thereafter, at a time delayed by approximately 2 bit times of the clock signal φ from the time when the start signal Δ5TRT is generated, the two-stage D-7 lip 70 knob 56, which is timed by the clock signal φ, receives the restart signal ΔEITRT'. Occur. This 4Q start Δ5TRT' makes the AND gate 36 conductive through the OR gate 34, so the counter 38
counts the clock signal φ from N1+AND gate 36. Therefore, the key code data and length code data corresponding to the second melody sound are sequentially read out from the memory 14, and in response to this, the identification code detection circuit 40 outputs the key code detection signal MK and the length code detection signal MK. ML is generated sequentially. The key code detection signal MK at this time causes the latch circuit 42 to transfer the first melody key code signal to a similar latch circuit 58, and causes the latch circuit 42 to latch the second melody key code signal. Further, the length code detection signal ML at this time causes the first melody note length code signal to be transferred from the latch circuit 5.1 to a similar latch circuit, and also causes the latch circuit 5.
1 to latch the second melody mark length code signal, and further, as in the previous case, the counting operation of the counter is temporarily stopped via the inverter 32.

Since the melody key code signal MKC corresponding to the second melody tone from the latch circuit 42 is supplied to the display section 44, the key press corresponding to the second melody tone is displayed on the display section 44 as before. At this time, the melody key code signal MK C1 corresponding to the first melody sound of the latch circuit Akara is the automatic melody note formation circuit 6.
2, this circuit 62 receives the performance mode signal P
When the enable signal KN is supplied from the AND gate 64, which is conductive at LAY, in response to the activation of the sound generation select switch 5W20, the melody key code signal MKC! '
Accordingly, the melody transmission → zu is synthesized in accordance with the output signal and is supplied to the speaker 68 via the output amplifier 66. Therefore, the first automatic melody sound from the speaker 68 is played one tone later than the key press display.

- The melody note length code signal MLG corresponding to the first melody note from the latch circuit 60 is a tempo control circuit];
3 will be introduced. As will be described later with reference to FIG. 5, the tempo side 3 circuit 13 receives melody note length code signals MLG,
Melobi Key Code No. 18 MKO.

Key code FOi number KKO based on key presses, tempo data T
ED, performance mode signal '+4PLAY and start signal Δ
Tempo clock signal TCL based on S 'I' RT
After the melody note length code signal MLG corresponding to the first melody tone is supplied from between the latch circuits, the signals MKC and pKK regarding the second melody tone are generated.

When a key is pressed so that the key codes match, the first control information NEXT is generated. The read control signal NEXT at this time is the length code detection signal M
AND game conducted by L) 80 to OR game I
34 to the AND gate 36 so that the counter 38 resumes the argument of the clock signal φ from the AND gate 36. Therefore, the key code data and length code data corresponding to the third melody tone are sequentially read out from the memory 14, and the latch circuits 58 and 42 receive the second melody key code signal and the third melody key code signal, respectively. The code signal is latched, and the second melody code length code signal and the third melody code length code signal are latched between the latch circuits and 54, respectively. Therefore, the automatic melody sound signal forming circuit 62 forms a melody sound signal corresponding to the second melody sound, the display section 44 displays a key press corresponding to the third melody sound, and the tempo control circuit 13 produces a melody sound signal corresponding to the second melody sound. read control signal NF
Operations are performed to generate OXT. The above-mentioned operations are repeated in the same manner, thereby performing an automatic key press display based on the data stored in the memory 14 and an automatic performance of a melody tone delayed by one note with respect to this display.

It should be noted that the final code data is finally read out from the memory 14, and in response to this, the identification code detection circuit 40 generates the final code detection signal FN. This end code detection signal F
Since N causes the Nori-Ruff flop 30 to be reset, the playlist signal PLAY becomes 11Q/1, completing a series of data transfers from the memory 14.

The key switch circuit 82 includes a large number of key switches each linked to a large number of keys on the keyboard 50, and sends key code No. 18 KKO indicating the pressed key in the form of a manual performance sound signal. :! llll! 1'i8/1 and the aforementioned tempo control circuit 13. The manual performance sound signal forming circuit 84 also electronically forms a melody sound signal corresponding to the key pressed in accordance with the key encoding -Q K K O from the key switch circuit 82 , and outputs it to the output amplifier 66 .
The signal is supplied to the speaker 68 via. Therefore, a melody sound manually played is also played from the speaker open.

In this case, if manual performance practice is performed between the keys, efficient performance practice can be performed while listening to the above-mentioned automatic performance sounds and/or while viewing the automatic key press display by the light emitting element group 52.

In such performance practice, automatic accompaniment of chords or bass notes and/or automatic rhythm accompaniment as described below can be used as appropriate.

In the accompaniment data reading circuit, the input signal of the inverter 86 becomes 0 when the start switch SWo is turned on.
Therefore, the output signal -11 of the inverter 86 is O
R gate 88'f: Supplied to the AND gate (a) via. Therefore, when the start switch SWo is turned on and the performance mode (m number PLAY=gtt is generated), the clock signal φ is supplied from the AND gate Kasumi to the address counter 92.

When the address counter 92 is reset by the start signal ΔS TRT, it supplies the read address signal RAD2i corresponding to the first read address as an input B to the selector circuit. At this time, the selector circuit side receives the selection signal AS
2-10 is in the state of selecting input B, and the read address signal HAD2-ji corresponding to the first read address
7 accompaniment data memory 16. Therefore, the key code data corresponding to the first accompaniment tone is read out from the memory 16, the upper 2 bits of which are sent to the identification code detection circuit 94, and the remaining 6 bits of the accompaniment key code (chord type code and The root chord) signals are each supplied to a launch circuit 96 that is timed by a clock signal φ.

The identification code detection circuit 94 generates a key code detection signal AK in response to the first key code data from the memory 16, and the latch 1v]1 path 96 generates this key code detection signal AK.
latches the first accompaniment key code signal according to

After this, the counter 92 counts the clock @ number φ.
Then, the length code data corresponding to the first accompaniment tone is read out from the memo January 6th in the same manner as in the AiI episode.

Of the read data at this time, the upper 2 bits of the identification code signal are supplied to the identification code detection circuit 94, and the remaining 6 bits of the accompaniment note length code 1 are supplied to the clock signal (17).
The signal is supplied to a latch circuit 98 which is timed by the +++ signal φ. Since the identification code detection circuit 94 generates the length code detection signal AL in accordance with the first length code data from the memory 16, the latch circuit 98 generates the length code detection signal AL according to the first accompaniment note length code signal. Latch accordingly. I, the length at this time is
- code detection signal A]J is supplied to the inverter 86.

Therefore, the output signal of the inverter 86 becomes 0 (I)
, the AND gate 9o is made non-conductive via the OR gate 88.

Therefore, the counting operation of the counter 92 is temporarily stopped.

After this, the aforementioned ladle start signal Δ5TRT' is applied to the OR case.
Since A IJ D gate) 90 is made conductive through 1.88, counter 92 again counts the clock signal φ from AND gate) 90. Therefore, from memory 16, 2
The key code data and length code data corresponding to the th accompaniment tone are sequentially read out, and in response to this, the identification code detection circuit 94 sequentially generates the key code detection signal AK and the length code detection signals A and L. . The key code detection signal AK at this time causes the latch circuit 96 to transfer the (18) first accompaniment key code number I to a similar latch circuit 100, and causes the latch circuit 96 to latch the second accompaniment key code signal.

The output signals A and L at this time transfer the first accompaniment note length code data from latch circuit 08 to latch circuit 1.02, which is similar to this, and also transfer it to latch circuit 1lii'198. 2M'1st accompaniment I1 chord I M
Then, as in the previous case, the counting operation of the counter 92 is stopped at -fL via the inverter 86.

As a result of operation 1, the first accompaniment key code signal AKO is transmitted from the latch ()1 path 100.
1.7.3 First accompaniment note length chord 4 from latch circuit 102
No. 8 ALG sends out t', uh (〃'-naru.) Then, the first accompaniment in this country, tη major chord-1 (F3 'S'i
A L G is supplied to the comparator circuit 104 and softened by the itt number output ratio of the tempo counter 106 . here,
The tempo counter 106 is reset by the start number ΔST RT from the OR group 1-108, and then receives the tempo clock signal TOL'(f) from the tempo control circuit 13.
: Since the number is n-1, the comparison circuit 10
・J corresponds to the note length indicated by the first accompaniment note length code (L G), and when the count value of the counter 1()6 reaches this value, a matching number 1 f5 Q is generated.

Since the match 1 at this time is reset by the No. 9 EQ via the OR group 1-108, the counter 106 is reset.
06 is the reset pin 1 and tempo clock signal T.
CL number is higher. That's too sweet. Match A1-1 EQ is conductive by the length code detection signal AL.
0 to the AND gate (3) via the OR gate 88, the counter 92 restarts counting the clock number 1h from the AND gate 90. Therefore, the key code data and length code data corresponding to the accompaniment tone of the third tone are sequentially read out from the memory 16, and the accompaniment key code signal of the second tone [I and the length code data of the third tone are stored in the latch circuits 100 and 96, respectively. The second accompaniment key code signal is latched, and the second accompaniment note length code signal and the third accompaniment note length code (No. 8) are latched in the latch circuits 102 and 98, respectively. is 2
At the same time as the synthetic accompaniment key code signal AKO is sent out,
←12th accompaniment note length code signal from latch circuit 102
QALG is now transmitted, and the comparison circuit 104 measures the note length of the second accompaniment tone. And like above! Since the accompaniment data is read out one after another from the memory lJ]6 as the I1IJ composition is repeated in the same manner, the accompaniment key codes No. 18 A and KO are sent out one after another from the latch circuit ii3 Zoo. Ru. In addition, data city from memory 16? 1 output is memory 1
When the end data is read out from Memo 4 to MiJ, the counter 92 starts the step similarly to the counter 38 when the end data is output from memo January 4 and the play mode signal -qPLAY crosses ゝゝ0〃. The accompaniment key code (knee 3'+-iA, KO) sent out from the accompaniment data reading circuit 26 as described above is supplied to the automatic accompaniment sound signal forming circuit 112. Automatic accompaniment sound @ The number forming circuit 112 generates the accompaniment key code IHA number AKO and the accompaniment key code IHA number AKO when enable -QEN is supplied from the AND gate 114 which is conductive in the play mode coarse portion PLAY to the sound 1 as soon as the select switch SW3 is turned on. The accompaniment tone signal is electronically synthesized based on the rhythm selection data that does not match the accompaniment tone signal. It is designed to generate a pace sound signal. Then, automatic accompaniment sound signal forming circuit 1
The transmission timing of each accompaniment sound signal from 12 is based on the accompaniment timing signal AT from rhythm pattern generation circuit 116.
The accompaniment sound signal from the circuit 112 is supplied to the speaker 68 via the output amplifier 66. Therefore, the automatic accompaniment sound is also emitted from the speaker 68.

The rhythm pattern generation circuit 116 is configured to generate a rhythm pattern signal RP in addition to the accompaniment timing signal AT described above according to the tempo clock signal TOL from the tempo control circuit 13, and this rhythm pattern signal RP is generated by the rhythm sound source circuit. 118. Rhythm sound source circuit 11
Reference numeral 8 generates a rhythm sound signal by driving an appropriate rhythm sound source according to the rhythm pattern signal RP, and this rhythm sound signal is also supplied to a speaker 68 via an output amplifier 66.

Therefore, the automatic rhythm sound is also emitted from the speaker.
2) I can do it.

Figure 4 shows an example of the display and performance operations of an electronic musical instrument, where (A) shows the progress of a certain 1) 19, and T] 3) shows the 75 key player. Indicates timing, (C)
indicates the automatic performance timing of the melody and accompaniment. Fourth
According to the figure, it can be clearly seen that the push-down display is one note ahead of the 1-Bll-Me-T1-Day tone. 3. Figure 5 shows the detailed configuration of the Denbo fli control circuit 13. .

The clock 48 d+', t 120 is an Xρ type which generates a first clock signal φI with a 76-bit frequency and a second clock signal φ2 with a low specific frequency, e.g. As such, the frequency of the arrow φl is set to be several times as simple as the frequency of the arrow φ2. The first and second clock signals φ1 and φ2 are supplied to the selector circuit 122 VC as input signals A and B, respectively. Selector circuit 1
22 is R as a selection signal SA for selecting input A.
-When the output Q of the S Noritub flop 124 is supplied.
(Input B is selected in 2. Input B is selected as No. 16 SB.
An inverted signal is supplied.

Before the start signal Δ5TRT is generated, the performance mode signal PTJAY is connected to the inverter 128 and the OR gate 1.
30 Since the flip-flop ``124'' is turned off through the input circuit, the output Qid of the flip-flop 124 is
90〃, and the selector circuit 122 inverts this output Q=ゝゝ0〃 with the inverter 126 to generate a selection signal - bow S.
13-Select a second clock signal φ2 according to the light;
The counter 132 is supplied. The counter 132 counts the second clock signal φ2 and sends the count output to the comparison circuit 13.
4 as one comparison manpower A.

The manual setting circuit 136 is for manually setting the reference tempo as appropriate, and supplies tempo data corresponding to the set reference tempo to the selector jL% 138 as input A. 1, register circuit 1.
40 i, 1. The aforementioned musical score data reading control circuits ll and 12 each
The standard tempo supplied in the form of serial data from
The tempo data TED is stored in the selector circuit 13 in the form of parallel data.
8 as input B. The selector circuit 138 selects the manual setting circuit 136 based on the operation of the select switch SW if the selection signal SA-21 is selected.
If the selection signal 813 is "1", the tempo data from the register circuit 140 is selectively transmitted.

The tempo data from the selector circuit 138 is an arithmetic circuit]4
2) is supplied as 3 and 1~. The arithmetic circuit 142 outputs two signals to the inputs A and B (as shown in the following S1 to S5) and supplies them to the selector circuit 144.

B to B A -1-313 S2-□ -1-B S3-□ 3A + I3 4-- 135=A (25) The selector circuit 144 selects Pl, P2,
One of the output signals S1 to S5 from the performance circuit 142 is selected and transmitted in accordance with the selection signal supplied preferentially in the order of P:3, P4, and P5, and the start signal month Δ
Before the occurrence of 5TRT, the performance mode signal -tt Q l/
The signal which is inverted by the inverter 148 -6111 or o i
Since it is supplied as the selection signal P1 via the t-game 1-150 and the priority circuit 14G, the output signal Sl of the performance circuit 142 (17 tempo data corresponding to the standard tempo) is selected and supplied to the gate circuit 152.

The gate circuit 152 is controlled to be conductive or non-conductive by the output signal Qf of the R-8 flip-flop 154 and the output signal of the inverter 156 which is manually operated. Since the flip-flop 154 is reset through the gate circuit 152, the gate circuit 152 is in a conductive state.

Therefore, the tempo data corresponding to the reference tempo from the selector circuit 144 is sent to the gate circuit 152 and the OR circuit 15.
7k to the comparison circuit 134 as the other comparison human power B.

(9) Comparison circuit 134 compares comparative human power A and B, and when the two match, generates a match signal EQ. This match signal EQ causes the counter 132 to be reset via the D-flip-lock 160, so that the counter 132 counts the reset e7Q and the second clock signal φ2. Thereafter, the same operation is repeated, and the comparison circuit 134 repeatedly generates the coincidence signal EQ at a cycle corresponding to the reference tempo 41~
be done.

Before the start signal Δ5TRT is generated, the output signal of the inverter 162 is 11 ON, and the performance mode signal P is
Since LAY is also 101, the output signal of the NAND gate 164 is air, and the AND gate 166 is NAND.
It is conductive due to the output signal -%1// of the gate 1-1.64. Therefore, the match signal EQi repeatedly generated by the comparison circuit 134 is sent out as the tempo clock signal TCL via the AND gate 166. At this time, the tempo clock signal TOL is supplied to the manual setting circuit 136 described above.
Alternatively, since the tempo data from the register circuit 140 has a frequency corresponding to the reference tempo, the automatic rhythm sound described above is generated at a tempo corresponding to the reference tempo.

Next, when the start signal Δ5TRT is generated, the tempo data from the selector circuit 138 is preset in the latch circuits 168 and 170 as reset data PS in response to the signal ΔS T RT K. Therefore, averaging circuit 172 receives tempo data from latch circuits 168 and 170 as inputs A and B, respectively, and (A+
B)/2 is applied to the average processing and supplied as input A to the arithmetic a circuit 142. In response to the start signal ΔS TRT, the performance mode signal PLAY becomes 1, so the output signal of the inverter 148 becomes OI, and the selection operation of the selector circuit 144 based on the output data of the selector circuit 174 is Become iJ Noh.

The manual setting circuit 176 is used to manually set the tempo follow-up degree as appropriate, and supplies 5-bit tempo follow-up degree designation data corresponding to the set tempo follow-up degree to the selector circuit 174 as input A.

In addition, a ROM (read only memory) 178 stores multiple sets of tempo tracking level designation data that have different temporal change patterns of tempo tracking level, and the manual setting circuit 176 allows ρ to set which set of tempo tracking levels. If you select whether to output the specified data, the key is turned on after the counter 180 is reset by the start signal Δ5TRT.
Every time ON is counted, a selected set of 5-bit tempo follow-up designation data is read from the ROM 178 and supplied as input B to the selector circuit 174. If the selection signal SA is "1" based on the operation of the select switch SW5, the selector circuit 174 selects the manual setting circuit 176.
If the selection signal EIB is v'1', the tempo followability designation data from the ROM 178 is selectively transmitted.

All bits of output data from selector circuit 174 are aQ
/F, the NOR gate 182
Detects the state of and outputs the output signal -%11 to OR gate 150
The selection signal P1 is supplied to the priority circuit 146 via the selection signal P1. Therefore, the selector circuit 144 selectively sends out the output signal 81 (tempo data corresponding to the reference tempo) of the arithmetic circuit 142. '1, selenium (29) Depending on the output data of the evening circuit 174, the selection signals P2, P3,
When P4 or P5 becomes 1#, tempo data corresponding to the output number s2, s3, s4 or S5 of the arithmetic circuit 142 is sent out from the selector circuit 144.

As a result, it becomes possible to change the degree of tempo followability arbitrarily by the manual setting circuit 176 or to change the degree of tempo followability over time using data read from the ROM 178, and furthermore, the manual setting circuit 176 can select a temporal change pattern of the degree of tempo followability. It also becomes possible.

When the performance mode signal PLAY reaches %11, the output signal of the inverter 158 reaches 0, so the flip-flop 154 is released from reset. However, flip-flop 154 receives the first key-on signal N.

Since it is not set until N is generated, gate circuit 1
52 remains conductive until flip-flop 154 is set. Also, the performance mode signal PLAY is set to %I.
Even if the output signal of the NAND gate 164 becomes %QI in the case where the output signal of the inverter 162 becomes s14, the AND gate 166 becomes the NAND gate 16.
By the way, the performance mode signals PT and AY are 111.
//, this signal releases the reset of the counter 188 via the inverter] 84 and the OR gate 186.

Therefore, the counter 188 uses the tempo clock signal TCL.
3 and supplies the divided output to the comparator circuit 190 as one comparison input A, and the other comparison input B of the comparator circuit 190 uses melody note length code signals MI, G and 1
．． Then, the corresponding j7 to the first mefEti note is supplied. Comparison circuit 190 compares comparative human power A and J3 and
(During B, the output signal -9] is supplied to the inverter 162 and the AND game 1-192, and when A=B, the output signal = 1 is supplied to the OR gate 130 and the AND game)
194, 196 and 198, and the R-S flip-flop 200. In addition, when the output signal of A=BK and interest I- becomes ゝゝ1'', the 17+144 force 1 symbol corresponding to A<B becomes ゝゝ0〃, and the output signal of NAND gate]64 becomes ゝゝ. 0, prohibiting the output of the tempo clock signal TCL from the AND gate 166.

The time point at which the comparison circuit 190 generates the output signal corresponding to A=B corresponds to the time point at which the key corresponding to the second melody tone should be pressed. Almost at the same time that the first melody note length code signal MLG is supplied to the comparison circuit 190, the comparison circuit 2
02 is supplied with a melody key code signal MKO corresponding to the second melody sound as one comparison input A. If it is assumed that a key corresponding to the second melody tone is pressed at the time when the comparison circuit 190 generates an output signal corresponding to A=B, the key code signal KKO based on the pressed key is transmitted to the comparison circuit 200. is supplied as the other comparison manpower B. For this reason, the comparison circuit 202 compares comparison human power A and B, and if the key codes match, a match signal R is sent.
Generate Q. This coincidence signal EQ is the key code signal KK.
The differential circuit 21 is connected to the OR gate 206 (which is made conductive by the any-key-on signal AKO from 14, and further through the OR gate 21) 8 which receives the input signal O.
0.

The differentiating circuit 210 differentiates the rising edge of the input signal at this time and generates the first key-on signal KONi. , and then the first read control signal N11 via the OR gate 212.
Sent as iXT. This first reading 114 control signal NEXT causes the counter 188 to be reset via the OR gate 186, so that the counter 188 counts all of its reset signals and tempo clock signal TOL.

Note that when the melody key code MKO corresponds to a rest, the rest detection N path 214 generates a rest detection signal and makes the AIJD gate 194 conductive. Then, when an output signal corresponding to A=, , 13 is generated from the comparison circuit 190, this output signal is supplied to the differentiation circuit 210 via the AND gate 194 and further via the OR gate 208, so that Similarly, a key-on signal KON and a read control signal NEXT are generated.

On the other hand, the second clock signal φ2 sent from the selector circuit 122 is supplied to the variable frequency divider circuit 216, and is frequency-divided by a frequency division ratio corresponding to the note length indicated by the first melody slope code signal MLG. The frequency-divided output signal from the variable frequency divider circuit 216 is supplied to the counter 222 via the AND gate 220 which is conductive due to the output signal of the inverter 218=ゝ]〃, and is counted.

The variable frequency dividing circuit 216 is provided so that the count value of the counter 222 is approximately equal for all notes, and is configured such that the frequency division ratio becomes larger for long notes. The counter 222 receives the first read control signal NEi.
The count data immediately before the reset is latched by the latch circuit 168 in response to the first key-on signal KON. At the same time, latch circuit 1
The preset data latched in 68 is transferred to the latch circuit 170 in response to the first key-on signal KON.
It is latched there. Therefore, the averaging circuit 172 supplies output data obtained by averaging the count data of the latch circuit 168 and the preset data of the latch circuit 170 to the arithmetic circuit 142. In this case, the timing of the key press corresponding to the second melody note coincides with the end of the duration (note length) of the first melody note, so the tempo value indicated by the output take of the averaging circuit 172 is the previous one ()
t: Corresponding to quasi-denbo).

The arithmetic circuit 142 generates the above output data based on the new output data from the averaging circuit 172/S1 to S5.
is supplied to selector circuit 1. As mentioned above, the selector circuit 144 has priority 1r! IA! 81 to 81 in response to one of the selection signals P1 to P5 generated from N 146.
The corresponding signal of S5 is selected and the gate circuit 152
and is supplied to the latch circuit 221. At this time, Kate I
r! ] Path 1.52 ij: Flip-flop 154 is N
A: The first key-on signal KON causes the set to be set, so it is non-conducting, but the latch circuit 224 sets L[1 to the first key-on signal KON, latches the ten botator from the + left circuit 144, and connects the OR circuit. 157 to the comparison circuit 134 as comparison human power J3.

Therefore, the ratio soft circuit 1;14 repeatedly generates the coincidence signal EQ based on the tempo data selected by the selector circuit 144, and the frequency of the tempo clock signal TOL is set by the selector 1[! This corresponds to the tempo indicated by the tempo take selected in step 144. For example, switch S
The selection signal SA-\\1 is generated at W5, and the tempo 31B compliance 1) 1 constant data corresponding to the selection signal P4 is generated from the manual setting time '#1.176.
, the selector circuit 144 selects the output Butatsu 24=(3A+B)/4 of the arithmetic circuit 142, so the frequency of the tempo clock signal 4T OTJ changes from the previous one corresponding to 81-B to the one corresponding to 84. change into something. 'Also,
The switch SW5 generates the selection code STJ=＼＼1, and the counter 180 turns on the first key 8-Q, K.
: Assuming that the tempo following degree designation take corresponding to the selection signal S2 is read out from the R, OM 178 in response to n1 ONs, the selector circuit 144 selects the arithmetic circuit 1.
42 output signal 52=(A+3B)/4, the frequency of the tempo clock signal TOL is the same as the previous S
The value changes from one corresponding to 1=13 to one corresponding to 82.

The above is the operation in the case of a coincident key press in which the timing of the key press corresponding to the second melody note coincides with the last 9 of the duration (note length) of the first melody note. The operation when the key press timing is early or late is as follows.

61 in the case of a quick press key, A from ``Comparison circuit'' 90 (
The first key-on of 7iQ'+3KON sets the flip-flop 124 through the AND gate which is reversely conductive through the output I corresponding to B and 92.

Therefore, the selector circuit 122 has 70 knobs 12
A trace consisting of the output Q = (S] II of 4; the low-speed second clock signal (B) is selected in response to the signal SA, and the high-speed first clock signal φ1 is selected as the substitute 9 for φ2, and the counter 13
2 and the variable frequency divider circuit 216. Therefore, the count of the counter 132 increases, the frequency of the tempo clock signal TCL becomes 800, and the counter 188 increases.
The i-1 number speed is also -1-ke(,. It's a waste. The first key-on +jKON sets the flip-flop 200, so the output Q of the flip-flop 200 is
X]tt is ANDed via D-flip-flop 226
Gate 196 is Hirosada ↓. After this, compare N road 1.9
0 generates an output signal=machi corresponding to A=BK, this output 11-11 becomes the first read control signal N1i through an AND gate 196 and (37) and an OR gate 212.
; Sent as XT. In addition, ratio = + = path 190
The output signal −ゝ1〃 corresponding to A=B from the flip-flop 21. ) reset to 0.

The first read control Ht1 signal NEXT is output by the counter 22.
2 is reset, but just before the reset, counter 2 is reset.
As described above, the division number AiJ of 22 is latched into the latch circuit 1 in response to the first key-on JjKON.

At this time, the count value latched by the latch circuit 1.68 shows a smaller numerical value than in the case of coincident key presses, so it is assumed that The output take from the common averaging circuit 172 also shows a tempo slightly faster than the reference tempo.

Therefore, the output take from the averaging circuit 172 is converted into debo data with a tempo tracking degree corresponding to the output take of the selector circuit 174 in the process of passing through the operator q5 circuit 142 and the selector circuit 1471. It is supplied to the ratio soft circuit 134 via circuit 224.

In this case, the frequency of the tempo clock signal TCL is changed so that the tempo of automatic performance follows the tempo of manual performance at the specified tempo tracking level and becomes faster.
j is controlled.

Next, in the case of a slow key press, when the comparator circuit 190 generates l and output signal month - month in response to A=H, the second clock signal φ2 of low speed is used as described above. The generated tempo clock signal TCL is applied to the AND gate 166.
The counter 188 accordingly stops its division operation. When ON is generated in the first key signal, this signal is 4゛K.
ON is based on the output signal −ゝ\1〃 corresponding to A=B from the comparator circuit 190! J Continuity A N I) Game 1
-198, and then sends out the first drink' through OR game 1-21 and 2 as the tll fli control number NEXT. This resistance side 1 count NEXT resets the counter 222, but the H immediately before the reset
The number 1 data is latched in the latch circuit 168 in response to the first key-on signal KON. At this time, latch circuit 1 (5
Since the nI-number data latched to 8 indicates Hl-number 4n, which is thicker than that in the case of coincident key presses, the averaging circuit 172
The output data also appears to indicate a tempo that is slightly slower than the standard tempo. Then, the output data from the averaging circuit 172 passes through the arithmetic circuit 142 and the selector circuit 144 (and is converted into tempo data having a degree of tempo tracking corresponding to the output data of the selector circuit 17.l, and this tempo data is connected to the comparison circuit 1 via the latch circuit 2274.
34.

Therefore, at the frequency d1 of the tempo clock signal TOL and the specified tempo tracking degree, the tempo of automatic performance is controlled to be slowed down to follow the tempo of manual performance.

Note that if no key is pressed even when the count value of the counter 222 reaches 1.25 times the average value indicated by the output data of the averaging circuit 172, the count data from the counter 222 is transferred to one of the comparison human power A. The comparison circuit 230, which uses the output data from the multiplication circuit 228 that multiplies the output data of the averaging circuit 172 by 1.25 as the external comparison input B, outputs a match signal EQ when both comparison inputs A and B match. Occur. This matching signal EQ is ANDed via an inverter 218.
Since the gate 220 is made non-conductive, the count value of the counter 222 is an average value.

If the average value shown by the output data of the conversion circuit 172 is larger than 1.25 times, J=i,t is not satisfied.

The operation as described above regarding the key press corresponding to the second melody tone d1. For each key press after 3 days
-Sound ゝゝ1〃41. If you set it to "Manual Settings" 18
! The degree of tempo tracking can be arbitrarily set by the 1 path 176, and the selection signal S is selected by the 1 select switch sw5.
B:l: Generates 111// (if set to 7, ROM
The tempo following degree is automatically controlled to change fli based on the read data from 178, and the temporal change pattern of the tempo following degree can be appropriately selected by the manual setting circuit 176. 1Mi, 61 in the embodiment, the averaging circuit 172 is provided to average the manual performance tempo data. On the other hand, the tempo of automatic performance follows very sensitively.
You can do it in JJ.

As mentioned above, if the ``JJ'' is 1, then the degree of follow-up of the tempo of the automatic performance to the tempo of the manual performance (111) is variably controlled, so whether the performer is a beginner or not. Depending on your level of skill, or whether the music to be played is easy or difficult, you can select the optimal degree of follow-up and perform the performance.

Ushita 1ffii The degree of follow-up can be changed over time, so for example, you can set the degree of follow-up low at the beginning of a performance, and increase it as you get used to playing, or change the degree of follow-up when it is easy to play depending on the content of the song. It is possible to play by increasing the frequency and reducing the follow-up effect in areas where it is difficult to play. Furthermore, it is also possible to predetermine the temporal change pattern of the degree of tempo tracking, and to select the most urgent one from among multiple change patterns, which is very convenient for the performer and operator. be.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of Ichiko Eiki according to an embodiment of the present invention. FIGS.
) and accompaniment data format, Figure 4 (Al-
(C1 is a diagram for explaining the display Φ performance operation of the electronic musical instrument, and FIG. 5 is a detailed circuit diagram of the tempo control circuit of the electronic musical instrument. 10... Musical score, 10a... Recording medium , 12... Score data reading control circuit, 13... Tempo control circuit, 1
4...Melody data memory, 22...Start...
Stop control circuit, Sae... melody data reading circuit,
44...Display unit, 50...Keyboard, 136...Reference tempo manual setting circuit, 140...Reference tempo data register circuit, 142...Arithmetic circuit, 176...
Tempo following degree manual setting circuit, 178... ROM for generating tempo following degree specification data. Applicant Nippon Musical Instruments Manufacturing Co., Ltd. Agent Patent Attorney Toshiaki Izawa (43) 614-- Figure 2 Figure 3

Claims (1)

[Scope of Claims] 1. A keyboard, a chestnut sound generator for generating a sound corresponding to a key pressed on the keyboard, a tempo clock generating means for generating a tempo clock signal, and a tempo clock generating means for generating a tempo clock signal, and a tempo clock generating means for generating a tempo clock signal. an electronic musical instrument comprising an automatic performance means that automatically generates a musical tone or indicates a key press based on the data, a data generating means that generates tempo following degree designation data, and a data generation means that generates tempo follow degree designation data and a key pressed from the keyboard. Based on the signal +ii
An electronic musical instrument comprising: a control circuit for controlling the frequency of the tempo clock signal so that the tempo of the automatic performance by the automatic performance means follows the tempo of the manual performance by the keyboard. 2. In the electronic musical instrument according to claim 1,
The electronic musical instrument is characterized in that the data generating means is configured to generate tempo following degree designation data corresponding to the set tempo following degree each time the tempo following degree is manually set. 3. In the electronic musical instrument as set forth in claim 1, the data generation means includes a device for storing tempo following degree designation data corresponding to different tempo following degrees, and this 51L storage. An electronic musical instrument characterized in that it is provided with reading means for sequentially reading out tempo following degree designation data stored in the device n. 4. In the electronic musical instrument according to claim 3,
The storage device stores a plurality of sets of tempo following degree designation data having different temporal change patterns of the tempo following degree, and the mJ readout means determines which set of tempo following degree designation data is to be indulged by manual operation. An electronic musical instrument characterized by being configured to allow selection.