JPS5856315A - Quality information recording mask - Google Patents
Quality information recording maskInfo
- Publication number
- JPS5856315A JPS5856315A JP56154636A JP15463681A JPS5856315A JP S5856315 A JPS5856315 A JP S5856315A JP 56154636 A JP56154636 A JP 56154636A JP 15463681 A JP15463681 A JP 15463681A JP S5856315 A JPS5856315 A JP S5856315A
- Authority
- JP
- Japan
- Prior art keywords
- mask
- information
- patterns
- pattern
- photomask
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Preparing Plates And Mask In Photomechanical Process (AREA)
Abstract
Description
【発明の詳細な説明】
本発明に半導体ウェー八製造用フォトマスクなどに関す
る。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a photomask for manufacturing semiconductor wafers and the like.
従来、フォトマスクの使用に際しては各製造過程に於い
て各7オトマスク毎に必要な情報を用紙に記録し添付す
るか、またはコンビ、−夕管理する場合でも磁気カード
やパンチカードなどt使用し、マスクに添付して各マス
クに関する情報上伝達し読み取っていた。したがって、
用紙やカード類の添付に伴う保管や移動時などの煩雑さ
や不便さがあった〇
本発明は上記従来の欠点を除去し、必要な情報tマスク
基板自体が所有していることt目的とする。そしてその
目的は基体上に複数チップの素子パターンt’ll’1
jlt#に形成させるマスク面の一部分にマスクの品質
情報を表示パター/として!e銀したことt特徴とする
品質情報記録マスクを提供することによって達成される
〇
以下不発明による一実施例を図面により説明するO
第1図は従来のフォトマスクの一例を示し友ものである
o iig 1図(a)Uフォトマスクlであり、その
面にrL複複数案素子パターン2配置されている。Conventionally, when using photomasks, necessary information was recorded on paper and attached to each seven masks during each manufacturing process, or magnetic cards, punch cards, etc. were used when managing the photomasks. The information attached to each mask was communicated and read. therefore,
Attachment of paper and cards causes complexity and inconvenience during storage and transportation.The present invention aims to eliminate the above-mentioned conventional drawbacks and to ensure that the necessary information is owned by the mask substrate itself. . The purpose is to create a multi-chip element pattern t'll'1 on the substrate.
Mask quality information is displayed on a part of the mask surface formed on jlt# as a putter/! Achieved by providing a quality information recording mask having the following characteristics: Hereinafter, an embodiment according to the invention will be described with reference to drawings. Figure 1 shows an example of a conventional photomask. o iig 1 Figure (a) is a U photomask 1, on whose surface an rL multiple device pattern 2 is arranged.
このフォトマスク1を使用して所定の工程処mt−行い
ウェーハ3上VC素子パターンチツプ4を同時に形成す
る〇
なおフォトマスク1には1通常マスクの内容を表わすマ
スク名称5が素子マスクパターンとして有効な範囲lO
の外側の位置に焼付けられるようになっている〇
第2図(a)Fi本発明によるフォトマスクの一例を示
したものでフォトマスクlの面上に複数の素子パターン
2と表示パターン6、’7,8.9とt配置し九もので
ある。表示パターン6、フ、8.9゜にば、従来カード
類に記入してい友マスクパターン児成後の品質検査結電
であるパターン寸法のズレや位置精度、および不良チッ
プの重置ヤ場所などに関する情報′を記入する。情報の
記録は光デイスクメモリと同様な方法でレーザ光でマス
ク上のクロム膜などt蒸発させ1〜3μm径の小穴を形
成するか、tたは英数字などt”l[接形成するか記録
する情帷密kにより)!!択して用いることができるO
本発明は、マスクとして有効な部分でウェーハ上の素子
パターン密度に影響を与えずに情at−*寝込むことが
でき心ため、マスク検査時N:レーザにより同時記録す
るような自動化や別のカード類に記録した場合に生ずる
照合ミスを防ぐことができる。また半導体ウェーハ製造
工程で必要な10枚以上にも及ぶマスク枚数會使用する
際1問題となる不良素子パターンを含むマスクを組合わ
せる場合のマスクの選択や該マスクの自動セツティング
などが可能となる0これらのことは慣@を必要性を発揮
すめこととなる〇
本発明によればマスクの品質情報をマスク自体が有する
こととなり、取扱いが着しく簡易化されるとともに照合
ミスなども発生せず、記録され友情@を利用してのマス
クの選択や組合せなどt含むマスクエ楊の自動化が可能
となる。Using this photomask 1, a predetermined process mt- is carried out to simultaneously form a VC element pattern chip 4 on a wafer 3. For the photomask 1, mask name 5 representing the contents of the normal mask is valid as an element mask pattern. range lO
Figure 2 (a) Fi shows an example of a photomask according to the present invention, in which a plurality of element patterns 2 and display patterns 6,' are printed on the surface of the photomask l. 7, 8.9 and t arrangement. Display pattern 6, f, 8.9° is conventionally written on cards to check for deviations in pattern dimensions, positional accuracy, location of defective chips, etc. due to quality inspection after formation of a mask pattern. Fill in the information related to Information can be recorded in the same way as optical disk memory by evaporating the chromium film on the mask using a laser beam to form small holes with a diameter of 1 to 3 μm, or by forming small holes such as alphanumeric characters [contact formation or recording]. According to the information density k)!!O which can be selectively used, the present invention allows information to be embedded in a portion effective as a mask without affecting the element pattern density on the wafer. N during mask inspection: Verification errors that occur when automation is used to simultaneously record with a laser or when recording on different cards can be prevented.Also, it is possible to use multiple masks, which can exceed 10, which is required in the semiconductor wafer manufacturing process. This makes it possible to select a mask when combining masks that include defective element patterns, which is a problem when doing so, and to automatically set the mask. According to the invention, the quality information of the mask is contained in the mask itself, which simplifies handling, eliminates verification errors, and allows for the selection and combination of masks using Friendship@. Automation of mask etching becomes possible.
第1図(SL)、 (b)U従来のフォトマスクおよび
このフォトマスクにより得られるウェーハの各平面図。
第2図(SL)1 (b)は不発明による実施例を示す
フォトマスクおよびこのフォトマスクにより得られるウ
ェーハの6平面図である。
図において1μフオトマスク、2h素子パターン、3は
ウェーハ、4は素子パターンチップ、5n−rス1名称
、6.′71 e、9は表示バター7゜第1図((1)
(b)
第7図((1)
ツ
(b)FIG. 1 (SL), (b) U is a plan view of a conventional photomask and a wafer obtained using this photomask. FIG. 2 (SL) 1 (b) is a 6th plan view of a photomask and a wafer obtained by this photomask showing an embodiment according to the invention. In the figure, 1μ photomask, 2h element pattern, 3 wafer, 4 element pattern chip, 5n-r 1 name, 6. '71 e, 9 indicates butter 7° Figure 1 ((1) (b) Figure 7 ((1) ツ(b)
Claims (1)
マスク面の一部分に、マスクの品質情報t−狭示パター
ンとして記録したことに%黴とする品質情報記録マスク
。A quality information recording mask in which quality information of the mask is recorded as a t-indication pattern on a part of the mask surface on which element patterns of a plurality of chips are simultaneously formed on a substrate.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56154636A JPS5856315A (en) | 1981-09-29 | 1981-09-29 | Quality information recording mask |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56154636A JPS5856315A (en) | 1981-09-29 | 1981-09-29 | Quality information recording mask |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5856315A true JPS5856315A (en) | 1983-04-04 |
Family
ID=15588528
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56154636A Pending JPS5856315A (en) | 1981-09-29 | 1981-09-29 | Quality information recording mask |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5856315A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5583709A (en) * | 1993-08-11 | 1996-12-10 | Pioneer Electronic Corporation | Method and apparatus for automatically selecting a noise reduction circuitry in playback mode |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS53117384A (en) * | 1977-03-23 | 1978-10-13 | Nec Corp | Photoetching mask |
JPS5421275A (en) * | 1977-07-19 | 1979-02-17 | Mitsubishi Electric Corp | Photo mask for semiconductor wafer manufacture |
JPS5587149A (en) * | 1978-12-25 | 1980-07-01 | Mitsubishi Electric Corp | Photomask for preparation of semiconductor wafer |
JPS5629239A (en) * | 1979-08-17 | 1981-03-24 | Nec Corp | Photomask |
JPS5788450A (en) * | 1980-11-21 | 1982-06-02 | Nec Corp | Photomask |
-
1981
- 1981-09-29 JP JP56154636A patent/JPS5856315A/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS53117384A (en) * | 1977-03-23 | 1978-10-13 | Nec Corp | Photoetching mask |
JPS5421275A (en) * | 1977-07-19 | 1979-02-17 | Mitsubishi Electric Corp | Photo mask for semiconductor wafer manufacture |
JPS5587149A (en) * | 1978-12-25 | 1980-07-01 | Mitsubishi Electric Corp | Photomask for preparation of semiconductor wafer |
JPS5629239A (en) * | 1979-08-17 | 1981-03-24 | Nec Corp | Photomask |
JPS5788450A (en) * | 1980-11-21 | 1982-06-02 | Nec Corp | Photomask |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5583709A (en) * | 1993-08-11 | 1996-12-10 | Pioneer Electronic Corporation | Method and apparatus for automatically selecting a noise reduction circuitry in playback mode |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0061536B1 (en) | Method of manufacturing a semiconductor device having improved alignment marks and alignment marks for said method | |
JP2006039223A (en) | Method for manufacturing exposure mask, exposure apparatus, method for manufacturing semiconductor device, and mask blank product | |
US4442188A (en) | System for specifying critical dimensions, sequence numbers and revision levels on integrated circuit photomasks | |
JPH1165093A (en) | Substrate control device, substrate storing container, substrate storing device, and device manufacture | |
US7939224B2 (en) | Mask with registration marks and method of fabricating integrated circuits | |
KR930002676B1 (en) | Automatic verification apparatus of pattern for mask | |
JPS5856315A (en) | Quality information recording mask | |
JP2000228341A (en) | Semiconductor integrated circuit | |
US4613230A (en) | Wafer exposure apparatus | |
JPH1165088A (en) | Substrate for manufacturing device | |
JPH06502964A (en) | Semiconductor chips that are fabricated together on one plate and then individualized | |
JP3468417B2 (en) | Thin film formation method | |
JP2975132B2 (en) | Thin-film magnetic head and method of assigning symbols to thin-film magnetic head | |
JP3333603B2 (en) | Chip with position indication in wafer and method of manufacturing the same | |
JPH04102214A (en) | Production of thin-film magnetic head | |
JP2789818B2 (en) | Semiconductor wafer identification method | |
JP2564440B2 (en) | Method of manufacturing chip with in-wafer position indication | |
JP4325206B2 (en) | Identification information recording method | |
JPS62235952A (en) | Mask for semiconductor device | |
JPH03209711A (en) | Manufacture of semiconductor device | |
JPS62193240A (en) | Manufacture of semiconductor device | |
JP2764925B2 (en) | Method for manufacturing semiconductor device | |
JPS6111461B2 (en) | ||
JP4025351B2 (en) | Mask substrate information generation method, mask substrate manufacturing method, and mask substrate inspection method | |
JPS61117544A (en) | Photomask |