JPS5855675Y2 - multilayer printed circuit board - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a multilayer printed circuit board having independent power supply layers and ground layers, and the mounting of the printed circuit board prevents a decrease in wiring efficiency at holes and the like.

When using a large printed circuit board such as the back panel of a computer shelf, it is often fixed to the frame by drilling holes directly in the printed circuit board and inserting screws.

Figure 1 shows a multilayered film with holes like this. FIG. 2 is a perspective view showing the signal layer and power layer of the lint board separated, and one signal layer Ls and one power layer Lb are representatively shown.

Hole Hs is a blank hole in the signal layer, and Hb is a blank hole in the power layer.

The signal layer Ls is patterned so that a basic lattice 1 is assumed, lands 2 are provided at the intersections of the lattice, and a signal pattern 3 runs between the lattices.

Since it is not possible to create a pattern in and around the blank hole Hs, for example, it is formed avoiding the blank hole Hs as in pattern 31, or it is formed as a dead end as in pattern 32, and it is temporarily formed through land 2. In some cases, the signal layer is detoured to the other signal layer.

However, in the case of the pattern 31, since it has to be shaped to bulge outward, the degree of freedom of wiring on the outside is hindered, and if the dead-end pattern 32 is detoured by another signal layer pattern, the detour pattern , the degree of freedom in wiring other signal layers is limited.

This type of wiring is possible if there is sufficient wiring space near the hole in each signal layer, but there is usually no such space on high-density printed circuit boards, so it ends up being too much wiring. The only option is to either squeeze other wiring parts by the size of the hole or reduce the wiring density near the hole.

On the other hand, the power supply layer Lb and the ground layer are usually master patterned to reduce the burden of artwork work and improve connection reliability.

The pattern of the power layer Lb is composed of a mesh pattern 4 running vertically and horizontally between the lattices of the same basic lattice 1' as the signal layer, and the power supply section to the signal layer has lands 5 at the intersections of the lattice. It is equipped with

In the stacked state, this land 5 and the land on the signal layer are connected to each other through a hole or via hole (VIAH).
OLE).

In the portion of the hole Hb, the current layer pattern 4 is also formed avoiding the hole Hb.

Further, the ground layer is usually configured in substantially the same manner as the power layer Lb.

A multilayer printed circuit board is constructed by laminating many layers of such a signal layer Ls, a power supply layer Lb, and a ground layer.
As described above, the degree of freedom of wiring in the signal layer is limited due to the holes.

Therefore, the present invention was devised to effectively solve this problem, and for this purpose, the present invention provides an auxiliary relay pattern near the hole in the power layer and ground layer, and the power layer pattern By forming a master pattern together with the ground layer pattern and the ground layer pattern, the pattern that should pass through the hole in the signal layer is relayed using the auxiliary pattern of the power layer and the ground layer.

FIG. 2 shows an embodiment of the present invention, and corresponding to FIG. 1, one signal layer Ls' and one power supply layer Lb' are shown in a separated state.

First, in the power supply layer Lb', a relay pattern 6 is additionally formed near the hole Hb.

The power layer pattern 4 is formed avoiding the relay pattern 6.

On the other hand, the patterns of the signal layer Ls' are 71.72 and 71
As shown in ', 72', the pattern passing near the hole Hs is cut off near the hole, and the interrupted portion is connected with the relay pattern 6.6' of the power layer.

That is, as shown in FIG.
By arranging the pads 61p, 621) at both ends of the
and 61p, and pads 72p and 62I) are connected through through holes 81 and 82, respectively.

As a result, pattern 71~pad 71p~through hole 81~pad 61p~relay pattern 6~pad 62
I) ~Through hole~Pad 72p~Pattern 72,
A wiring route is formed.

Similarly, the pattern 71' to pad 71b' to through hole (81') to pad 61p' is applied to the back of the hole.
~Relay hatan 6'~Pad 62p'~Through hole (
A wiring route from 82') to pad 72p' to pattern 72' is formed.

According to this configuration, the interrupted portion of the signal layer pattern due to the hole is connected by the relay pattern 6.6' formed in the power layer, so that it is not necessary to connect other wiring areas on the same signal layer as in the conventional case. It becomes possible to perform wiring processing near the hole without placing a burden on the signal layer or other signal layers.

Therefore, the degree of freedom of wiring in the signal layer is not restricted, and high-density wiring can be smoothly realized.

Next, it is preferable that this relay pattern 6, 6' and the connection pads at both ends thereof be made into a master pattern together with the power layer pattern 4. To do this, it is necessary to assume all pattern conditions and always pattern the signal layer pattern as necessary. Connect the relay pattern 6.6' in such a position that the interrupted part of the
It is desirable to place

Each pad 711), 72p in the signal layer and power supply layer
, 61 p, 62 p, etc. are placed on the grid intersections.

Although the figure shows an example in which a relay pattern is provided on the power layer, the relay pattern can be formed on the ground layer in the same manner.

The ground layer relay pattern is the power layer relay pattern 6.6
It is also good to form the wiring in the direction perpendicular to ′. According to this method, by using both the relay pattern of the power layer and the relay pattern of the ground layer, the relay wiring can be freely formed in either the X or Y direction near the hole. can.

Furthermore, as the number of layers increases and the density increases, the number of power supply layers and ground layers increases, so if a relay pattern is provided for all of these power supply layers and ground layers by master patterning, high-density wiring can be adequately handled.

As described above, according to the present invention, a relay pattern that has been made into a master pattern is provided in advance near the blank holes in the power supply layer and the ground layer, and the pattern passing through the blank holes in the signal layer is interrupted near the blank holes. By connecting to the relay pattern through through holes (including via holes), wiring problems near the blank holes can be solved using the power supply layer and the ground layer.

As a result, it is possible to wire with almost the same degree of freedom as in areas without blank holes without affecting other signal pattern areas, which is very effective in increasing the density of printed wiring.

Note that this concept also applies to ceramic wiring boards, and therefore, the term "printed wiring board" in the present invention includes ceramic wiring boards.

[Brief explanation of drawings]

FIG. 1 is a perspective view of a signal layer and a power supply layer showing the wiring process near the hole in a conventional printed circuit board, and FIG. 2 is a diagram corresponding to FIG. 1 showing the wiring process near the hole according to the present invention.
FIG. 3 is a cross-sectional view of a main part of a state in which the layers shown in FIG. 2 are laminated. In the figure, LS' is a signal layer, Lb' is a power layer, Hs,
Hb is a stupid hole, 1' is a basic lattice, 4 is a power layer pattern,
6, 6' are interrupted patterns, 71.72.71', 72'
are signal layer patterns, 61 p, 62 p, 71 p, 7
2 p, 61 I)', 62 p', 71 p', 72
p' is a connection pad.

Claims (1)

[Scope of utility model registration request] In a multilayer printed circuit board with holes drilled for mounting on the frame, at least one of the power layer and the ground layer has an auxiliary pattern for relaying near the hole, and on the signal layer 1. A multilayer printed circuit board, characterized in that the wiring pattern interrupted due to the blank hole can be connected to the auxiliary pattern via a through hole or the like.