JPS5854429A - デ−タ処理システムにおけるリモ−ト・チヤネル方式 - Google Patents

デ−タ処理システムにおけるリモ−ト・チヤネル方式

Info

Publication number
JPS5854429A
JPS5854429A JP15251881A JP15251881A JPS5854429A JP S5854429 A JPS5854429 A JP S5854429A JP 15251881 A JP15251881 A JP 15251881A JP 15251881 A JP15251881 A JP 15251881A JP S5854429 A JPS5854429 A JP S5854429A
Authority
JP
Japan
Prior art keywords
unit
main storage
channel
input
storage device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15251881A
Other languages
English (en)
Japanese (ja)
Other versions
JPS617661B2 (enrdf_load_stackoverflow
Inventor
Taiho Higuchi
樋口　大奉
Teruyoshi Mita
三田　照義
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15251881A priority Critical patent/JPS5854429A/ja
Publication of JPS5854429A publication Critical patent/JPS5854429A/ja
Publication of JPS617661B2 publication Critical patent/JPS617661B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
JP15251881A 1981-09-25 1981-09-25 デ−タ処理システムにおけるリモ−ト・チヤネル方式 Granted JPS5854429A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15251881A JPS5854429A (ja) 1981-09-25 1981-09-25 デ−タ処理システムにおけるリモ−ト・チヤネル方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15251881A JPS5854429A (ja) 1981-09-25 1981-09-25 デ−タ処理システムにおけるリモ−ト・チヤネル方式

Publications (2)

Publication Number Publication Date
JPS5854429A true JPS5854429A (ja) 1983-03-31
JPS617661B2 JPS617661B2 (enrdf_load_stackoverflow) 1986-03-07

Family

ID=15542189

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15251881A Granted JPS5854429A (ja) 1981-09-25 1981-09-25 デ−タ処理システムにおけるリモ−ト・チヤネル方式

Country Status (1)

Country Link
JP (1) JPS5854429A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61223953A (ja) * 1985-03-29 1986-10-04 Hitachi Ltd 多重化制御装置
JPS6211951A (ja) * 1985-07-10 1987-01-20 Hitachi Ltd チヤネル装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61223953A (ja) * 1985-03-29 1986-10-04 Hitachi Ltd 多重化制御装置
JPS6211951A (ja) * 1985-07-10 1987-01-20 Hitachi Ltd チヤネル装置

Also Published As

Publication number Publication date
JPS617661B2 (enrdf_load_stackoverflow) 1986-03-07

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